Patent application number | Description | Published |
20090057644 | Phase-change memory units, methods of forming the phase-change memory units, phase-change memory devices having the phase-change memory units and methods of manufacturung the phase-change memory devices - A phase-change memory unit includes a lower electrode on a substrate, a phase-change material layer pattern including germanium-antimony-tellurium (GST) and carbon on the lower electrode, a transition metal layer pattern on the phase-change material layer pattern, and an upper electrode on the first transition metal layer pattern. The phase-change memory unit may have good electrical characteristics. | 03-05-2009 |
20090278107 | Phase change memory device - The phase change memory device includes a first electrode and a second electrode and a first phase change material pattern and a second phase change material pattern interposed between the first electrode and the second electrode, wherein the first and second phase change material patterns have respectively different electrical characteristics. | 11-12-2009 |
20110032753 | MEMORY CELLS INCLUDING RESISTANCE VARIABLE MATERIAL PATTERNS OF DIFFERENT COMPOSITIONS - A non-volatile memory device includes a plurality of word lines, a plurality of bit lines, and an array of variable resistance memory cells each electrically connected between a respective word line and a respective bit line. Each of the memory cells includes first and second resistance variable patterns electrically connected in series between first and second electrodes. A material composition of the first resistance variable pattern is different than a material composition of the second resistance variable pattern. Multi-bit data states of each memory cell are defined by a contiguous increase in size of a programmable high-resistance volume within the first and second resistance variable patterns. | 02-10-2011 |
20110049458 | Non-volatile memory device including phase-change material - A non-volatile memory device including a phase-change material, which has a low operating voltage and low power consumption, includes a lower electrode; a phase-change material layer formed on the lower electrode so as to be electrically connected to the lower electrode, wherein the phase-change material layer includes a phase-change material having a composition represented by Sn | 03-03-2011 |
20110272380 | Methods of forming pattern structures - An example embodiment relates to a method of forming a pattern structure, including forming an object layer on a substrate, and forming a hard mask on the object layer. A plasma reactive etching process is performed on the object layer using an etching gas including a fluorine containing gas and ammonia (NH | 11-10-2011 |
20120018824 | MAGNETIC MEMORY LAYER AND MAGNETIC MEMORY DEVICE INCLUDING THE SAME - A magnetic memory layer and a magnetic memory device including the same, the magnetic memory layer including a first seed layer; a second seed layer on the first seed layer, the second seed layer grown according to a <002> crystal direction with respect to a surface of the first seed layer; and a main magnetic layer on the second seed layer, the main magnetic layer grown according to the <002> crystal direction with respect to a surface of the second seed layer. | 01-26-2012 |
20120135543 | Method For Forming Magnetic Tunnel Junction Structure And Method For Forming Magnetic Random Access Memory Using The Same - A method of fabricating a magnetic tunnel junction structure includes forming a magnetic tunnel junction layer on a substrate. A mask pattern is formed on a region of the second magnetic layer. A magnetic tunnel junction layer pattern and a sidewall dielectric layer pattern on at least one sidewall of the magnetic tunnel junction layer pattern are formed by performing at least one etch process and at least one oxidation process multiple times. The at least one etch process may include a first etch process to etch a portion of the magnetic tunnel junction layer using an inert gas and the mask pattern to form a first etch product. The at least one oxidation process may include a first oxidation process to oxidize the first etch product attached on an etched side of the magnetic tunnel junction layer. | 05-31-2012 |
20130171743 | MAGNETIC DEVICE AND METHOD OF MANUFACTURING THE SAME - A magnetic device and a method of manufacturing the same. In the method, a lower magnetic layer, an insulation layer, and an upper magnetic layer are sequentially formed on a substrate. An upper magnetic layer pattern is formed by patterning the upper magnetic layer until an upper surface of the insulation layer is exposed. An isolation layer pattern is formed from portions of the insulation layer and the lower magnetic layer by performing an oxidation process on the exposed upper surface of the insulation layer, and an insulation layer pattern and a lower magnetic layer pattern are formed from portions of the insulation layer and the lower magnetic layer, where the isolation layer pattern is not formed. | 07-04-2013 |
20140327095 | MAGNETIC DEVICE - A magnetic device can include a tunnel bather and a hybrid magnetization layer disposed adjacent the tunnel barrier. The hybrid magnetization layer can include a first perpendicular magnetic anisotropy (PMA) layer, a second PMA layer, and an amorphous blocking layer disposed between the first and second PMA layers. The first PMA layer can include a multi-layer film in which a first layer formed of Co and a second layer formed of Pt or Pd are alternately stacked. A first dopant formed of an element different from those of the first and second layers can also be included in the first PMA layer. The second PMA layer can be disposed between the first PMA layer and the tunnel barrier, and can include at least one element selected from a group consisting of Co, Fe, and Ni. | 11-06-2014 |
20150048464 | SEMICONDUCTOR DEVICE HAVING PINNED LAYER WITH ENHANCED THERMAL ENDURANCE - A semiconductor device is provided having a free layer and a pinned layer spaced apart from each other. A tunnel barrier layer is formed between the free layer and the pinned layer. The pinned layer may include a lower pinned layer, and an upper pinned layer spaced apart from the lower pinned layer. A spacer may be formed between the lower pinned layer and the upper pinned layer. A non-magnetic junction layer may be disposed adjacent to the spacer or between layers in the upper or lower pinned layer. | 02-19-2015 |