Hatao

Masato Hatao, Kanagawa JP

Patent application number	Description	Published
20100012850	ULTRAVIOLET RADIATION DETECTOR AND APPARATUS FOR EVALUATING ULTRAVIOLET RADIATION PROTECTION EFFECT - An ultraviolet radiation detector	01-21-2010
20110098815	SKIN SUBSTITUTE MEMBRANE, MOLD, AND METHOD OF EVALUATING EXTERNAL PREPARATION FOR SKIN - A skin substitute membrane includes a surface on one side including a groove-shaped depressed portion and a planar portion, the depressed portion having a cross section having a chamfered V-letter shape, the surface having an arithmetic mean roughness Sa of more than or equal to 10 μm to less than or equal to 50 μm. The depressed portion has a width of more than or equal to 50 μm to less than or equal to 500 μm and a depth of more than or equal to 30 μm to less than or equal to 150 μm. A spectral transmittance for light of more than or equal to 290 nm to less than or equal to 400 nm in wavelength is more than or equal to 50% and less than or equal to 100%.	04-28-2011

Patent application number	Description	Published
20090208525	Antiaging method for skin using pleurotus abalonus - The present invention provides an antioxidant and a whitening agent having high safety, and a external preparation for skin using the same. The antioxidant and whitening agent comprise, as an effective component, one or more extracts from Basidiomycetes selected from the group consisting of	08-20-2009

Patent application number	Description	Published
20090273073	CONNECTING STRUCTURE FOR FLIP-CHIP SEMICONDUCTOR PACKAGE, BUILD-UP LAYER MATERIAL, SEALING RESIN COMPOSITION, AND CIRCUIT BOARD - The invention provides a connecting structure for a flip-chip semiconductor package in which cracking and delamination are inhibited or reduced to improve reliability, and in which the potential range of designs is expanded for the inner circuitry of circuit boards and the inductance is reduced. The invention is a connecting structure for a flip-chip semiconductor package, including: a circuit board having a core layer and at least one build-up layer; a semiconductor element connected via metal bumps to the circuit board; and a sealing resin composition with which gaps between the semiconductor element and circuit board are filled, wherein a cured product of the sealing resin composition has a glass transition temperature between 60° C. and 150° C. and a coefficient of linear expansion from room temperature to the glass transition temperature being between 15 ppm/° C. and 35 ppm/° C., a cured product of the build-up layer has a the glass transition temperature of at least 170° C. and a coefficient of linear expansion in the in-plane direction up to the glass transition temperature being not more than 40 ppm/° C., and stacked vias are provided in the build-up layer on at least one side of the core layer.	11-05-2009