Patent application number | Description | Published |
20090261065 | COMPONENTS FOR USE IN A PLASMA CHAMBER HAVING REDUCED PARTICLE GENERATION AND METHOD OF MAKING - Components entirely of ceramic with etched surfaces wherein the etched surface has a surface roughness value or at least about 100 microinches (about 2.54 microns) Ra, and methods of forming such. | 10-22-2009 |
20100108261 | LOWER ELECTRODE ASSEMBLY OF PLASMA PROCESSING CHAMBER - A lower electrode assembly for use in a plasma processing chamber comprises a metal base and upper and lower edge rings. The metal base comprises metal plates brazed together and forming a brazed line on a lower side surface of the base, an edge ring support surface extending horizontally inwardly from the lower side surface and an upper side surface above the edge ring support surface. The upper edge ring comprises a lower surface mounted on the edge ring support surface and the lower edge ring surrounds the lower side surface of the base with a gap between opposed surfaces of the upper and lower edge rings and between the lower edge ring and the outer periphery of the base. The gap has an aspect ratio of total gap length to average gap width sufficient to impede arcing at the location of the braze line. | 05-06-2010 |
20100116788 | Substrate temperature control by using liquid controlled multizone substrate support - A substrate support useful in a reaction chamber of a plasma processing apparatus is provided. The substrate support comprises a base member and a heat transfer member overlying the base member. The heat transfer member has multiple zones to individually heat and cool each zone of the heat transfer member. An electrostatic chuck overlies the heat transfer member. The electrostatic chuck has a support surface for supporting a substrate in a reaction chamber of the plasma processing apparatus. A source of cold liquid and a source of hot liquid are in fluid communication with flow passages in each zone. A valve arrangement is operable to independently control temperature of the liquid by adjusting a mixing ratio of the hot liquid to the cold liquid circulating in the flow passages. In another embodiment, heating elements along a supply line and transfer lines heat a liquid from a liquid source before circulating in the flow passages. | 05-13-2010 |
20100150695 | Method and System for Centering Wafer on Chuck - A wafer handling mechanism is operated to place a wafer on a chuck. A chucking force is then applied to the wafer, whereby wafer support features of the chuck transfer a defect pattern onto a surface of the wafer. The surface of the wafer is analyzed by a defect metrology tool to obtain a mapping of the defect pattern transferred onto the surface of the wafer. A center coordinate of the chuck within a coordinate system of the wafer is determined by analyzing the defect pattern as transferred to the surface of the wafer. A spatial offset between the center coordinate of the chuck and the center of the wafer is determined. The spatial offset is used to adjust the wafer handling mechanism so as to enable alignment of the center of the wafer to the center coordinate of the chuck. | 06-17-2010 |
20100243164 | REPLACEABLE UPPER CHAMBER SECTION OF PLASMA PROCESSING APPARATUS - A replaceable upper chamber section of a plasma reaction chamber in which semiconductor substrates can be processed comprises a monolithic metal cylinder having a conical inner surface which is widest at an upper end thereof, an upper flange extending horizontally outward away from the conical inner surface and a lower flange extending horizontally away from the conical inner surface. The cylinder includes an upper annular vacuum sealing surface adapted to seal against a dielectric window of the plasma chamber and a lower annular vacuum sealing surface adapted to seal against a bottom section of the plasma chamber. A thermal mass at an upper portion of the cylinder is defined by a portion of the cylinder between the conical inner surface and an outer surface extending vertically from the upper flange, the thermal mass being effective to provide azimuthal temperature uniformity of the conical inner surface. A thermal choke is located at a lower portion of the cylinder and is effective to minimize transfer of heat across the lower vacuum sealing surface. The thermal choke is defined by a thin metal section having a thickness of less than 0.25 inch and extending at least 25% of the length of the conical inner surface. | 09-30-2010 |
20110092072 | HEATING PLATE WITH PLANAR HEATING ZONES FOR SEMICONDUCTOR PROCESSING - A heating plate for a substrate support assembly in a semiconductor plasma processing apparatus, comprises multiple independently controllable planar heater zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. A substrate support assembly in which the heating plate is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the heating plate include bonding together ceramic or polymer sheets having planar heater zones, power supply lines, power return lines and vias. | 04-21-2011 |
20110097902 | METHOD AND APPARATUS OF HALOGEN REMOVAL - A wafer is provided into an entrance load lock chamber. A vacuum is created in the entrance load lock chamber. The wafer is transported to a processing tool. The wafer is processed in a process chamber to provide a processed wafer, wherein the processing forms halogen residue. A degas step is provided in the process chamber after processing the wafer. The processed wafer is transferred into a degas chamber. The processed wafer is treated in the degas chamber with UV light and a flow of gas comprising at least one of ozone, oxygen, or H | 04-28-2011 |
20110103805 | Methods for Accessing a Process Chamber Using a Dual Zone Gas Injector with Improved Optical Access - Methods for processing events occurring in a process chamber are provided. In one method, an operation includes carrying gas and receiving an optical signal from the process chamber to an analysis tool that operates in response to the optical signal having a signal-to-noise ratio (SNR) for process analysis. And, dividing the carried gas and optical signal into a plurality of separate gas and optical signals between the process chamber and the analysis tool. The dividing is configured through separate apertures so that the apertures collectively maintain the SNR of the optical signal received at the tool. Methods provide a septum in a second bore dividing the second bore into apertures configured to reduce etching of and deposition on the optical access window and to maintain the desired SNR at the diagnostic end point. | 05-05-2011 |
20110143462 | ADJUSTING SUBSTRATE TEMPERATURE TO IMPROVE CD UNIFORMITY - A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for. | 06-16-2011 |
20120073754 | PLASMA CONFINEMENT RING ASSEMBLY FOR PLASMA PROCESSING CHAMBERS - A plasma confinement ring assembly with a single movable lower ring can be used for controlling wafer area pressure in a capacitively coupled plasma reaction chamber wherein a wafer is supported on a lower electrode assembly and process gas is introduced into the chamber by an upper showerhead electrode assembly. The assembly includes an upper ring, the lower ring, hangers, hanger caps, spacer sleeves and washers. The lower ring is supported by the hangers and is movable towards the upper ring when the washers come into contact with the lower electrode assembly during adjustment of the gap between the upper and lower electrodes. The hanger caps engage upper ends of the hangers and fit in upper portions of hanger bores in the upper ring. The spacer sleeves surround lower sections of the hangers and fit within lower portions of the hanger bores. The washers fit between enlarged heads of the hangers and a lower surface of the lower ring. The spacer sleeves are dimensioned to avoid rubbing against the inner surfaces of the hanger bores during lifting of the lower ring. | 03-29-2012 |
20120097661 | METHODS OF FAULT DETECTION FOR MULTIPLEXED HEATER ARRAY - Described herein is a method of detecting fault conditions in a multiplexed multi-heater-zone heating plate for a substrate support assembly used to support a semiconductor substrate in a semiconductor processing apparatus. | 04-26-2012 |
20120115254 | HEATING PLATE WITH PLANAR HEATER ZONES FOR SEMICONDUCTOR PROCESSING - A heating plate for a substrate support assembly in a semiconductor plasma processing apparatus, comprises multiple independently controllable planar heater zones arranged in a scalable multiplexing layout, and electronics to independently control and power the planar heater zones. Each planar heater zone includes one or more heater elements made of an insulator-conductor composite. A substrate support assembly in which the heating plate is incorporated includes an electrostatic clamping electrode and a temperature controlled base plate. Methods for manufacturing the heating plate include bonding together ceramic sheets having planar heater zones, power supply lines, power return lines and vias. | 05-10-2012 |
20120289053 | Semiconductor Processing System Having Multiple Decoupled Plasma Sources - A semiconductor substrate processing system includes a substrate support defined to support a substrate in exposure to a processing region. The system also includes a first plasma chamber defined to generate a first plasma and supply reactive constituents of the first plasma to the processing region. The system also includes a second plasma chamber defined to generate a second plasma and supply reactive constituents of the second plasma to the processing region. The first and second plasma chambers are defined to be independently controlled. | 11-15-2012 |
20120289054 | Semiconductor Processing System Having Multiple Decoupled Plasma Sources - A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate assembly disposed within the chamber above the substrate support. The top plate assembly includes first and second sets of plasma microchambers each formed into the lower surface of the top plate assembly. A first network of gas supply channels are formed through the top plate assembly to flow a first process gas to the first set of plasma microchambers to be transformed into a first plasma. A set of exhaust channels are formed through the top plate assembly. The second set of plasma microchambers are formed inside the set of exhaust channels. A second network of gas supply channels are formed through the top plate assembly to flow a second process gas to the second set of plasma microchambers to be transformed into a second plasma. | 11-15-2012 |
20120299252 | VACUUM SEAL ARRANGEMENT USEFUL IN PLASMA PROCESSING CHAMBER - A vacuum seal arrangement comprising a one-piece elastomeric gasket having at least first and second O-rings interconnected by a planar web, a first part having a first planar sealing surface with a dove-tail groove therein holding the first O-ring and a square walled groove therein holding the second O-ring, the first part further including at least one passage in the first planar sealing surface surrounded by the first O-ring or second O-ring. | 11-29-2012 |
20130021717 | ELECTROSTATIC CHUCK WITH WAFER BACKSIDE PLASMA ASSISTED DECHUCK - An electrostatic chuck assembly useful in a plasma processing chamber, comprising a support surface on which a semiconductor wafer is supported during processing of the wafer in the chamber, at least one electrostatic clamping electrode which applies an electrostatic clamping force to the wafer on the support surface when an electrostatic clamping voltage is applied to the clamping electrode, at least one outlet in the support surface which delivers a heat transfer gas to an underside of the wafer, at least one gas passage connected to a source of heat transfer gas operable to supply heat transfer gas at a desired pressure to the at least one gas passage, and at least one cavity and plasma generating electrode along the at least one gas passage, the plasma generating electrode operable to form a dechucking plasma in the cavity, the dechucking plasma being effective to neutralize charges on the underside of the wafer and support surface of the electrostatic chuck and thereby reduce a residual sticking force between the wafer and the support surface. | 01-24-2013 |
20130023125 | METHODS AND APPARATUS FOR ATOMIC LAYER ETCHING - Substrate processing systems and methods for etching an atomic layer are disclosed. The methods and systems are configured to introducing a first gas into the chamber, the gas being an etchant gas suitable for etching the layer and allowing the first gas to be present in the chamber for a period of time sufficient to cause adsorption of at least some of the first gas into the layer. The first gas is substantially replaced in the chamber with an inert gas, and metastables are then generated from the inert gas to etch the layer with the metastables while substantially preventing the plasma charged species from etching the layer. | 01-24-2013 |
20130072025 | COMPONENT OF A SUBSTRATE SUPPORT ASSEMBLY PRODUCING LOCALIZED MAGNETIC FIELDS - A component of a substrate support assembly such as a substrate support or edge ring includes a plurality of current loops incorporated in the substrate support and/or the edge ring. The current loops are laterally spaced apart and extend less than halfway around the substrate support or edge ring with each of the current loops being operable to induce a localized DC magnetic field of field strength less than 20 Gauss above a substrate supported on the substrate support during plasma processing of the substrate. When supplied with DC power, the current loops generate localized DC magnetic fields over the semiconductor substrate so as to locally affect the plasma and compensate for non-uniformity in plasma processing across the substrate. | 03-21-2013 |
20130164688 | Support, Lithographic Apparatus and Device Manufacturing Method - A support for an object, e.g., a semiconductor substrate, includes a main body having a surface configured and arranged to have a plurality of projections. Each of the projections has an associated electrostatic actuator for displacing a free end of the associated projection relative to the main body at least in a direction in a plane parallel to a main surface of the object. | 06-27-2013 |
20130214828 | METHODS AND APPARATUS FOR SYNCHRONIZING RF PULSES IN A PLASMA PROCESSING SYSTEM - A synchronized pulsing arrangement for providing at least two synchronized pulsing RF signals to a plasma processing chamber of a plasma processing system is provided. The arrangement includes a first RF generator for providing a first RF signal. The first RF signal is provided to the plasma processing chamber to energize a plasma therein, the first RF signal representing a pulsing RF signal. The arrangement also includes a second RF generator for providing a second RF signal to the plasma processing chamber. The second RF generator has a sensor subsystem for detecting values of at least one parameter associated with the plasma processing chamber that reflects whether the first RF signal is pulsed high or pulsed low and a pulse controlling subsystem for pulsing the second RF signal responsive to the detecting the values of at least one parameter. | 08-22-2013 |
20140004702 | HEATING PLATE WITH PLANAR HEATER ZONES FOR SEMICONDUCTOR PROCESSING | 01-02-2014 |
20140045337 | HEATING PLATE WITH PLANAR HEATER ZONES FOR SEMICONDUCTOR PROCESSING - An exemplary method is directed to powering heaters in a substrate support assembly on which a semiconductor substrate is supported. The support assembly has an array of heaters powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to a power supply and at least two of the heaters and each power return line is connected to at least two of the heaters, and a switching device which independently connects each one of the heaters to one of the power supply lines and one of the power return lines so as to provide time-averaged power to each of the heaters by time divisional multiplexing of switches of the switching device. The method includes supplying power to each of the heaters sequentially using a time-domain multiplexing scheme. | 02-13-2014 |
20140047705 | HEATING PLATE WITH PLANAR HEATER ZONES FOR SEMICONDUCTOR PROCESSING - An exemplary method for manufacturing a heating plate for a substrate support assembly includes forming holes in at least one sheet, printing a slurry of conductor powder, or pressing a precut metal foil, or spraying a slurry of conductor powder, on the at least one sheet to form the planar heater zones, the power supply lines, and power return lines. The holes in the at least one sheet are filled with a slurry of conductor powder to form power supply and power return vias. The sheets are then aligned, pressed, and bonded to form the heating plate. | 02-20-2014 |
20140096909 | HEATING PLATE WITH PLANAR HEATER ZONES FOR SEMICONDUCTOR PROCESSING - A heating plate of a semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a first layer with an array of heater zones operable to tune a spatial temperature profile on the semiconductor substrate, and a second layer with one or more primary heaters to provide mean temperature control of the semiconductor substrate. The heating plate can be incorporated in a substrate support wherein a switching device independently supplies power to each one of the heater zones to provide time-averaged power to each of the heater zones by time divisional multiplexing of the switches. | 04-10-2014 |
20140110060 | ADJUSTING SUBSTRATE TEMPERATURE TO IMPROVE CD UNIFORMITY - A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for. | 04-24-2014 |
20140263274 | METHODS OF FAULT DETECTION FOR MULTIPLEXED HEATER ARRAY - Described herein is a method of detecting fault conditions in a multiplexed multi-heater-zone heating plate for a substrate support assembly used to support a semiconductor substrate in a semiconductor processing apparatus. | 09-18-2014 |
20140302680 | INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION - The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. | 10-09-2014 |
20140302681 | INTERNAL PLASMA GRID FOR SEMICONDUCTOR FABRICATION - The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid may have slots of a particular aspect ratio which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber. The lower sub-chamber plasma has a lower electron density, lower effective electron temperature, and higher negative ion:positive ion ratio as compared to the upper sub-chamber plasma. The disclosed embodiments may result in an etching process having good center to edge uniformity, selectivity, profile angle, and Iso/Dense loading. | 10-09-2014 |
20140335698 | COMPONENT OF A PLASMA PROCESSING APPARATUS HAVING A PROTECTIVE IN SITU FORMED LAYER ON A PLASMA EXPOSED SURFACE - A component of a plasma processing chamber having a protective liquid layer on a plasma exposed surface of the component. The protective liquid layer can be replenished by supplying a liquid to a liquid channel and delivering the liquid through liquid feed passages in the component. The component can be an edge ring which surrounds a semiconductor substrate supported on a substrate support in a plasma processing apparatus wherein plasma is generated and used to process the semiconductor substrate. Alternatively, the protective liquid layer can be cured or cooled sufficiently to form a solid protective layer. | 11-13-2014 |
20140357092 | CHAMBER WALL OF A PLASMA PROCESSING APPARATUS INCLUDING A FLOWING PROTECTIVE LIQUID LAYER - A semiconductor plasma processing apparatus includes a vacuum chamber in which semiconductor substrates are processed, a process gas source in fluid communication with the vacuum chamber for supplying a process gas into the vacuum chamber, and an RF energy source adapted to energize the process gas into the plasma state in the vacuum chamber. The apparatus can also include a chamber wall wherein the chamber wall includes a means for supplying a plasma compatible liquid to a plasma exposed surface thereof wherein the plasma compatible liquid flows over the plasma exposed surface thereby forming a flowing protective liquid layer thereon. A liquid supply delivers the plasma compatible liquid to the chamber wall. | 12-04-2014 |
20150028744 | Etch Rate Modeling and Use Thereof for In-Chamber and Chamber-to-Chamber Matching - A method for performing chamber-to-chamber matching includes receiving a voltage and a current measured at an output of an RF generator of a first plasma system. The method further includes calculating a sum of terms. The first term is a first product of a coefficient and a function of the voltage. The second term is a second product of a coefficient and a function of the current. The third term is a third product of a coefficient, a function of the voltage, and a function of the current. The method further includes determining the sum to be the etch rate associated with the first plasma system and adjusting power output from an RF generator of a second plasma system to achieve the etch rate associated with the first plasma system. | 01-29-2015 |
20150032245 | Etch Rate Modeling and Use Thereof with Multiple Parameters for In-Chamber and Chamber-to-Chamber Matching - A method includes receiving a voltage and current measured at an output of an RF generator of a first plasma system and calculating a first model etch rate based on the voltage and current, and a power. The method further includes receiving a voltage and current measured at an output of the RF generator of a second plasma system, determining a second model etch rate based on the voltage and current at the output of the RF generator of the second plasma system, and comparing the second model etch rate with the first model etch rate. The method includes adjusting a power at the output of the RF generator of the second plasma system to achieve the first model etch rate associated with the first plasma system upon determining that the second model etch rate does not match the first model etch rate. The method is executed by a processor. | 01-29-2015 |
20150044878 | Semiconductor Processing System Having Multiple Decoupled Plasma Sources - A semiconductor substrate processing system includes a chamber that includes a processing region and a substrate support. The system includes a top plate assembly disposed within the chamber above the substrate support. The top plate assembly includes first and second sets of plasma microchambers each formed into the lower surface of the top plate assembly. A first network of gas supply channels are formed through the top plate assembly to flow a first process gas to the first set of plasma microchambers to be transformed into a first plasma. A set of exhaust channels are formed through the top plate assembly. The second set of plasma microchambers are formed inside the set of exhaust channels. A second network of gas supply channels are formed through the top plate assembly to flow a second process gas to the second set of plasma microchambers to be transformed into a second plasma. | 02-12-2015 |
20150048740 | SUB-PULSING DURING A STATE - A method for achieving sub-pulsing during a state is described. The method includes receiving a clock signal from a clock source, the clock signal having two states and generating a pulsed signal from the clock signal. The pulsed signal has sub-states within one of the states. The sub-states alternate with respect to each other at a frequency greater than a frequency of the states. The method includes providing the pulsed signal to control power of a radio frequency (RF) signal that is generated by an RF generator. The power is controlled to be synchronous with the pulsed signal. | 02-19-2015 |
20150060404 | System, Method and Apparatus for Coordinating Pressure Pulses and RF Modulation in a Small Volume Confined Process Reactor - A plasma processing system and method includes a processing chamber, and a plasma processing volume included therein. The plasma processing volume having a volume less than the processing chamber. The plasma processing volume being defined by a top electrode, a substrate support surface opposing the surface of the top electrode and a plasma confinement structure including at least one outlet port. A conductance control structure is movably disposed proximate to the at least one outlet port and capable of controlling an outlet flow through the at least one outlet port between a first flow rate and a second flow rate, wherein the conductance control structure controls the outlet flow rate and an at least one RF source is modulated and at least one process gas flow rate is modulated corresponding to a selected processing state set by the controller during a plasma process. | 03-05-2015 |
20150064920 | System, Method and Apparatus for Generating Pressure Pulses in Small Volume Confined Process Reactor - A plasma processing system and method includes a processing chamber, and a plasma processing volume included therein. The plasma processing volume having a volume less than the processing chamber. The plasma processing volume being defined by a top electrode, a substrate support surface opposing the surface of the top electrode and a plasma confinement structure including at least one outlet port. A conductance control structure is movably disposed proximate to the at least one outlet port and capable of restricting an outlet flow through the at least one outlet port to a first flow rate and capable of increasing the outlet flow through the at least one outlet port to a second flow rate, wherein the conductance control structure restricts the outlet flow rate moves between the first flow rate and the second flow rate corresponding to a selected processing state set by the controller during a plasma process. | 03-05-2015 |
20150087154 | HIGH ASPECT RATIO ETCH WITH COMBINATION MASK - A method for etching features in a stack is provided. A combination hardmask is formed by forming a first hardmask layer comprising carbon or silicon oxide over the stack, forming a second hardmask layer comprising metal over the first hardmask layer, and patterning the first and second hardmask layers. The stack is etched through the combination hardmask. | 03-26-2015 |