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Hargrove, US
David C. Hargrove, Woodinville, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100153760 | Power Settings in Wireless Ultra-Wide band Universal Serial Bus - Various embodiments enable a host controller, through its Protocol Adaption Layer (PAL) driver, to efficiently manage power consumption by employing “sleep mode” and “active mode” power settings. In some embodiments, the PAL driver may employ sleep mode settings to transition the host controller from an idle state to an energy conserving sleep state. In further embodiments, the PAL driver may use active mode settings to govern communications between the host controller and various devices, such as WUSB devices and others, thereby conserving power. | 06-17-2010 |
Drake Hargrove, Havelock, NC US
| Patent application number | Description | Published |
|---|---|---|
| 20110041772 | Stabilized pet dish and method therefor - A vessel for holding and presenting solids, liquids or both, including a vessel body having a base portion and at least one wall member extending from the base portion and defining at least one cavity for containing solids, liquids or both; a stabilizer including a stabilizer body for ground engagement; and a fastener assembly for releasably retaining the body and the stabilizer in a mated relationship, the fastener including a first fastener portion mounted to the vessel body and a second fastener portion mounted to the stabilizer in a configuration for mating with the first fastener portion when the second fastener portion is closely adjacent a ground surface with the stabilizer body extending into the ground. | 02-24-2011 |
| 20110253054 | STABILIZED PET DISH ASSEMBLY AND METHOD - A vessel assembly for holding and presenting solids, liquids or both, including a vessel body having a base portion and at least one wall member extending from the base portion and defining at least one cavity for containing solids, liquids or both; a stabilizer including a stabilizer body for ground engagement; and a fastener assembly for releasably retaining the body and the stabilizer in a mated relationship, the fastener including a first fastener portion operatively associated with the vessel body and a second fastener portion operatively associated with the stabilizer in a configuration for mating with the first fastener portion for stabilizing the vessel. | 10-20-2011 |
Garrard L. Hargrove, Birmingham, AL US
| Patent application number | Description | Published |
|---|---|---|
| 20100233325 | RUMINANT FEED COMPOSITION AND METHOD OF MAKING - A nutrient or medicinal composition for administration to ruminants, which includes a core of one or more biologically active substances coated with a film of polyurethane, overcoated with an “intermediate” wax is disclosed. This polyurethane/wax coating is resistant to rumen conditions, but will release the biologically active substance(s) in the abomasum and subsequent digestive tract of the ruminant animal. | 09-16-2010 |
Garrard Lee Hargrove, Birmingham, AL US
| Patent application number | Description | Published |
|---|---|---|
| 20120111075 | CROSS-LINKED MODIFIED WAXES FOR CONTROLLED RELEASE FERTILIZERS - A controlled release fertilizer material comprising a particulate plant nutrient surrounded by, a coating of a mixture including an isocyanate and a polyol, and further comprising a modified wax that may include a polyhydroxyt compound in which the wax and/or the polyhydroxyl compound are cross-linked with a sulfur or oxygen or a peroxide cross-linking moiety. In certain embodiments, the wax and polyhydroxyl compound are cross-linked at unsaturated sites in the wax or polyhydroxyl compound using heat, UV or ionizing radiation. | 05-10-2012 |
| 20120111076 | CONTROLLED RELEASE FERTILIZERS MADE FROM CROSS-LINKED GLYCERIDE MIXTURES - A controlled release fertilizer material comprising a particulate plant nutrient surrounded by a coating which is the reaction product of a mixture including a cross-linked polyol, an isocyanate and a wax is described. The cross-linked polyol is a reaction product of a polyhydroxyl compound, such as glycerol, and a triglyceride and the monoglyceride and/or diglyceride products are cross-linked with sulfur, oxygen and/or a peroxide cross-linking moiety, or are directly cross-linked at unsaturated sites in the monoglycerides and/or diglycerides. | 05-10-2012 |
James Hargrove, Riverside, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20130017618 | CHEMICAL EXPLOSIVE DETECTOR - A method and device for detecting explosive compounds in an air sample in which the air sample is filtered with activated carbon treated with a weakly basic solution, after which the air sample is divided into two parts, with one part being heated at lower temperatures to decompose non-explosive nitrogenous compounds and the second part being heated at higher temperatures to decompose explosive nitrogenous compounds. Nitrogen dioxide is measured in both portions of the air sample with a spectrographic detector, and the presence or absence of explosive nitrogenous compounds in the air sample is determined. | 01-17-2013 |
James Hargrove US
| Patent application number | Description | Published |
|---|---|---|
| 20090120212 | NOy and Components of NOy by Gas Phase Titration and NO2 Analysis with Background Correction - A method for quantifying nitrogen-containing species from an atmospheric sample includes introducing the atmospheric sample into an NO | 05-14-2009 |
James M. Hargrove, Riverside, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110027899 | HAZARDOUS CHEMICALS DETECTOR & METHODS OF USE THEREOF - Embodiments of the invention are directed to an apparatus and method for detecting explosive compounds by air sampling followed by subjecting the air sample to a detection method. In one embodiment, a test area is sampled by drawing air from the vicinity of the test area, heating or irradiating the air sample and subjecting the irradiated sample to a detection method. With respect to nitrogen-containing explosive compounds, heating or irradiating the air sample produces nitrogen dioxide (NO | 02-03-2011 |
James M. Hargrove, Alpharetta, GA US
| Patent application number | Description | Published |
|---|---|---|
| 20090157418 | Method And System For Obtaining Geographic Location Information - Location data corresponding to the geographic location of a particular event is obtained in response to information concerning the event and received at a computing device present at the geographic location. The geographic location information is used to produce a map or other visual display corresponding to the event and to the geographic location thus obtained. The geographic location information may be obtained from any appropriate source such as a GPS receiver or wireless system capable of providing geographic location information with accuracy acceptable to the particular application. The GPS receiver or other source of geographic location information may be incorporated into the computing device, or may comprise a separate element operationally interrelated so as to obtain the current geographic location information in response to entering the event information at the computing device. | 06-18-2009 |
James Mcchesney Hargrove, Riverside, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090273785 | ELECTRIC GATED INTEGRATOR DETECTION METHOD & DEVICE THEREOF - A cavity ring down system is optimized to precisely measure trace gases or particles in an air sample by using time sampling detection and multiple-sample averaging resulting in a high signal-to-noise ratio. In one embodiment, a cavity ring down system is programmed to measure the rise time and the fall time of the light level in an optical cavity. The cavity ring down system is programmed to integrate a plurality of sample portions during a rise time and a plurality of sample portions during a fall time (in alternate intervals) to obtain a time constant with no sample present and a time constant with sample present. The measurements are used to calculate trace gases in the air sample. | 11-05-2009 |
| 20130016353 | ELECTRIC GATED INTEGRATOR DETECTION METHOD & DEVICE THEREOF - A cavity ring down system is optimized to precisely measure trace gases or particles in an air sample by using time sampling detection and multiple-sample averaging resulting in a high signal-to-noise ratio. In one embodiment, a cavity ring down system is programmed to measure the rise time and the fall time of the light level in an optical cavity. The cavity ring down system is programmed to integrate a plurality of sample portions during a rise time and a plurality of sample portions during a fall time (in alternate intervals) to obtain a time constant with no sample present and a time constant with sample present. The measurements are used to calculate trace gases in the air sample. | 01-17-2013 |
Jeffrey B. Hargrove, Bancroft, MI US
| Patent application number | Description | Published |
|---|---|---|
| 20090030476 | Methods and Apparatus for Electrical Stimulation of Tissues Using Signals that Minimize the Effects of Tissue Impedance - A tissue stimulation system that generates an electrical tissue stimulation signal configured to reduce tissue impedance and increase depth of signal penetration. The use of leads is dynamically controlled and altered between conducting biopotential voltages, conducting electrical tissue stimulation signals, and grounding, in response to a computational analysis of biopotential data acquired from a region of tissue to be stimulated. | 01-29-2009 |
| 20100204750 | METHOD AND APPARATUS FOR UTILIZING AMPLITUDE-MODULATED PULSE-WIDTH MODULATION SIGNALS FOR NEUROSTIMULATION AND TREATMENT OF NEUROLOGICAL DISORDERS USING ELECTRICAL STIMULATION - A computing device-controlled system is described for the generation of amplitude-modulated pulse-width modulation (AMPWM) signals for use in treating neurological dysfunction via cranial neurostimulation, where the AMPWM signal is specifically designed to minimize the electrical impedance of the tissues of the head. A low-frequency carrier signal is determined for the AMPWM signal by measuring EEG activity at a reference site or sites, generally corresponding with the location of suspected brain dysfunction. Carrier signal frequency is variably related to critical frequency components of the EEG power spectral density, determined from statistical analysis of amplitudes and variability, and dynamically changed as a function of time to prevent entrainment. The AMPWM signal is presented to a subject via a plurality of neurostimulation delivery modes for therapeutic use. | 08-12-2010 |
| 20100324441 | Brain-Related Chronic Pain Disorder Treatment Method and Apparatus - A method for treating brain-related chronic pain disorders in human subjects includes assessing the brain function of a subject suffering from chronic pain, diagnosing a chronic pain-related abnormal brain condition, and mitigating the abnormal brain activity by applying an electrical stimulation signal to tissues corresponding to at least one area of abnormal brain activity. | 12-23-2010 |
| 20110160608 | Brain-related chronic pain disorder diagnosis and assessment method - A method for diagnosing and assessing a brain-related chronic pain disorder. The method includes assessing a subject's brain function, determining the probability that a subject is suffering from chronic pain as a result of an abnormal brain function condition by obtaining a quantitative assessment of the subject's brain function, and making a statistical comparison between the subject's quantitative brain function assessment and either a database of quantitative assessments of the brain functions of normal, healthy individuals, or a database of quantitative assessments of the brain functions of individuals known to have been suffering from chronic pain as a result of the abnormal brain function condition. | 06-30-2011 |
| 20110196693 | Apparatus and method for remote assessment and therapy management in medical devices via interface systems - A remote medical assessment and therapy management apparatus comprising a center user interface, a center computer coupleable with the center user interface. The center computer displays information via the center user interface for use in developing a therapeutic prescription and receives therapeutic control inputs from a user. A remote device includes a medical diagnostic instrument for acquiring biophysical data from a patient, a medical therapeutic instrument that provides a therapy to the patient, and a remote computer that receives diagnostic signals from the diagnostic instrument and transmits therapeutic control signals to the therapeutic instrument. A network interface is connected between the first center computer and the remote computer and transmits diagnostic signals from the remote computer to the center computer and control signals from the center computer to the therapeutic instrument via the remote computer. | 08-11-2011 |
| 20110307029 | Brain stimulation methods for treating central sensitivity - Methods are disclosed for stimulating targeted regions of a brain to alleviate symptoms, treat conditions and/or modify brain activities associated with central sensitivity in a subject. The methods may include selecting a subject suffering from central sensitivity, identifying regions of the brain involved in central sensitivity, and stimulating one or more of these regions of the brain. | 12-15-2011 |
John Hargrove, Honolulu, HI US
| Patent application number | Description | Published |
|---|---|---|
| 20080226147 | Method to provide automated quality feedback to imaging devices to achieve standardized imaging data - Automated image quality assessment algorithms, which perform the functions of locating a region of interest, maximizing the image contrast, and ensuring the region of interest is properly centered in the image. Wherein the region of interest is located by spectral matching filter using a target spectrum obtained from samples of the image itself. | 09-18-2008 |
| 20080226148 | Method of image quality assessment to produce standardized imaging data - Automated image quality assessment methods, which include locating a region of interest, region assessment, contrast assessment, blur assessment, and contaminant detection, on video data and high-resolution imagery. Where the blur assessment is performed without a reference image by dividing the region into non-overlapping block, measuring the wavenumber frequency of the blocks and calculating the ratio of the low frequency to high frequency areas. | 09-18-2008 |
John Taylor Hargrove, Honolulu, HI US
| Patent application number | Description | Published |
|---|---|---|
| 20100025566 | Single spot focus control - The present invention discloses methods and systems for improved focusing of imaging systems for the acquisition of high-quality focused tissue image data. A light emitter (L) aims a focusing light beam (FLB) towards an object of interest (O) so that the focusing light beam (FLB) is at an angle relative to the optical axis (OA) of the imager (I). If the object of interest (O) is out of focus, the focusing light spot (FLS) will appear above or below the focal point in the image (I). The pixel difference between the center of the focusing light spot (FLS) and the focal point indicates the range adjustment value. The range between the imager (I) and the object of interest (O) can then be adjusted according to the range adjustment value using a lookup table or calculations. | 02-04-2010 |
| 20100040263 | Methods for enhancing vascular patterns in cervical imagery - A method of contrast enhancement for improved visualization of diagnostically important tissue structures, such as blood vessels. A texture analysis algorithm is applied to identify regions with a high likelihood of disease. Mathematical morphology operations are applied to identify areas of high and low brightness (intensity). The low intensity areas are then subtracted, and controllably variable amounts of the high intensity areas are added, controlled by a selectable tuning parameter, to produce an image with controllably variable visualization enhancement. | 02-18-2010 |
| 20100130868 | Process and device for detection of precancer tissues with infrared spectroscopy - A process for determining whether tissue is precancer, in which tests discriminating between precancer and benign tissue and between precancer and normal tissue are combined, and tissue that is classified as precancer in both tests is determined to be precancer, in which neither of the tests to be combined is the most selective. Further, a process and device in which certain optimal wavelengths of glycogen, phosphate and lipid, but not protein, discriminate between normal and precancer tissues. | 05-27-2010 |
Joshua Wade Hargrove, Mason, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090065978 | LOAD BEARING INSULATION AND METHOD OF MANUFACTURE AND USE - A building material which comprises cement, cellulose fibers and admixtures is used in the fabrication of bricks, panels or other building products. The manufacture of this building material is accomplished by adding water, paper, a water repellant composed of calcium stearate, and a sodium silicate to act as a fire retardant material. The mixture is then thickened with cement and a second batch of concrete admixtures including a superplasticizer composed of a polyester polyacrylic polyol and an air entraining resin or surfactant to create an air entrained, viscous material for inserting in a mold or extruding through a press to form load bearing and insulating building materials. The resulting product can be formed into blocks or panels and the panels can be coated with polyurethane/polyurea coating to be bullet and blast resistant. | 03-12-2009 |
Levi Hargrove, Chicago, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20130046394 | SYSTEMS AND METHODS OF MYOELECTRIC PROSTHESIS CONTROL - Embodiments of the invention provides myoelectric prosthesis control system that include a gel liner that has a plurality of layers and a plurality of leads at least partially positioned between the plurality of layers. In addition, a plurality of electrodes can be coupled to the leads and portions of the electrodes can also be positioned between the plurality of layers. At least some of the electrodes can include an electrode pole that is configured to contract the residual limb to detect electromyographic signals. | 02-21-2013 |
Mark A. Hargrove, Laurys Station, PA US
| Patent application number | Description | Published |
|---|---|---|
| 20110035318 | CREDIT AND DEBIT CARD TRANSACTION APPROVAL USING LOCATION VERIFICATION - In one embodiment, an online credit or debit card transaction is processed by transmitting purchase information, including price of the purchase item and card number, to the company that issued the card. In addition, the location from which the purchase is made is calculated, e.g., using a GPS device, and the location data is transmitted to the card issuer. The card issuer determines if the purchase meets certain specified approval requirements, such as whether the card holder has sufficient funds, the card has been reported missing, or card holder's personal information is correct. Further, the card issuer compares the location data to a number of predetermined purchase locations specified by the customer. If the location data matches one of the predetermined locations and the specified approval requirements are met, then the purchase is approved. | 02-10-2011 |
Michael Hargrove, Clinton Corners, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20080258225 | MOS TRANSISTORS HAVING HIGH-K OFFSET SPACERS THAT REDUCE EXTERNAL RESISTANCE AND METHODS FOR FABRICATING THE SAME - MOS transistors having high-k spacers and methods for fabricating such transistors are provided. One exemplary method comprises forming a gate stack overlying a semiconductor substrate and forming an offset spacer about sidewalls of the gate stack. The offset spacer is formed of a high-k dielectric material that results in a low interface trap density between the offset spacer and the semiconductor substrate. First ions of a conductivity-determining impurity type are implanted into the semiconductor substrate using the gate stack and the offset spacer as an implantation mask to form spaced-apart impurity-doped extensions. | 10-23-2008 |
| 20090280627 | METHOD OF FORMING STEPPED RECESSES FOR EMBEDDED STRAIN ELEMENTS IN A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor transistor device is provided. The fabrication method begins by forming a gate structure overlying a layer of semiconductor material, such as silicon. Then, spacers are formed about the sidewalls of the gate structure. Next, ions of an amorphizing species are implanted into the semiconductor material at a tilted angle toward the gate structure. The gate structure and the spacers are used as an ion implantation mask during this step. The ions form amorphized regions in the semiconductor material. Thereafter, the amorphized regions are selectively removed, resulting in corresponding recesses in the semiconductor material. In addition, the recesses are filled with stress inducing semiconductor material, and fabrication of the semiconductor transistor device is completed. | 11-12-2009 |
| 20100207176 | Metal oxide semiconductor devices having doped silicon-compromising capping layers and methods for fabricating the same - Methods are provided for forming a semiconductor device comprising a semiconductor substrate. In accordance with an exemplary embodiment, a method comprises the steps of forming a high-k dielectric layer overlying the semiconductor substrate, forming a metal-comprising gate layer overlying the high-k dielectric layer, forming a doped silicon-comprising capping layer overlying the metal-comprising gate layer, and depositing a silicon-comprising gate layer overlying the doped silicon-comprising capping layer. | 08-19-2010 |
| 20100213553 | METAL OXIDE SEMICONDUCTOR DEVICES HAVING BURIED GATE CHANNELS AND METHODS FOR FABRICATING THE SAME - Methods for forming a semiconductor device comprising a semiconductor substrate are provided. In accordance with an exemplary embodiment, a method comprises forming a channel layer overlying the semiconductor substrate, forming a channel capping layer having a first surface overlying the channel layer, oxidizing the first surface of the channel capping layer, and depositing a high-k dielectric layer overlying the channel capping layer. | 08-26-2010 |
| 20100213555 | METAL OXIDE SEMICONDUCTOR DEVICES HAVING CAPPING LAYERS AND METHODS FOR FABRICATING THE SAME - Methods for forming a semiconductor device comprising a semiconductor substrate are provided. In accordance with an exemplary embodiment, a method comprises forming a silicon oxide layer overlying the semiconductor substrate, forming a metal oxide gate capping layer overlying the silicon oxide layer, depositing a first metal gate electrode layer overlying the metal oxide gate capping layer, and removing a portion of the first metal gate electrode layer and the metal oxide gate capping layer to form a gate stack. | 08-26-2010 |
| 20110095341 | METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS - Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. Methods for fabricating a semiconductor device include providing a semiconductor substrate having an active region and a shallow trench isolation (STI) region. Epitaxial layer is formed on the active region to define a lateral overhang portion in a divot at the active region/STI region interface. A gate stack is formed having a first gate stack-forming layer overlying the semiconductor substrate. First gate stack-forming layer includes a non-conformal layer of metal gate-forming material which is directionally deposited to form a thinned break portion just below the lateral overhang portion. After the step of forming the gate stack, a first portion of the non-conformal layer is in the gate stack and a second portion is exposed. The thinned break portion at least partially isolates the first and second portions during subsequent etch chemistries. | 04-28-2011 |
| 20110121397 | METHODS FOR PROTECTING GATE STACKS DURING FABRICATION OF SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES FABRICATED FROM SUCH METHODS - Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods are provided. Methods for fabricating a semiconductor device include providing a semiconductor substrate having an active region and a shallow trench isolation (STI) region. Epitaxial layer is formed on the active region to define a lateral overhang portion in a divot at the active region/STI region interface. A gate stack is formed having a first gate stack-forming layer overlying the semiconductor substrate. First gate stack-forming layer includes a non-conformal layer of metal gate-forming material which is directionally deposited to form a thinned break portion just below the lateral overhang portion. After the step of forming the gate stack, a first portion of the non-conformal layer is in the gate stack and a second portion is exposed. The thinned break portion at least partially isolates the first and second portions during subsequent etch chemistries. | 05-26-2011 |
| 20110169083 | SEMICONDUCTOR TRANSISTOR DEVICE STRUCTURE WITH BACK SIDE SOURCE/DRAIN CONTACT PLUGS, AND RELATED MANUFACTURING METHOD - A method of fabricating a semiconductor device with back side conductive plugs is provided here. The method begins by forming a gate structure overlying a semiconductor-on-insulator (SOI) substrate. The SOI substrate has a support layer, an insulating layer overlying the support layer, an active semiconductor region overlying the insulating layer, and an isolation region outboard of the active semiconductor region. A first section of the gate structure is formed overlying the isolation region and a second section of the gate structure is formed overlying the active semiconductor region. The method continues by forming source/drain regions in the active semiconductor region, and thereafter removing the support layer from the SOI substrate. Next, the method forms conductive plugs for the gate structure and the source/drain regions, where each of the conductive plugs passes through the insulating layer. | 07-14-2011 |
| 20110169084 | SEMICONDUCTOR TRANSISTOR DEVICE STRUCTURE WITH BACK SIDE GATE CONTACT PLUGS, AND RELATED MANUFACTURING METHOD - A method of fabricating a semiconductor device with back side conductive plugs is provided here. The method begins by forming a gate structure overlying a semiconductor-on-insulator (SOI) substrate. The SOI substrate has a support layer, an insulating layer overlying the support layer, an active semiconductor region overlying the insulating layer, and an isolation region outboard of the active semiconductor region. A first section of the gate structure is formed overlying the isolation region and a second section of the gate structure is formed overlying the active semiconductor region. The method continues by forming source/drain regions in the active semiconductor region, and thereafter removing the support layer from the SOI substrate. Next, the method forms conductive plugs for the gate structure and the source/drain regions, where each of the conductive plugs passes through the insulating layer. | 07-14-2011 |
| 20110254092 | ETSOI CMOS ARCHITECTURE WITH DUAL BACKSIDE STRESSORS - A semiconductor is formed on an ETSOI layer, the thin Si layer of an ETSOI substrate, with enhanced channel stress. Embodiments include semiconductor devices having dual stress liners on the back surface of the ETSOI layer. An embodiment includes forming an ETSOI substrate comprising an extra thin layer of Si on a backside substrate with an insulating layer, e.g., a BOX, there between, forming a semiconductor device on the Si surface, removing the backside substrate, as by CMP and the insulting layer, as by wet etching, and forming a stress liner on the backside of the remaining Si layer opposite the semiconductor device. The use of stress liners on the backside of the ETSOI layer enhances channel stress without modifying ETSOI semiconductor process flow. | 10-20-2011 |
| 20120139015 | METAL SEMICONDUCTOR ALLOY CONTACT WITH LOW RESISTANCE - A method of forming a semiconductor device is provided that includes forming a gate structure on a channel portion of a semiconductor substrate, forming an interlevel dielectric layer over the gate structure, and forming a opening through the interlevel dielectric layer to an exposed surface of the semiconductor substrate containing at least one of the source region and the drain region. A metal semiconductor alloy contact is formed on the exposed surface of the semiconductor substrate. At least one dielectric sidewall spacer is formed on sidewalls of the opening. An interconnect is formed within the opening in direct contact with the metal semiconductor alloy contact. | 06-07-2012 |
Michael J. Hargrove, Windsor Locks, CT US
| Patent application number | Description | Published |
|---|---|---|
| 20110155347 | ECONOMIZER WATER RECIRCULATION SYSTEM FOR BOILER EXIT GAS TEMPERATURE CONTROL IN SUPERCRITICAL PRESSURE BOILERS - A fluid recirculation system includes an arrangement of a flow control valve located to receive a flow of fluid from an inlet. The system further comprises an economizer inlet mixing device located to receive the flow of hotter fluid from the arrangement of the flow control valve and from a cooler feedwater stream. An economizer inlet mixing device located upstream of an economizer in a supercritical pressure boiler includes a sparger assembly through which a flow of fluid from the waterwall outlet is received, an inlet through which a flow of fluid from a feed stream is received, and a wave breaker assembly through which an outlet stream from the economizer inlet mixing device is directed. A method of increasing and controlling the temperature of a flue gas exiting an economizer in a supercritical pressure boiler includes receiving at least a flow of fluid from a fluid stream from a furnace waterwall outlet, combining at least a portion of the received flow of fluid with a feedwater stream, and directing the combined received flow of fluid and feedwater stream to an economizer inlet to decrease the economizer heat absorption. | 06-30-2011 |
Mike Hargrove, Clinton Corners, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20090142891 | MASKLESS STRESS MEMORIZATION TECHNIQUE FOR CMOS DEVICES - In one embodiment, the present invention provides a method of manufacturing a semiconducting device that includes providing a silicon containing substrate having PFET device and NFET device, wherein the NFET device includes an amorphous silicon containing region; depositing a tensile strain silicon nitride layer atop the NFET device and the PFET device, wherein the silicon nitride tensile strain layer induces a tensile strain in a channel of the NFET device region; annealing to crystallize the amorphous silicon containing region, wherein the tensile strain silicon nitride layer positioned atop the PFET device confines oxygen within a channel positioned within the silicon containing substrate underlying the PFET device, wherein the oxygen within the channel shifts a threshold voltage of the PFET device towards a valence band of silicon of the silicon containing substrate; and removing the tensile strain silicon nitride layer. | 06-04-2009 |
Pamela L. Hargrove, Cary, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20120165426 | NON-HOMOGENEOUS READY-MIX JOINT COMPOUND - A wallboard joint compound includes a base joint compound having a homogeneous, paste-like blend of water and at least one of a filler, a binder, a thickener, a suspending agent, a biocide, a preservative, a mineral filler and expanded perlite; and an additive discretely added to the base joint compound to be available for use once mixed into the base joint compound just prior to application of the wallboard joint compound by a user. | 06-28-2012 |
Phillip K. Hargrove, Olathe, KS US
| Patent application number | Description | Published |
|---|---|---|
| 20110145037 | Document management method and apparatus to process a workflow task by parallel or serially processing subtasks thereof - A method to facilitate workflow processing in a business enterprise comprising identifying a principal task in a workflow process; splitting the principal task into two or more subtasks according actual practices of the business enterprise wherein the splitting includes determining which subtasks are to be created, which are to be parallel-processed and which are to be serially-processed; naming the subtasks; specifying an order of completion of the subtasks, i.e., parallel-processed or serially-processed; assigning the subtasks to one or more users for processing; notifying the users of subtask assignment; providing an indication of status of completion of the subtasks; reporting completion of the subtasks to the task manager; optionally altering or modifying the preceding steps; completing the principal task according to results of the subtasks; enabling a user to check status of subtasks; and releasing the principal task in a workflow of other tasks. A corresponding system is also disclosed. | 06-16-2011 |
Thomas Hargrove, Kirkland, WA US
William L. Hargrove, Kihei, HI US
| Patent application number | Description | Published |
|---|---|---|
| 20120237420 | Absorber - An absorber is provided which utilizes a solvent froth to absorb a selected component, such as CO2 for example, from a flowing gas stream, such as flue gas from a fossil fuel power plant, for example. In one embodiment, a flooded tube gas absorber utilizes a bulkhead plate extending across a reaction chamber. The plate carries a plurality of vertical absorption tubes, each carrying a plurality of spaced apart screens. The incoming gas stream flows downwardly and at equal velocities through the tubes. Solvent is injected downwardly into the tubes. The screen array forms a froth and rapidly and repeatedly bursts the froth bubbles, forming a rapidly changing absorption surface. A second embodiment uses full diameter screens without a bulkhead plate. An option is to use ridge shaped screens to achieve solvent pulsing, increasing efficiency. Both vertical and horizontal reaction chambers are disclosed. | 09-20-2012 |