Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Hamilton, WA
Alistair Hamilton, Sammamish, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100044157 | Convertible point-of-sale checkout terminal - A convertible checkout terminal includes a housing having a window and a data capture device for capturing through the window data associated with products to be checked out at the terminal, a customer interface supported by the housing for enabling a customer to interact with the terminal in a self-service mode of operation, a clerk interface supported by the housing for enabling a clerk to interact with the terminal in a full-service mode of operation, and a mode selector for selecting either the self-service mode in which the customer interface is operational, or the full-service mode in which the clerk interface is operational. | 02-25-2010 |
| 20100146235 | ISOLATING RECEIVED INFORMATION ON A LOCKED DEVICE - Quarantining data received while a computing device is locked. While the computing device is locked, content items such as images, notifications, voice memos, telephone numbers, and the like are stored in a first memory area. The content items are transferred to a second memory area, separate from the first memory area, based on transfer criteria associated with the content items. For example, images may be automatically uploaded to a web page after the computing device is unlocked, while a mail program executes to display any messages received while the display has been locked. In some embodiments, the user inputs the content items into a locked mobile computing device and further provides the transfer criteria for the content items. | 06-10-2010 |
| 20100250794 | REMOVABLE ACCESSORY FOR A COMPUTING DEVICE - An accessory computing device or display detachable from another computing device such as a mobile computing device. The accessory computing device displays data from the mobile computing device including notifications relating to electronic mail messages, voice mail messages, stock prices, sports scores, etc. A user interacts with the accessory computing device to control the mobile computing device by, for example, replying to messages, controlling a game executing on the mobile computing device, or silencing a ringer on the mobile computing device. In some embodiments, a plurality of the accessory computing devices interact with the same mobile computing device (e.g., in a multi-player game or device location tracking application executing on the mobile computing device). | 09-30-2010 |
Bryan West Hamilton, Vancouver, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100242851 | Systems and Methods for Aquatic Electrified Barriers - A flexible aquatic species barrier having a multiplicity of pulsators, each pulsator further comprising an anode lead, a cathode lead, and an potential difference generator, where each pulsator is proximately attached to a section of net, each section net comprising a anode conductive braid, a cathode conductive braid, and a net interposed between the anode conductive braid and the cathode conductive braid, and where the anode lead of the pulsator is connected to the anode conductive braid, and where the cathode lead of the pulsator is connected to the cathode conductive braid; whereby when one or more of the pulsators are activated, a potential difference is created between the anode conductive braid and the cathode conductive braid; such that when current flows between the anode conductive braid and the cathode conductive braid an aquatic species is repelled from the net. | 09-30-2010 |
Colleen Hamilton, Kirkland, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100082505 | SOFTWARE AND HARDWARE RESOURCE CAPACITY MANAGEMENT - A system is disclosed that includes an interface to receive a resource governance rule applicable to one or more hardware resources supporting a monitored software application. The system includes utilization logic to measure usage of a particular hardware resource by the monitored software application. An available utilization of the particular hardware resource is determined based on the resource governance rule, and a total utilization of the particular hardware resource is also determined. One or more utilization metrics are determined based on historical usage of the particular hardware resource as compared to a governed capacity and a non-governed capacity available to the particular hardware resource. The system also includes recommendation logic to determine a recommended action to be taken with respect to the monitored software application. | 04-01-2010 |
| 20120102423 | VISUALIZATION FOR RESOURCE CAPACITY MANAGEMENT - A method includes displaying a plurality of user modifiable utilization views of a monitored software application, where each of the plurality of user modifiable utilization views is customizable to fit a domain of analysis by identifying one or more resource types of multiple resource components. Each of the plurality of user modifiable utilization views is displayed in one more graphical user interfaces. The method includes determining a desired ordering of the one or more resource types within a hierarchy of types and filtering one or more details of the multiple resource components to create a customized view. A user can navigate between each of the plurality of user modifiable utilization views to dynamically construct related target analysis views including filtered details across one or more other domains of analysis. | 04-26-2012 |
Darlene Hamilton, Lacey, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110038195 | METHOD FOR RESETTING A RESISTIVE CHANGE MEMORY ELEMENT - A method of resetting a resistive change memory element is disclosed. The method comprises performing a series of programming operations—for example, a programming pulse of a predetermined voltage level and pulse width—on a resistive change memory element in order to incrementally increase the resistance of the memory element above some predefined threshold. Prior to each programming operation, the resistive state of the memory element is measured and used to determine the parameters used in that programming operation. If this measured resistance value is above a first threshold value, the memory element is determined to already be in a reset state and no further programming operation is performed. If this measured resistance value is below a second threshold value, this second threshold value being less than the first threshold value, a first set of programming parameters are used within the programming operation. If this initial value is above the second threshold value but below the first threshold value, a second set of programming parameters are used within the programming operation. | 02-17-2011 |
| 20110051499 | METHOD FOR ADJUSTING A RESISTIVE CHANGE ELEMENT USING A REFERENCE - A method of adjusting a resistive change element using a reference is disclosed. The method comprises inspecting a resistive change element to determine a first state; comparing the first state to a reference wherein said reference provides stimulus parameters corresponding to a transition from the first state to a second state; and applying the stimulus parameters to the resistive change element. A resistive change memory cell array is also disclosed. | 03-03-2011 |
| 20120056149 | METHODS FOR ADJUSTING THE CONDUCTIVITY RANGE OF A NANOTUBE FABRIC LAYER - Methods for adjusting and/or limiting the conductivity range of a nanotube fabric layer are disclosed. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via wet chemistry techniques. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via plasma treatment. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via CVD treatment. In some aspects, the conductivity of a nanotube fabric layer is adjusted by functionalizing the nanotube elements within the fabric layer via an inert ion gas implant. | 03-08-2012 |
Darlene Hamilton, Lyle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100103732 | CONTROLLING AC DISTURBANCE WHILE PROGRAMMING - A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation. | 04-29-2010 |
| 20110235412 | CONTROLLING AC DISTURBANCE WHILE PROGRAMMING - A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation. | 09-29-2011 |
Darlene Hamilton, White Salmon, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090103357 | FAST SINGLE PHASE PROGRAM ALGORITHM FOR QUADBIT - Methods of rapidly programming a wordline of multi-level flash memory cells comprising memory cell element-pairs having three or more data levels per bit or element corresponding to three or more threshold voltages are provided. An interactive program algorithm rapidly programs the elements of the wordline of memory cells in a learn phase and a single core programming phase. In one embodiment, each wordline comprises learn element-pairs first programmed to provide learn drain voltages for programming core element-pairs along the wordline having the same program pattern of data levels. A set comprising one or more program patterns is chosen to correspond with each program level used on the wordline. The learn element-pairs are programmed to determine a learned program drain voltage for each program level. This learned program drain voltage essentially provides a wordline and program level specific program characterization of the Vd required for the remaining elements of that wordline. | 04-23-2009 |
| 20090154235 | REDUCED STATE QUADBIT - A reduced state memory device and methods of forming and programming multi-level flash memory cell element-pairs of the device, each element configured to store a blank level or two or more program levels are provided. In one embodiment, the reduced state memory device comprises a component configured to store in the memory cell element-pairs one pattern combination of a plurality of program pattern combinations comprising two blank levels, two program levels, and one blank level and one program level, the levels differing by less than a predetermined value. In one embodiment, a method of forming a memory device comprises forming at least one memory device of a multi-level flash memory array, each memory cell comprising two or more memory elements, each memory element configured to store three or more levels, and excluding one or more program pattern combinations that can be stored in the at least one memory cell. | 06-18-2009 |
Darlene Hamilton, Husum, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090161462 | CONTROLLING AC DISTURBANCE WHILE PROGRAMMING - A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation. | 06-25-2009 |
Darlene G. Hamilton, Lyle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090161466 | EXTENDING FLASH MEMORY DATA RETENSION VIA REWRITE REFRESH - Providing for extended data retention of flash memory devices by program state rewrite is disclosed herein. By way of example, a memory cell or group of memory cells can be evaluated to determine a program state of the cell(s). If the cell(s) is in a program state, as opposed to a natural or non-programmed state, a charge level, voltage level and/or the like can be rewritten to a default level associated with the program state, without erasing the cell(s) first. Accordingly, conventional mechanisms for refreshing cell program state that require rewriting and erasing, typically degrading storage capacity of the memory cell, can be avoided. As a result, data stored in flash memory can be refreshed in a manner that mitigates loss of memory integrity, providing substantial benefits over conventional mechanisms that can degrade memory integrity at a relatively high rate. | 06-25-2009 |
Darlene G. Hamilton, White Salmon, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080279014 | MULTI-PHASE WORDLINE ERASING FOR FLASH MEMORY - Erasing wordlines at the same time can cause undesirable results because some wordlines are affected by electromagnetic waves of other wordlines. However, other wordlines are not affected because they are next to contacts. Therefore, it can be beneficial to erase wordlines in a multi-phase sequence that allows for erasing wordlines without an impact from other wordlines. | 11-13-2008 |
Darlene Gay Hamilton, Husum, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100135082 | MOVING PROGRAM VERIFY LEVEL FOR PROGRAMMING OF MEMORY - Systems, methods, and devices that employ moving program verify levels to facilitate programming data to memory elements in a memory component are presented. A program component can employs a specified number of program verify (PV) levels where a first program pulse is applied to a selected group of memory elements to facilitate verifying the cells to pass the first PV level. The PV level can be moved to a next PV level that is a higher charge level than or equal to the first PV level, and a subset of the group of cells that are below the next PV level are selected and a next program pulse is applied to the subset of cells to facilitate verifying the cells to pass the next PV level. The moving PV level process can continue until the group of memory elements is verified to pass the target PV level. | 06-03-2010 |
Darlene Gay Hamilton, White Salmon, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100128521 | APPLYING NEGATIVE GATE VOLTAGE TO WORDLINES ADJACENT TO WORDLINE ASSOCIATED WITH READ OR VERIFY TO REDUCE ADJACENT WORDLINE DISTURB - Systems, methods, and devices that facilitate applying a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected during a read or verify operation to facilitate reducing adjacent wordline disturb are presented. A memory component can comprise an optimized operation component that can apply a predefined negative gate voltage to wordlines adjacent to a selected wordline associated with a memory cell selected for a read or verify operation, based at least in part on predefined operation criteria, to facilitate reducing adjacent wordline disturb in the selected memory cell to facilitate reducing a shift in the voltage threshold and maintain a desired operation window. The optimized operation component optionally can include an evaluator component that can facilitate determining whether a negative gate voltage applied to adjacent wordlines is to be adjusted to facilitate reducing adjacent wordline disturb below a predetermined threshold amount. | 05-27-2010 |
| 20100128524 | MULTI-PHASE PROGRAMMING OF MULTI-LEVEL MEMORY - Systems, methods, and devices that facilitate multi-phase programming of data in a memory component are presented. Received data is programmed to a memory using multiple programming phases based on a predefined program pattern. A program learn is performed by varying drain voltages, as desired, to facilitate determining respective drain voltages related to specified subgroups associated with respective data levels for a first programming phase. A first programming phase is performed using learned drain voltages as initial drain voltages where drain voltage levels are varied during each program pulse to facilitate programming memory cells to respective intrinsic verify voltage levels based on respective data levels. A second programming phase is performed using ending drain voltages from the first programming phase as initial drain voltages where gate voltage levels are varied during each program pulse to facilitate programming memory cells to respective final verify voltage levels based on respective data levels. | 05-27-2010 |
| 20100142284 | DETERMINISTIC-BASED PROGRAMMING IN MEMORY - Systems, methods, and devices that employ deterministic programming techniques to facilitate efficient programming of memory elements in a memory are presented. A memory component comprises an optimized program component that can divide a group of memory elements selected for programming into a desired number of subgroups based in part on respective current threshold voltage levels (Vt) of the memory elements; apply respective program pulses to each memory element in respective subgroups; measure respective Vt levels of memory elements after the pulse; and verify as passed memory elements that meet a target Vt. The optimized program component can divide a subset of memory elements that do not meet the target Vt into a desired number of subgroups based in part on respective current Vt levels of the memory elements and can continue to perform this deterministic programming process until all memory elements are verified as passing for the target Vt. | 06-10-2010 |
James R. Hamilton, Seattle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20110149963 | DISTRIBUTED ROUTING ARCHITECTURE - A hierarchical distributed routing architecture including at least two levels, or layers, for receiving, processing and forwarding data packets between network components is provided. The core level router components receive an incoming packet from a network component and identify a distribution level router component based on processing a subset of the destination address associated with the received packet. The distribution level router components receive a forwarded packet and forward the packet to a respective network. The mapping, or other assignment, of portions of the FIB associated with the distributed routing environment is managed by a router management component. | 06-23-2011 |
| 20110149964 | DISTRIBUTED ROUTING ARCHITECTURE - A hierarchical distributed routing architecture including at least three levels, or layers, for receiving, processing and forwarding data packets between network components is provided. The core level router components receive an incoming packet from a network component and identify a distribution level router component based on processing a subset of the destination address associated with the received packet. The distribution level router components that receiving a forwarded packet and identify a transit level router component based a second processing of at least a subset of the destination address associated with the received packet. The transit level router components receive the forwarded packet and forward the packet to a respective network. The mapping, or other assignment, of portions of the FIB associated with the distributed routing environment is managed by a router management component. | 06-23-2011 |
| 20110149965 | DISTRIBUTED ROUTING ARCHITECTURE - A hierarchical distributed routing architecture including at least three levels, or layers, for receiving, processing and forwarding data packets between network components is provided. The core level router components receive an incoming packet from a network component and identify a distribution level router component based on processing a subset of the destination address associated with the received packet. The distribution level router components that receiving a forwarded packet and identify a transit level router component based a second processing of at least a subset of the destination address associated with the received packet. The distribution level router components maintain address routing information a first and second memory. The transit level router components receive the forwarded packet and forward the packet to a respective network. The mapping, or other assignment, of portions of the FIB associated with the distributed routing environment is managed by a router management component. | 06-23-2011 |
| 20110238546 | MANAGING COMMITTED PROCESSING RATES FOR SHARED RESOURCES - Commitments against various resources can be dynamically adjusted for customers in a shared-resource environment. A customer can provision a data volume with a committed rate of Input/Output Operations Per Second (IOPS) and pay only for that commitment (plus any overage), for example, as well as the amount of storage requested. The customer can subsequently adjust the committed rate of IOPS by submitting an appropriate request, or the rate can be adjusted automatically based on any of a number of criteria. Data volumes for the customer can be migrated, split, or combined in order to provide the adjusted rate. The interaction of the customer with the data volume does not need to change, independent of adjustments in rate or changes in the data volume, other than the rate at which requests are processed. | 09-29-2011 |
| 20110238857 | COMMITTED PROCESSING RATES FOR SHARED RESOURCES - Customers of a shared-resource environment can provision resources in a fine-grained manner that meets specific performance requirements. A customer can provision a data volume with a committed rate of Input/Output Operations Per Second (IOPS) and pay only for that commitment (plus any overage), and the amount of storage requested. The customer will then at any time be able to complete at least the committed rate of IOPS. If the customer generates submissions at a rate that exceeds the committed rate, the resource can still process at the higher rate when the system is not under pressure. Even under pressure, the system will deliver at least the committed rate. Multiple customers can be provisioned on the same resource, and more than one customer can have a committed rate on that resource. Customers without committed or guaranteed rates can utilize the uncommitted portion, or committed portions that are not being used. | 09-29-2011 |
James Robert Hamilton, Bellevue, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100185843 | HARDWARE ENCRYPTING STORAGE DEVICE WITH PHYSICALLY SEPARABLE KEY STORAGE DEVICE - Storage devices can provide for hardware encryption and decryption of data stored by them. The hardware cryptographic functions can be applied with reference to cryptographic information of a communicationally, and physically, separable key device. Disconnection of the separable key device can render encrypted data inaccessible. Destruction of the separable key device can result in virtual destruction of the encrypted data. The cryptographic information on the separable key device can be provided by a storage device manufacturer, or by a provisioning computing device. The separable key device can be directly communicationally coupled to a provisioning computing device or it can establish a secure communication tunnel with the provisioning device through a computing device to which the separable key device is communicationally coupled. Cryptographic information can be provided by, and deleted from, the provisioning computing device prior to completion of the booting of that device. | 07-22-2010 |
| 20100325736 | REMOTE ACCESS CONTROL OF STORAGE DEVICES - An access control device can be communicationally coupled to a storage device and can control access thereto. The access control device can comprise information, such as identities of authorized entities, to enable the access control device to independently determine whether to provide access to an associated storage device. Alternatively, the access control device can comprise information to establish a secure connection to an authorization computing device and the access control device can implement the decisions of the authorization computing device. The access control device can control access by instructing a storage device to execute specific firmware instructions to prevent meaningful responses to data storage related requests. The access control device can also comprise storage-related cryptographic information utilized by the storage device to encrypt and decrypt data. In such a case, the access control device can control access by not releasing the storage-related cryptographic information to the storage device. | 12-23-2010 |
Jason S. Hamilton, Kirkland, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080317240 | ALPHA CHARACTER SUPPORT AND TRANSLATION IN DIALER - The innovation supports the ability to map alpha characters entered directly into the dialer application of a smartphone. These alpha characters can be entered via a smartphone keyboard (e.g., QWERTY keyboard) and converted to the appropriate digits as mapped to a conventional telephone keypad. The resultant numerical digits can be used to prompt a network call. Additionally, the innovation can be used during an active call to respond to prompts that traditionally require 12-key mappings. This innovation allows a user to both dial a number directly via a smartphone keyboard, and filter contacts by name, in a non-modal manner. | 12-25-2008 |
Judd Hamilton, Seattle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080296541 | CHEMICALLY BONDED CERAMIC RADIATION SHIELDING MATERIAL AND METHOD OF PREPARATION - A composition of matter and method of forming a radiation shielding member at ambient temperatures in which the composition of matter includes a ‘cold-fired’ chemically bonded oxide-phosphate ceramic cement matrix; with one or more suitably prepared and distributed radiation shielding materials dispersed in the ‘cold-fired’ chemically bonded oxide-phosphate ceramic cement matrix. | 12-04-2008 |
Judd Douglas Hamilton, Seattle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080206128 | Process for recycling industrial waste magnesium oxide/magnesium hydroxide for use in magnesium oxide based cement/concrete and method of preparation - The inventor's discovery of recyclable Industrial Waste Magnesium Oxide/Magnesium Hydroxide materials, which are currently available from numerous magnesium based industrial processes/sources, as well as the identification of various state-of-the-art, contemporary and/or advanced materials dehydration and separation technologies, is intended to advance the cost-effective, eco-friendly, superior quality usefulness of Magnesium Oxide based cement concrete. | 08-28-2008 |
Justin Hamilton, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090327236 | VISUAL QUERY SUGGESTIONS - Systems, computer-implemented methods, and computer-readable media for presenting video search results for query suggestions are provided. A search query is received from a user. One or more query suggestions related to the search query are determined. One or more video items or images relevant to the one or more query suggestions are accessed. One or more image representations for the one or video items or images relevant to the one or more query suggestions are displayed to the user who input the original search query. | 12-31-2009 |
Justin D. Hamilton, Bellevue, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20120106853 | IMAGE SEARCH - Image search techniques are described. In one or more implementations, images in a search result are ordered based at least in part on similarity of the images, one to another. The search result having the ordered images is provided in response to a search request. | 05-03-2012 |
| 20120110453 | Display of Image Search Results - Techniques involving display of image search results are described. In one or more implementations, an image search result is displayed having a plurality of images. Responsive to selection of a particular one of the images, a filmstrip is displayed having a contiguous series of representations of at least a portion of the plurality of images, at least one of which is of the particular image, the particular image is displayed as disposed proximal to metadata associated with the image, and at least a portion of a webpage from which the particular image was obtained is displayed. | 05-03-2012 |
Justin David Hamilton, Bellevue, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20120113148 | DYNAMIC IMAGE RESULT STITCHING - Methods and systems for compiling image results into compilation images so that multiple image results may be downloaded via a single browser-download connection are provided. An image search request is received and a plurality of image results that satisfy the image search request are determined. At least a portion of the image results determined to satisfy the search request are dynamically stitched together to create a compilation image. Upon receiving an image download request for a satisfying image result, the compilation image is returned to the user's browser rather than a single thumbnail image. In this way, a plurality of image results is returned via a single browser-download connection and the latency in returning a large number of request-satisfying image results is decreased. | 05-10-2012 |
Keith S. Hamilton, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080307436 | Distributed publish-subscribe event system with routing of published events according to routing tables updated during a subscription process - A publish-subscribe event system for a set of communicating machines, where when a machine receives an event, whether a published event or a subscription event, it publishes locally the received event by an inter-process communication in the machine. In this way, the event is made available to other processes on the machine. For some embodiments, an event is published locally in a machine by placing it in shared memory. During a subscription process, each machine updates its routing table as subscription events are received. When a published event is received by a machine, it is published locally by the inter-process communication in the machine, where the one or more subscribing applications on the machine may have access to it. The received published event is also routed to other connected machines according to the machine's routing table. Other embodiments are described and claimed. | 12-11-2008 |
Kris P. Hamilton, Bellingham, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20080229704 | ARCHITECTURAL MEMBRANE STRUCTURES AND METHODS FOR PRODUCING THEM - An architectural membrane structure preferably includes an aerogel material disposed, for example, between two outer layers. The aerogel can be in monolithic or granular form or can be present in an aerogel composite. A method for manufacturing an architectural membrane structure includes securing an insert, e.g., an aerogel blanket, composite or granular aerogel, between a first and second layer. The architectural membrane structure can be used as a tensioned panel in envelopes such as roofing, overhangs, canopies or in other architectural or structural fabric applications. | 09-25-2008 |
Nicole A. Hamilton, Redmond, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090150409 | SYSTEM AND METHOD FOR AUTOMATICALLY CREATING A MEDIA ARCHIVE FROM CONTENT ON A RECORDING MEDIUM - A media player for creating a media archive may include a media reader to read media content from a recording medium inserted into the media reader. The media player may also include an archival component to store the media content in a storage medium. In one embodiment, the media player includes a playback component to play back the media content from the storage medium concurrently with the storage of the media content by the archival component. | 06-11-2009 |
Robert T. Hamilton, Seattle, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20100300329 | FIBER CEMENT BOARD WITH MODIFIED FIBER - A building material product comprising a cementitious binder, an aggregate and cellulose reinforcing fibers wherein the cellulose reinforcing fibers have been treated with cationic or nonionic oil. The resulting fiber when included in a fiber cement composite results in improved deflection of the composite at peak loading as well as improved impact strength while maintaining overall board strength. | 12-02-2010 |
| 20100300330 | FIBER CEMENT BOARD WITH MODIFIED FIBER - A building material product comprising a cementitious binder, an aggregate and cellulose reinforcing fibers wherein the cellulose reinforcing fibers have been treated with oil which is bound to the fiber by a retention aid. The resulting fiber when included in a fiber cement composite results in improved deflection of the composite at peak loading as well as improved impact strength while maintaining overall board strength. | 12-02-2010 |
| 20100307702 | Meterable Fiberous Material - A particle or particles of cellulosic wood pulp fibers having a top and bottom face and a hexagonal perimeter, and methods of using it. | 12-09-2010 |
Scott Robert Hamilton, Spokane, WA US
| Patent application number | Description | Published |
|---|---|---|
| 20090322084 | Energy Systems, Energy Devices, Energy Utilization Methods, and Energy Transfer Methods - Energy systems, energy devices, energy utilization methods, and energy transfer methods are described. In one arrangement, energy utilization methods include providing first energy from a power grid to an induction generator at a first moment in time; using the induction generator and the first energy from the power grid, charging an energy storage device; using second energy from the energy storage device, powering a motor causing the induction generator to generate third energy during a second moment in time; and providing the third energy to the power grid. Other arrangements are described. | 12-31-2009 |
| 20100006356 | Electric Vehicle Charging Methods, Battery Charging Methods, Electric Vehicle Charging Systems, Energy Device Control Apparatuses, and Electric Vehicles - Electric vehicle charging methods, battery charging methods, electric vehicle charging systems, energy device control apparatuses, and electric vehicles are described. In one arrangement, an electric vehicle charging method includes receiving information regarding charging of an electric vehicle with energy from an electric power grid, determining an amount of energy stored by an energy storage device coupled to the electric power grid, and controlling a transfer of the energy stored by the energy storage device to the electric power grid using the information regarding the charging of the electric vehicle. Other arrangements are described. | 01-14-2010 |