Patent application number | Description | Published |
20080196936 | Base Unit for Dual Wiring System - A base unit suitable to improve easy exchangeability of a function unit in a dual wiring system is provided. The base unit is mounted in a wall surface of a structure, and connected to both of an electric power line and an information line previously installed in the structure. The base unit has a module port, which is detachably connected to a module connector of the function unit to simultaneously establish both of supplying the electric power from the base unit to the function unit, and making a signal transmission between the base unit and the function unit, thereby enabling the function unit to provide at least one of functions for supplying electric power from the electric power line, outputting information from the information line and inputting information into the information line when connected with the base unit. | 08-21-2008 |
20090013262 | SYSTEMS AND METHODS FOR PROVIDING DOCUMENT COLLABORATION USING A FRONT AND BACK FRAMEWORK - A document server system is described that comprises a plurality of electronic documents, plurality of messages relating to the electronic documents and an interface server for providing a client user interface. The client user interface provides a front user interface configured to display an electronic document to collaborators of the document. The front user interface includes a front switching input. Activation of the front switching input causes the client user interface to switch from the front user interface to a back user interface. The client user interface provides the back user interface configured to display one or more of the plurality of messages for each individual user that is related to the document on the front user interface. The back user interface includes a back switching input. Activation of the back switching input causes the client user interface to switch from the back user interface to the front user interface. | 01-08-2009 |
20090051505 | Function Unit for Dual Wiring System - A function unit having easy exchangeability in a dual wiring system is provided. The function unit is detachably connected to a gate device mounted in a wall surface of a structure, and connected to both of an electric power line and an information line previously installed in the structure. The function unit has at least one of functions for supplying electric power from the electric power line, outputting information from the information line and inputting information into the information line when connected with the gate device. The function unit has a module connector, which is configured to simultaneously establish both of supplying the electric power from the gate device to the function unit, and making a signal transmission between the gate device unit and the function unit when connected to a module port formed at the gate device. To improve function expandability, an additional function unit may be detachably connected to the function unit. | 02-26-2009 |
20090110407 | Dual Wiring System - A dual wiring system with improved function expandability is provided. A base unit is mounted in a wall surface of a structure, and connected to both of an electric power line and an information line previously installed in the structure. Each of function units has at least one of functions for providing electric power from the electric power line, outputting information from the information line and inputting information into the information line when connected with the base unit. The base unit is detachably connected with one of the function units by use of a joining member, so that electric power is supplied from the base unit to the function unit through a power transmission means, and a signal transmission between the base unit and the function unit is obtained through a signal transmission means. | 04-30-2009 |
20090134716 | Dual Wiring System - A dual wiring system is provided, which has improved easy exchangeability and function expandability of function unit, and is capable of constructing a higher-order system by controlling plural function units in a coordinated fashion. A plurality of base units are mounted in wall surfaces of a building structure, and connected to both of an electric power line and an information line installed in the building structure. The function unit is detachably connected to each of the base units, and provides at least one of functions for supplying electric power from the electric power line, outputting information from the information line, and inputting information into the information line. A control unit is detachably connected to the function unit or the base unit, and controls at least two of the function units connected to the electric power line and the information line through the base unit(s) in a coordinated fashion. | 05-28-2009 |
20090209136 | Dual Wiring System - A dual wiring system with easy exchangeability of a function unit is provided. A gate device is mounted in a wall surface of a structure, and connected to both of an electric power line and an information line previously installed in the structure. The function unit has at least one of functions for supplying electric power from the electric power line, outputting information from the information line and inputting information into the information line when connected with the gate device. The function unit has a module connector comprised of an electric power connector and an information signal connector, which is detachably connected to a module port of the gate device comprised of an electric power port and an information signal port. To further improve function expandability, an additional function unit can be detachably connected to the function unit. | 08-20-2009 |
Patent application number | Description | Published |
20090173967 | STRAINED-CHANNEL FET COMPRISING TWIST-BONDED SEMICONDUCTOR LAYER - This invention provides a strained-channel field effect transistor (FET) in which the semiconductor of the channel of the FET is formed in a compliant substrate layer disposed over a twist-bonded semiconductor interface. This FET geometry increases the efficacy of local stress elements such as stress liners and embedded lattice-mismatched source/drain regions by mechanically decoupling the semiconductor of the channel region from the underlying rigid substrate. These strained-channel FETs may be incorporated into complementary metal oxide semiconductor (CMOS) circuits in various combinations. In one embodiment of this invention, both pFETs and nFETs are in a twist-bonded (001) silicon layer on a (001) silicon base layer. In another embodiment, pFETs are in a twist-bonded (011) silicon layer on a (001) silicon base layer and nFETs are in a conventional, non-twist-bonded (001) silicon base layer. This invention also provides a twist-bonded semiconductor layer on a polycrystalline base layer, as well as methods for fabricating the aforementioned FETs. | 07-09-2009 |
20100327395 | SEMICONDUCTOR DEVICE ON DIRECT SILICON BONDED SUBSTRATE WITH DIFFERENT LAYER THICKNESS - A Direct Silicon Bonded substrate can include a first substrate and a second substrate in which the second substrate can be rotated to an azimuthal twist angle of 45 degrees in comparison to the first substrate. Disclosed are a semiconductor device and a method for making a semiconductor device that includes a DSB substrate with an adjusted thickness based upon the threshold voltage (Vt). In other words, a thicker substrate or layer can correspond to a high threshold voltage (HVt) and a thinner substrate or layer can correspond to a low threshold voltage (LVt) in order to improve mobility in LVt devices. | 12-30-2010 |
20110230030 | STRAIN-PRESERVING ION IMPLANTATION METHODS - An embedded epitaxial semiconductor portion having a different composition than matrix of the semiconductor substrate is formed with a lattice mismatch and epitaxial alignment with the matrix of the semiconductor substrate. The temperature of subsequent ion implantation steps is manipulated depending on the amorphizing or non-amorphizing nature of the ion implantation process. For a non-amorphizing ion implantation process, the ion implantation processing step is performed at an elevated temperature, i.e., a temperature greater than nominal room temperature range. For an amorphizing ion implantation process, the ion implantation processing step is performed at nominal room temperature range or a temperature lower than nominal room temperature range. By manipulating the temperature of ion implantation, the loss of strain in a strained semiconductor alloy material is minimized. | 09-22-2011 |
20120080777 | TRIPLE OXIDATION ON DSB SUBSTRATE - According to certain embodiments, a semiconductor structure is formed having a gate oxide formed over a semiconductor substrate. The gate oxide is formed as to have three different regions characterized by a different average thickness of gate oxide in each region. A first oxidation process is performed on a semiconductor substrate having both a Si (110) orientation region and a Si (100) orientation region on a surface thereof. Gate oxide is formed at a faster rate on the Si (110) orientation region of the semiconductor substrate relative to the Si (100) orientation region. A portion of the gate oxide is selectively removed and a second oxidation process is performed to form additional gate oxide. A triple oxide semiconductor substrate is recovered with the gate oxide having three different thickness formed thereon. The triple oxide semiconductor substrate is formed using a decreased number of processing acts. | 04-05-2012 |