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Hakeem
Hakeem Akinmade Yusuff, Hopewell Junction, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110039413 | METHOD FOR FORMING TRENCHES HAVING DIFFERENT WIDTHS AND THE SAME DEPTH - A lithographic material stack including a photo-resist and an organic planarizing layer is combined with an etch process that generates etch residues over a wide region from sidewalls of etched regions. By selecting the etch chemistry that produces deposition of etch residues from the organic planarizing layer over a wide region, the etch residue generated at the sidewalls of the wide trench is deposited over the entire bottom surface of the wide trench. An etch residue portion remains at the bottom surface of the wide trench when the organic planarizing layer is etched through in the first trench region. The etch residue portion is employed in the next step of the etch process to retard the etch rate in the wide trench, thereby producing the same depth for all trenches in the material layer into which the pattern of the lithographic material stack is transferred. | 02-17-2011 |
| 20110101507 | METHOD AND STRUCTURE FOR REWORKING ANTIREFLECTIVE COATING OVER SEMICONDUCTOR SUBSTRATE - A method and a structure for reworking an antireflective coating (ARC) layer over a semiconductor substrate. The method includes providing a substrate having a material layer, forming a planarization layer on the material layer, forming an organic solvent soluble layer on the planarization layer, forming an ARC layer on the organic solvent soluble layer, forming a pattern in the ARC layer, and removing the organic solvent soluble layer and the ARC layer with an organic solvent while leaving the planarization layer unremoved. The structure includes a substrate having a material layer, a planarization layer on the material layer, an organic solvent soluble layer on the planarization layer, and an ARC layer on the organic solvent soluble layer. | 05-05-2011 |
Hakeem Jimoh, Winthrop, MA US
Hakeem Ogunleye, Columbus, IN US
| Patent application number | Description | Published |
|---|---|---|
| 20090185954 | FEEDBACK CONTROL IN SELECTIVE CATALYTIC REDUCTION - An apparatus for introducing a reductant into an exhaust system is described. The apparatus includes a controller that generates a resulting dosing command used as an instruction to release an amount of reductant into the exhaust system. The controller includes a feedback control module that generates a weighing factor. The weighing factor is configured to be applied to a lower limit dosing command and configured to be applied to an upper limit dosing command, where the lower and upper limit dosing commands converted by the weighing factor are used by the controller to generate the resulting dosing command. | 07-23-2009 |
| 20110083621 | Apparatus, System, and Method for Reductant Line Heating Control - In one embodiment, an apparatus is disclosed for heating a reductant delivery line using coolant from an internal combustion engine where the reductant delivery line receives reductant from a reductant tank and a portion of a coolant line is positioned within the reductant tank. The apparatus includes a coolant temperature module that is configured to determine a reductant tank outlet coolant temperature target. Additionally, the apparatus includes a coolant flow rate module that is configured to generate a coolant valve flow rate command and transmit the command to a coolant valve. The coolant valve is controllable to regulate the flow rate of coolant through the coolant line. The coolant valve flow rate command is based on the reductant tank outlet coolant temperature target, a reductant tank inlet coolant temperature, and a reductant tank reductant temperature. | 04-14-2011 |
Hakeem Yusuff, Hopewell Junction, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110171582 | Three Dimensional Integration With Through Silicon Vias Having Multiple Diameters - A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure. | 07-14-2011 |
| 20110171827 | Three Dimensional Integration and Methods of Through Silicon Via Creation - A method includes patterning a photoresist layer on a structure to define an opening and expose a first planar area on a substrate layer, etching the exposed planar area to form a cavity having a first depth in the structure, removing a second portion of the photoresist to expose a second planar area on the substrate layer, forming a doped portion in the second planar area, and etching the cavity to expose a first conductor in the structure and the doped portion to expose a second conductor in the structure. | 07-14-2011 |