Patent application number | Description | Published |
20110039413 | METHOD FOR FORMING TRENCHES HAVING DIFFERENT WIDTHS AND THE SAME DEPTH - A lithographic material stack including a photo-resist and an organic planarizing layer is combined with an etch process that generates etch residues over a wide region from sidewalls of etched regions. By selecting the etch chemistry that produces deposition of etch residues from the organic planarizing layer over a wide region, the etch residue generated at the sidewalls of the wide trench is deposited over the entire bottom surface of the wide trench. An etch residue portion remains at the bottom surface of the wide trench when the organic planarizing layer is etched through in the first trench region. The etch residue portion is employed in the next step of the etch process to retard the etch rate in the wide trench, thereby producing the same depth for all trenches in the material layer into which the pattern of the lithographic material stack is transferred. | 02-17-2011 |
20110101507 | METHOD AND STRUCTURE FOR REWORKING ANTIREFLECTIVE COATING OVER SEMICONDUCTOR SUBSTRATE - A method and a structure for reworking an antireflective coating (ARC) layer over a semiconductor substrate. The method includes providing a substrate having a material layer, forming a planarization layer on the material layer, forming an organic solvent soluble layer on the planarization layer, forming an ARC layer on the organic solvent soluble layer, forming a pattern in the ARC layer, and removing the organic solvent soluble layer and the ARC layer with an organic solvent while leaving the planarization layer unremoved. The structure includes a substrate having a material layer, a planarization layer on the material layer, an organic solvent soluble layer on the planarization layer, and an ARC layer on the organic solvent soluble layer. | 05-05-2011 |
20120205786 | METHOD AND STRUCTURE FOR REWORKING ANTIREFLECTIVE COATING OVER SEMICONDUCTOR SUBSTRATE - A method and a structure for reworking an antireflective coating (ARC) layer over a semiconductor substrate. The method includes providing a substrate having a material layer, forming a planarization layer on the material layer, forming an organic solvent soluble layer on the planarization layer, forming an ARC layer on the organic solvent soluble layer, forming a pattern in the ARC layer, and removing the organic solvent soluble layer and the ARC layer with an organic solvent while leaving the planarization layer unremoved. The structure includes a substrate having a material layer, a planarization layer on the material layer, an organic solvent soluble layer on the planarization layer, and an ARC layer on the organic solvent soluble layer. | 08-16-2012 |
20120231554 | METHOD AND STRUCTURE FOR REWORKING ANTIREFLECTIVE COATING OVER SEMICONDUCTOR SUBSTRATE - A method and a structure for reworking an antireflective coating (ARC) layer over a semiconductor substrate. The method includes providing a substrate having a material layer, forming a planarization layer on the material layer, forming an organic solvent soluble layer on the planarization layer, forming an ARC layer on the organic solvent soluble layer, forming a pattern in the ARC layer, and removing the organic solvent soluble layer and the ARC layer with an organic solvent while leaving the planarization layer unremoved. The structure includes a substrate having a material layer, a planarization layer on the material layer, an organic solvent soluble layer on the planarization layer, and an ARC layer on the organic solvent soluble layer. | 09-13-2012 |
Patent application number | Description | Published |
20110171582 | Three Dimensional Integration With Through Silicon Vias Having Multiple Diameters - A method is disclosed which includes patterning a photoresist layer on a substrate of a structure, removing a first portion of the photoresist layer to expose a first area of the substrate, etching the first area to form a cavity having a first depth, removing a second portion of the photoresist to expose an additional area of the substrate, and etching the cavity to expose a first conductor in the structure and the additional area to expose a second conductor in the structure. | 07-14-2011 |
20110171827 | Three Dimensional Integration and Methods of Through Silicon Via Creation - A method includes patterning a photoresist layer on a structure to define an opening and expose a first planar area on a substrate layer, etching the exposed planar area to form a cavity having a first depth in the structure, removing a second portion of the photoresist to expose a second planar area on the substrate layer, forming a doped portion in the second planar area, and etching the cavity to expose a first conductor in the structure and the doped portion to expose a second conductor in the structure. | 07-14-2011 |
20120190189 | Three Dimensional Integration and Methods of Through Silicon Via Creation - A method includes patterning a photoresist layer on a structure to define an opening and expose a first planar area on a sacrificial substrate layer, etching to the exposed first planar area to form a cavity having a first depth in the structure, removing a portion of the photoresist to increase the size of the opening to define a second planar area on the sacrificial substrate layer, forming a doped portion in the sacrificial substrate layer, and etching the cavity to increase the depth of the cavity to expose a first conductor in the structure and to increase the planar area and depth of a portion of the cavity to expose a second conductor in the structure. | 07-26-2012 |
20120190196 | Three Dimensional Integration and Methods of Through Silicon Via Creation - A method includes patterning a photoresist layer on a structure to define an opening and expose a first planar area on a substrate layer, forming doped portions of the substrate layer in the first planar area, removing a portion of the photoresist to form a second opening defining a second planar area on the substrate layer, and etching to form a first cavity having a first depth defined by the first opening to expose a first contact in the structure and to form a second cavity defined by the second opening to expose a second contact in the structure. | 07-26-2012 |
20130237054 | THREE DIMENSIONAL INTEGRATION AND METHODS OF THROUGH SILICON VIA CREATION - A method includes patterning a photoresist layer on a structure to define an opening and expose a first planar area on a substrate layer, forming doped portions of the substrate layer in the first planar area, removing a portion of the photoresist to form a second opening defining a second planar area on the substrate layer, and etching to form a first cavity having a first depth defined by the first opening to expose a first contact in the structure and to form a second cavity defined by the second opening to expose a second contact in the structure. | 09-12-2013 |