Patent application number | Description | Published |
20110209026 | Systems and Methods for Data Recovery Using Enhanced Sync Mark Location - Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a first set of data samples corresponding to a region of interest. The pattern comparison circuit is operable to compare a subset of the first set of data samples with a subset of a second set of data samples corresponding to the region of interest. The pattern comparison circuit is operable to yield a match value corresponding to a degree of similarity between the first set of data samples with the subset of a second set of data samples. The threshold comparison circuit is operable to indicate an anchor point based at least in part on the magnitude of the match value relative to a threshold value. | 08-25-2011 |
20120089657 | Systems and Methods for Partially Conditioned Noise Predictive Equalization - Various embodiments of the present invention provide systems and methods for equalization. As an example, a circuit for data equalization is described that includes a 2N state detector circuit that provides a series of detected bits based upon a conditioned input, and a noise predictive filter having a plurality of taps and operable to provide at least a portion of the conditioned input. At least a first of the plurality of taps uses a first subset of the series of detected bits, and a second of the plurality of taps uses a second subset of the series of detected bits. The first subset of the detected bits includes one more bit than the second subset of the detected bits. | 04-12-2012 |
20120106607 | Systems and Methods for Variable Thresholding in a Pattern Detector - Various embodiments of the present invention provide systems and methods for pattern identification. As an example, a pattern detection circuit is discussed that include: a distance calculation circuit operable to calculate a distance value corresponding to a difference between a first pattern and a second pattern; a threshold comparator circuit operable to compare the distance value to a variable threshold value; and a threshold value calculation circuit. The threshold value calculation circuit is operable to modify the variable threshold value based at least in part on the distance value. | 05-03-2012 |
20120207201 | Systems and Methods for Data Detection Using Distance Based Tuning - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path. | 08-16-2012 |
20120212849 | Systems and Methods for Data Pre-Coding Calibration - Various embodiments of the present invention provide systems and methods for selecting between pre-coding and non-pre-coding. As an example, a data processing circuit is disclosed that includes: a first data detector circuit, a second data detector circuit, a first comparator circuit, a second comparator circuit, and a pre-code selection circuit. The first data detector circuit is selectably configurable to operate in a pre-coded state, and operable to apply a data detection algorithm on a data input to yield a first detected output. The second data detector circuit operable to apply the data detection algorithm to the data input to yield a second detected output without compensating for pre-coding. The first comparator circuit operable to compare the first detected output against a known input to yield a first comparison value, and the second comparator circuit operable to compare the second detected output against the known input to yield a second comparison value. The pre-code selection circuit is operable to determine a selectable configuration of the first data detector circuit based at least in part on the first comparison value and the second comparison value. | 08-23-2012 |
20120236428 | Systems and Methods for Sync Mark Detection - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path. | 09-20-2012 |
20120281304 | Systems and Methods for Read Head Characterization - Various embodiments of the present invention provide systems and methods for read sensor characterization. As an example, a data storage device is disclosed that includes a storage medium, a read/write head assembly disposed in relation to the storage medium, and a track width setting circuit. The track width setting circuit is operable to: write data to at least a first track and a second track on the storage medium, read data from the second track, determine an estimated track offset where interference from the data written to the first track is insubstantial, and modify at least the second track width based at least in part on the estimated track offset. The first track is a first track width and the second track is a second track width. | 11-08-2012 |
20120281305 | Systems and Methods for Servo Data Detection - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a codeword detector circuit operable to apply a codeword based data detection algorithm to a data input corresponding to an encoded servo data region to yield a detected output, and a servo address mark processing circuit operable to identify a pre-defined pattern in the detected output. | 11-08-2012 |
20130021187 | Systems and Methods for ADC Based Timing and Gain Control - Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing circuit is discussed that includes: an analog to digital converter circuit, a target response circuit, and a timing circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples synchronous to a sampling phase. The sampling phase corresponds to a phase feedback. The target response circuit is operable to provide an expected output corresponding to a known input. The timing circuit is operable to generate the phase feedback based at least in part on values derived from the expected output. | 01-24-2013 |
20130021690 | Systems and Methods for User Data Based Fly Height Calculation - Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit. | 01-24-2013 |
20130024163 | Systems and Methods for Early Stage Noise Compensation in a Detection Channel - Various embodiments of the present invention provide data processing circuits that include: a data detector circuit, a data decoder circuit, and a modification circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output. The data decoder circuit is operable to apply a data decode algorithm to a decode input to yield a decoded output. The decode input is selected between at least the detected output, and a modified version of the detected output. The modification circuit is operable to receive the detected output and to provide the modified version of the detected output. | 01-24-2013 |
20130024740 | Systems and Methods for Mitigating Stubborn Errors in a Data Processing System - Various embodiments of the present invention provide data processing circuits that include: a data detector circuit, a data decoder circuit, and a modification circuit. The data detector circuit is operable to apply a data detection algorithm to a data input to yield a detected output. The data decoder circuit is operable to apply a data decode algorithm to a decode input to yield a decoded output. The decode input is selected between at least the detected output, and a modified version of the detected output. The modification circuit is operable to receive the detected output and to provide the modified version of the detected output. | 01-24-2013 |
20130047058 | Systems and Methods for Qualitative Media Defect Determination - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a media defect detector circuit. The media defect detector circuit is operable to compare a data input derived from a medium against at least a first defect level to yield a first level output, and a second defect level to yield a second level output; and provide a combination of the first level output and the second level output as a defect quality output. A value of the defect quality output corresponds to a likelihood of a defect of the medium. | 02-21-2013 |
20130077186 | Systems and Methods for Pattern Dependent Target Adaptation - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes a noise predictive filter circuit, a data detector circuit, and a first and a second pattern dependent adaptive target circuits. The noise predictive filter circuit includes at least a first pattern dependent filter circuit operable to perform noise predictive filtering on a data input for a first pattern using a first adaptive target to yield a first noise predictive output, and a second pattern dependent filter circuit operable to perform noise predictive filtering on the data input for a second pattern using a second adaptive target to yield a second noise predictive output. The data detector circuit is operable to apply a data detection algorithm to the first noise predictive output and the second noise predictive output to yield a detected output. The first pattern dependent adaptive target circuit is operable to adaptively calculate the first adaptive target based at least in part on the first noise predictive output and a training sequence. The second pattern dependent adaptive target circuit operable to adaptively calculate the second adaptive target based at least in part on the second noise predictive output and the training sequence. | 03-28-2013 |
20130086438 | Systems and Methods for Efficient Parameter Modification - Various embodiments of the present invention provide systems and methods for data processing. | 04-04-2013 |
20130086439 | Systems and Methods for Parameter Selection Using Reliability Information - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes: a data detector circuit, and a reliability monitor circuit. The data detector circuit is operable to apply a data detection algorithm to a data set to yield a detected output that includes soft data. The reliability monitor circuit is operable to determine a proxy error count based at least in part on the soft data, and to modify a parameter governing an operation of the data processing system based at least in part on the proxy error count. | 04-04-2013 |
20130091397 | Systems and Methods for Parity Sharing Data Processing - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes: a data detector circuit, a low density parity check data decoder circuit, and a processing circuit. The processing circuit is operable to: reconstitute a second encoded sub-codeword from a combination of data including the first encoded sub-codeword and the composite sub-codeword; and correct an error in one of the first encoded sub-codeword and the second encoded sub-codeword based at least in part on a combination of the first encoded sub-codeword, the second encoded sub-codeword, and the composite sub-codeword. | 04-11-2013 |
20130091400 | Systems and Methods for Parity Shared Data Encoding - Various embodiments of the present invention provide systems and methods for data processing. For example, a low density parity check encoding system is described that includes: a low density parity check encoder circuit, and a combining circuit. The low density parity check encoder circuit is operable to encode a first data set to yield a first low density parity check encoded sub-codeword, and to encode a second data set to yield a second low density parity check encoded sub-codeword. The combining circuit is operable to: generate a composite low density parity check sub-codeword by mathematically combining at least the first low density parity check encoded sub-codeword and the second low density parity check encoded sub-codeword; and combine at least the first low density parity check encoded sub-codeword and the composite low density parity check sub-codeword into an overall codeword. | 04-11-2013 |
20130148226 | Systems and Methods for Zone Servo Timing Gain Recovery - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing system is disclosed that includes Various embodiments of the present invention provide data processing systems that include an analog to digital converter circuit and a phase and gain computation circuit. The analog to digital converter circuit is operable to convert an analog input into a series of digital samples. At least a portion of the series of digitals samples represent a periodic signal from a servo data region. The phase and gain computation circuit is operable to: determine an approximate amplitude of the periodic signal based at least in part upon the digital samples representing the periodic signal from the servo data region; determine a gain based at least in part on the approximate amplitude; and determine a phase based at least in part on the approximate amplitude. | 06-13-2013 |
20130148233 | Systems and Methods for SNR Measurement Using Equalized Data - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an equalizer circuit, a signal to noise ratio calculation circuit, and a parameter adjustment circuit. The equalizer circuit is operable to equalize a data input to yield an equalized output. The signal to noise ratio calculation circuit is operable to calculate a signal to noise ratio of the equalized output based at least in part on a noise power derived from the equalized output. The parameter adjustment circuit is operable to adjust a parameter based at least in part on the signal to noise ratio. | 06-13-2013 |
20130173932 | Systems and Methods for Decimation Based Over-Current Control - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for power governance in a data processing system. In some such systems and methods, the operation of one or more calibration circuits is modified when it is determined that too many data processing circuits are active. | 07-04-2013 |
20130176640 | Systems and Methods for Adaptive Gain Control - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, a data detector circuit, a filter circuit, an error generation circuit, and a target parameter adaptation circuit. The analog to digital converter circuit converts an analog input into corresponding digital samples. The data detector circuit applies a data detection algorithm to a data set derived from the digital samples to yield a detected output. The filter circuit convolves the detected output with a target parameter to yield a target output. The error generation circuit calculates an error value based on the digital samples and the target output. The target parameter adaptation circuit updates the target parameter based at least in part on the error value. | 07-11-2013 |
20130198421 | Systems and Methods for Digital MRA Compensation - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output. | 08-01-2013 |
20130198580 | Symbol Flipping Data Processor - Various embodiments of the present invention provide systems and methods for a symbol flipping data processor. For example, a symbol flipping data processor is disclosed that includes a data decoder in the symbol flipping data processor operable to perform error checking calculations, and a data detector in the symbol flipping data processor operable to perform symbol flipping in the data detector based at least in part on the error checking calculations, wherein the output of the data processor is generated at least in part based on the symbol flipping in the data detector. | 08-01-2013 |
20130208376 | Systems and Methods for Parameter Modification During Data Processing Retry - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: a buffer circuit, an equalizer circuit, a data processing circuit, and a retry determination circuit. The buffer is operable to store digital samples as a buffered output, and the equalizer circuit is operable to equalize the buffered output using a first equalization target to yield a first equalized output, and to yield a second equalized output using a second equalization target. The retry determination circuit is operable to select the second equalization target based at least in part on an occurrence of an error. | 08-15-2013 |
20130208377 | Systems and Methods for Adaptive Decoder Message Scaling - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for adaptively modifying a scaling factor in a data processing system. | 08-15-2013 |
20130235484 | Multi-Path Data Processing System - Various embodiments of the present invention provide apparatuses and methods for processing data in a multi-path data processing circuit. For example, an apparatus is disclosed that includes a first filter operable to process a first digital data stream to yield a first filtered digital data stream, a second filter operable to process a second digital data stream to yield a second filtered digital data stream, wherein the first and second digital data stream are representative of a same data set and wherein the first and second digital data stream have a different phase, a combining circuit operable to combine the first filtered digital data stream and the second filtered digital data stream to yield a combined data stream, and a data detector operable to detect a data sequence in the combined data stream. | 09-12-2013 |
20130238944 | Systems and Methods for Reduced Latency Loop Correction - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes: a data detector circuit, a low latency detection circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output, and to provide a loop error as a difference between the detected output and the first signal. The low latency detection circuit operable to process a second signal derived from the data input to yield a fast detector output, and to provide a generated error as a difference between the fast detector output and the second signal. The error calculation circuit is operable to calculate an error value based at least in part on the generated error and the loop error. | 09-12-2013 |
20130290798 | Systems and Methods for Short Media Defect Detection Using Non-Binary Coded Information - Various embodiments of the present invention provide systems and methods for media defect detection. | 10-31-2013 |
20130322578 | Systems and Methods for Data Processing Including EET Feedback - The present invention is related to systems and methods for data processing system characterization. | 12-05-2013 |
20130329312 | Multi-Zone Servo Processor - The present inventions are related to systems and methods for transferring information to and from a storage medium, and more particularly to systems and methods for positioning a sensor in relation to a storage medium. For example, an apparatus for determining a sensor position is disclosed that includes a data stream processor operable to generate a number of data streams at different frequencies based on an input data stream, a number of servo preamble detectors each operable to process a different one of the data streams to detect a servo preamble, a selector operable to output one of the data streams in which the servo preamble was detected as a winning data stream, and a pattern detector operable to detect a pattern in the winning data stream. | 12-12-2013 |
20130329313 | Servo Zone Detector - The present inventions are related to systems and methods for transferring information to and from a storage medium, and more particularly to systems and methods for positioning a sensor in relation to a storage medium. For example, an apparatus for determining a sensor position is disclosed that includes discrete Fourier transform calculators operable to process input data to yield a magnitude response of the input data at each of a number of candidate frequencies, a comparator operable to compare the magnitude responses to yield a winning candidate frequency, a servo controller operable to process at least one servo field in the input data to identify a position of a sensor based on the at least one servo field, and a servo frequency synthesizer operable to establish a frequency of operation in the servo controller based at least in part on the winning candidate frequency. | 12-12-2013 |
20130335844 | Systems and Methods for Hybrid MRA Compensation - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an analog to digital converter circuit, and a magneto-resistive adjustment circuit. The analog to digital converter circuit is operable to convert an input signal into corresponding digital samples. The magneto-resistive adjustment circuit is operable to reduce signal asymmetry in the digital samples due to sensing by a magneto-resistive head to yield a corrected output. | 12-19-2013 |
20140016220 | Systems and Methods for Hardware Assisted Write Pre-Compensation Enhancement - Various embodiments of the present invention provide systems and methods for calibrating write pre-compensation values. | 01-16-2014 |
20140029128 | Saturation-Based Loop Control Assistance - The present inventions are related to systems and methods for data processing, and more particularly to data processing using distortion-correction loops with saturation-based assistance. | 01-30-2014 |
20140032454 | Systems and Methods for Data Processing Using Soft Data Shaping - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for manipulating soft data in a data processing system. | 01-30-2014 |
20140032982 | Systems and Methods for Enhanced Media Defect Detection - Various embodiments of the present invention provide systems and methods for media defect detection. | 01-30-2014 |
20140036385 | ZERO GAIN START BIAS ESTIMATION - A method and system for estimating a zero gain start (ZGS) bias in a read channel is disclosed. The method may include: receiving preamble samples within a fixed-length window selected for ZGS calculation; calculating an energy associated with a 2T frequency in the preamble samples; calculating an energy associated with non-2T frequencies in the preamble samples; and calculating the ZGS bias based on the energy associated with the 2T frequency in the preamble samples and the energy associated with non-2T frequencies in the preamble samples. | 02-06-2014 |
20140055882 | REAL TIME CLOSE LOOP FLY HEIGHT CONTROL - A device includes a disk drive assembly configured to store information using a platter comprising a magnetic material surface and a magnetic head disposed above the magnetic material surface. The magnetic head is configured to move across tracks formed on the platter to write information to the magnetic material surface and read information from the magnetic material surface. The device also includes a controller operatively coupled with the disk drive assembly. The controller is configured to dynamically adjust the height of the magnetic head above the magnetic material surface at each of the tracks by determining a harmonic ratio for a particular track and comparing the harmonic ratio to a reference harmonic ratio for the track. For example, the controller calculates a difference between the harmonic ratio and the reference harmonic ratio. | 02-27-2014 |
20140063637 | Systems and Methods for NPML Calibration - The present invention is related to systems and methods for adaptive parameter modification in a data processing system. | 03-06-2014 |
20140068368 | LDPC Decoder With Fractional Unsatisfied Check Quality Metric - The present inventions are related to systems and methods for calculating data quality metrics for an LDPC decoder, and particularly for calculating a fractional unsatisfied check quality metric. | 03-06-2014 |
20140085743 | REAL TIME MRA ESTIMATION AND CORRECTION USING ADC SAMPLES - Methods and systems for estimating MRA for a hard disk drive are described. The methods and systems described herein provide for real time estimating and correcting magneto-resistive head asymmetry (MRA) in a hard disk drive using analog-to-digital convertor (ADC) samples or counts. Generally, ADC outputs may be obtained by injecting MRA at known values, where an estimated MRA may be derived in real time by applying an equation using particular ADC output values. Once an estimated MRA is obtained, MRA correction may be performed when the estimated MRA is larger than a threshold value, such as by adjusting a channel MRA compensation coefficient. | 03-27-2014 |
20140104717 | ZERO GAIN START AND GAIN ACQUISITION BASED ON ADAPTIVE ANALOG-TO-DIGITAL CONVERTER TARGET - Aspects of the disclosure pertain to a system and method for providing zero gain start (ZGS) and gain acquisition based on an adaptive analog-to-digital converter (ADC) target. The adaptive ADC target is used to collect channel characteristics and based on the adaptive ADC target, an adjusted 2T amplitude target value is generated. | 04-17-2014 |
20140105266 | ADAPTIVE MAXIMUM A POSTERIORI (MAP) DETECTOR IN READ CHANNEL - An adaptive detector, such as a maximum a posteriori (MAP) detector for a read channel, is disclosed. In one or more embodiments, a data processing apparatus, such as a read channel digital front end, includes an equalizer configured to equalize X sample data to yield equalized Y sample data. A noise predictive filter configured to receive the equalized Y sample data yielded by the equalizer is operable to filter noise in the equalized Y sample data. A detector is configured to perform iterative data detection on the filtered equalized Y sample data. The detector is operable to program a branch metric, a variance, and a scaling factor for equalizer adaptation during a global iteration of the detector. | 04-17-2014 |
20140108875 | Systems and Methods for Indirect Information Assisted Media Defect Scan - Systems, circuits, devices and/or methods related to systems and methods for data processing, and more particularly to systems and methods for media defect detection. | 04-17-2014 |
20140119113 | Threshold Acquisition and Adaption in NAND Flash Memory - A method, apparatus, and controller for acquiring and tracking at least one threshold voltage of at least one cell of at least one flash chip. The method can include acquiring the at least one threshold voltage of a particular cell of the at least one flash cell. The method can further include performing at least one threshold voltage adjustment iteration. | 05-01-2014 |
20140129603 | Systems and Methods for Partially Conditioned Noise Predictive Equalization - Various embodiments of the present invention provide systems and methods for equalization. As an example, a circuit for data equalization is described that includes a 2N state detector circuit that provides a series of detected bits based upon a conditioned input, and a noise predictive filter having a plurality of taps and operable to provide at least a portion of the conditioned input. At least a first of the plurality of taps uses a first subset of the series of detected bits, and a second of the plurality of taps uses a second subset of the series of detected bits. The first subset of the detected bits includes one more bit than the second subset of the detected bits. | 05-08-2014 |
20140139939 | ADAPTIVE SERVO ADDRESS MARK DETECTION - Various embodiments of the present inventions provide systems and methods for adaptive servo address mark detection. | 05-22-2014 |
20140146413 | Systems and Methods for Enhanced Servo Data Processing - Systems and method relating generally to detecting information, and more particularly without limitation to systems and methods for synchronizing to a data stream. | 05-29-2014 |
20140149796 | Systems and Methods for Controlled Data Processor Operational Marginalization - Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability. | 05-29-2014 |
20140160592 | Systems and Methods for X-Sample Based Data Processor Marginalization - Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability. | 06-12-2014 |
20140168810 | Systems and Methods for Adaptive Threshold Pattern Detection - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for detecting patterns in a data stream. | 06-19-2014 |
20140198404 | SYSTEMS AND METHODS FOR X-SAMPLE BASED NOISE CANCELLATION - Systems, methods, devices, circuits for data processing, and more particularly to cancelling noise while processing data. | 07-17-2014 |
20140198405 | Systems and Methods for Loop Processing With Variance Adaptation - Systems and methods for data processing, and more particularly systems and methods for loop processing with variance adaptation. | 07-17-2014 |
20140211336 | AUTOMATIC GAIN CONTROL LOOP ADAPTATION FOR ENHANCED NYQUIST DATA PATTERN DETECTION - Techniques are provided for automatic gain control loop adaptation in circuitry for processing such data signals. In one example, an apparatus comprises read channel circuitry and signal processing circuitry associated with the read channel circuitry. The signal processing circuitry comprises an amplifier, a detector operatively coupled to the amplifier, and a feedback path operatively coupled between the detector and the amplifier. The amplifier is configured to receive and amplify an input signal received by the read channel circuitry. The detector is configured to detect a data pattern from the amplified input signal. The feedback path is configured to provide a feedback signal to the amplifier to adjust a gain of the amplifier, and to generate the feedback signal in accordance with a value selected to improve detection of the data pattern by increasing an amplitude of the data pattern around a given frequency. | 07-31-2014 |
20140233128 | Systems and Methods For Burst Demodulation - A data processing circuit with flaw robust burst field demodulation includes a burst integration circuit operable to calculate burst integration results for a servo data burst field, a comparison circuit operable to determine whether an absolute value of the burst integration results falls outside a window, and an error indicating circuit operable to indicate that a media flaw has been detected when the absolute value of the burst integration results fall outside the window. | 08-21-2014 |
20140254041 | Servo Marginalization - Servo channel noise limits are defined through Viterbi decisions based on servo gate signals. Y values are used to produce a first Viterbi decision at each servo gate. Viterbi decisions and Y values are used to produce ideal Y values. Y values and ideal Y values are used to produce an error value which is adjusted by a noise factor based on estimated channel characteristics. The noise value is combined with Y values and used to produce a second Viterbi decision at each servo gate. | 09-11-2014 |
20140254043 | SAMPLING-PHASE ACQUISITION BASED ON CHANNEL-IMPULSE-RESPONSE ESTIMATION - Embodiments of the invention can be manifested as methods for converting analog waveforms into digital sampled signals. In at least one such embodiment, the method includes (i) sampling, based on a sampling-clock signal, an analog waveform received from a transmission channel to generate a digital sampled signal, (ii) generating a digital target signal by applying a specified reference data pattern to a model of the transmission channel, and (iii) adjusting the sampling-clock signal by comparing the digital sampled signal to the digital target signal. Embodiments of the invention can also be manifested as apparatuses that convert analog waveforms into digital sampled signals. | 09-11-2014 |
20140268391 | DATA SEQUENCE DETECTION IN BAND-LIMITED CHANNELS USING COOPERATIVE SEQUENCE EQUALIZATION - A method for detecting a data sequence includes generating a sample stream, which is a time-sequenced digital signal associated with samples of an analog signal. The sample stream is input to n equalization filter banks, which each have m equalization filters to generate m equalized sample streams. The m equalized sample streams from each equalization filter bank are input to a corresponding one of n noise predictive filters. Each noise predictive filter is an m-tap noise predictive filter that receives the m equalized sample streams from a corresponding one of the n equalization filter banks. Each noise predictive filter is associated with one of n data patterns. A filtered equalization stream is generated by each noise predictive filter. Noise sample streams are generated using the filtered equalization streams generated by the n noise predictive filters. A data sequence is detected using the noise sample streams. | 09-18-2014 |
20140268397 | Hardware Support of Servo Format with Two Preamble Fields - A hard disk drive uses a second, reference burst field in a preamble to estimate burst phase and burst magnitude. Such estimations are used for position error signal integration and repeatable runout correction. Gain error is also derived from such estimations. Information contained in a preamble field is used in conjunction with the reference burst phase estimation to synchronize servo address marks. | 09-18-2014 |
20140268400 | Systems and Methods for Loop Feedback - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing loop feedback in a data processing system. | 09-18-2014 |
20140268401 | Systems and Methods for P-Distance Based Priority Data Processing - The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for priority based data processing. | 09-18-2014 |
20140286149 | Automatic On-Drive Sync-Mark Search and Threshold Adjustment - A hard disk drive includes a processor to automatically adjust a threshold level for finding sync-marks. The processor determines all possible sync-mark patterns for a particular pattern length and analyzes each pattern with reference to real world data. The pattern with the largest distance gap is used. The threshold level is then adjusted dynamically to produce the lowest possible failure rate for the given pattern. | 09-25-2014 |
20140307345 | Systems and Methods for Preventing Adjacent Track Erasure - A data processing circuit includes a subtraction circuit operable to subtract an ideal version of a data pattern from a sampled version of a data pattern to yield a difference signal, an error calculation circuit operable to calculate an error between the ideal version of the data pattern and the sampled version of the data pattern based on the difference signal, and a comparator circuit operable to compare the error with a threshold value and operable to assert a track refresh signal if the error is greater than the threshold value. The track refresh signal is operable to trigger a magnetic storage device to refresh data on a data track. | 10-16-2014 |
20140331108 | Systems and Methods for Detecting Media Flaws - An apparatus for detecting media flaws includes a branch metric selection circuit operable to select a first branch metric and a second branch metric, a subtraction circuit operable to subtract the second branch metric from the first branch metric to yield a difference, and a comparator operable to compare the difference with a threshold value and to indicate a presence of a potential flaw in a storage medium when the difference is less than the threshold value. | 11-06-2014 |
20140334028 | Systems and Methods for Processing Data With Linear Phase Noise Predictive Filter - Systems, methods, devices, circuits for data processing, and more particularly to systems and methods for data processing with a linear phase noise predictive filter. A data processing system includes an equalizer circuit operable to filter a digital data input to yield equalized data, a linear phase noise predictive finite impulse response filter operable to filter the equalized data to yield filtered data, and a data detector circuit operable to apply a data detection algorithm to the filtered data to yield a detected output. The greatest tap coefficient for the linear phase noise predictive finite impulse response filter is at a center tap. | 11-13-2014 |
20140340780 | Method and System for Sliding-Window Based Phase, Gain, Frequency and DC Offset Estimation for Servo Channel - Sliding-window based data processing includes receiving an analog signal, converting the analog signal to a series of digital samples synchronous to a sampling clock, performing a first discrete Fourier transform on a first portion of the series of digital samples, performing a second discrete Fourier transform on a second portion of the series of digital samples, performing a third discrete Fourier transform on a third portion of the series of digital samples, generating a first series of zero phase start values by calculating a zero phase start value based on the first discrete Fourier transform in a sliding-window at a series of time increments across the servo preamble, storing the zero phase start values, and averaging the stored zero phase start values at the end of the servo preamble. | 11-20-2014 |
20140351668 | Systems and Methods for Inter-cell Interference Mitigation in a Flash Memory - The present inventions are related to systems and methods for accessing data from a flash memory, and more particularly to systems and methods for inter-cell interference handling in a flash memory. | 11-27-2014 |
20150062732 | Systems and Methods for Two Stage Tone Reduction - Systems and method relating generally to data processing, and more particularly to systems and methods for tone reduction in relation to data transmission. | 03-05-2015 |
20150062734 | Systems and Methods for Multi-Level Encoding and Decoding - A storage system includes a storage medium operable to maintain a data set, a read/write head assembly operable to write the data set to the storage medium and to read the data set from the storage medium, a multi-level encoder operable to encode the data set at a plurality of different code rates before it is written to the storage medium, and a multi-level decoder operable to decode the data set retrieved from the storage medium and to apply decoded values encoded at a lower code rate when decoding values encoded at a higher code rate. | 03-05-2015 |
20150082115 | Systems and Methods for Fragmented Data Recovery - Systems and method relating generally to data processing, and more particularly to systems and methods for fragmenting a data set and recovering the fragmented data set. | 03-19-2015 |
20150089330 | Systems and Methods for Enhanced Data Recovery in a Solid State Memory System - Systems and method relating generally to data processing, and more particularly to systems and methods for recovering data from a solid state memory. | 03-26-2015 |