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Hae-Jung Lee
Hae-Jung Lee, Suwon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20080198497 | HARD DISK DRIVE APPARATUS, METHOD TO CONTROL FLYING HEIGHT OF MAGNETIC HEAD THEREOF, AND RECORDING MEDIA FOR COMPUTER PROGRAM THEREFOR - A method of controlling a flying height of a magnetic head of a hard disk drive apparatus includes producing a reference FOD (flying on demand) voltage profile defining a relationship between the flying height of the magnetic head and an FOD voltage at a measured temperature, wherein an end of the magnetic head thermally expands and protrudes when the FOD voltage is applied to a heater included in the magnetic head and setting the reference FOD voltage profile that is corrected using a reference maximum flying height of the magnetic head that is preset at room temperature, as an applied FOD voltage profile to control the flying height of the magnetic head. | 08-21-2008 |
| 20080219117 | APPARATUS AND METHOD OF SETTING UP BIT ERROR RATE CRITERION AND APPARATUS AND METHOD OF PERFORMING BURN-IN TEST OF HARD DISK DRIVE - An apparatus and method of setting up a bit error rate (BER) criterion and an apparatus and method of performing a burn-in test using the method of setting up the BER criterion. The method of setting the BER criterion includes measuring temperatures of hard disc drives (HDDs), and changing a BER criterion in which, if the measured temperature of the HDD is higher than an optimum temperature for a burn-in test, a new BER criterion having a value greater than the BER criterion of the optimum temperature is set up, and, if the measured temperature of the HDD is lower than an optimum temperature for a burn-in test, a new BER criterion having a value less than the BER criterion of the optimum temperature is set up. | 09-11-2008 |
| 20080266704 | Hard disk drive, method of controlling flying height of magnetic head thereof, and recording medium containing computer program thereon - A method of controlling a flying height of a magnetic head of a hard disk drive includes calculating a corrected flying on demand (FOD) voltage to correct a difference between a measured flying height measured by applying a burn-in FOD voltage corresponding to a target flying height and a burn-in flying height in a reference FOD voltage profile corresponding to the burn-in FOD voltage, using the reference FOD voltage profile, in the reference FOD voltage profile that is a profile of a second signal for calculating the flying height of the magnetic head with respect to a first signal for calculating an FOD voltage that allows an end of the magnetic head to thermally expand and protrude when applied to a heater included in the magnetic head, and applying an applied FOD voltage obtained by applying the corrected FOD voltage, to the burn-in FOD voltage, to control the flying height of the magnetic head. Thus, the reliability in the read/write operation can be improved and performance of the hard disk drive can be improved. | 10-30-2008 |
| 20110047409 | STORAGE DEVICE SUPPORTING AUTO BACKUP FUNCTION - A storage device having an automatic backup function, which is connected to a host apparatus to store user data, is provided. The storage device includes a storage medium which stores the user data, and a controller which controls data writing and reading of the storage medium. The controller backs up at least a portion of the user data stored in the storage medium in an available region of the storage medium when the storage device is in an idle mode. | 02-24-2011 |
| 20110080820 | METHOD OF SETTING ZONE LAYOUT OF RECORDING MEDIUM, AND APPARATUS USING METHOD - A data storage device determines a zone layout based on a quality evaluation factor. The zone layout is designed such that a measurement value of the quality evaluation factor for each track in each zone is within a range between a predetermined upper limit and a predetermined lower limit and a maximum amount of variation of the measurement value within each zone is substantially equal to a difference between the upper limit and the lower limit. | 04-07-2011 |
Hae-Jung Lee, Ichon-Shi KR
| Patent application number | Description | Published |
|---|---|---|
| 20100062598 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH METAL LINE - A method for fabricating a semiconductor device includes forming an inter-layer insulation layer on a substrate; forming openings in the inter-layer insulation layer; forming a metal barrier layer in the openings and on the inter-layer insulation layer; forming a first conductive layer on the metal barrier layer and filled in the openings; etching the first conductive layer to form interconnection layers in the openings and to expose portions of the metal barrier layer, the interconnection layers being inside the openings and at a depth from a top of the openings; etching the exposed portions of the metal barrier layer to obtain a sloped profile of the metal barrier layer at top lateral portions of the openings; forming a second conductive layer over the inter-layer insulation layer, the interconnection layers and the metal barrier layer with the sloped profile; and patterning the second conductive layer to form metal lines. | 03-11-2010 |
Hae-Jung Lee, Icheon-Si KR
| Patent application number | Description | Published |
|---|---|---|
| 20100025806 | Semiconductor device and method of fabricating the same - In a semiconductor device and related method of fabricating the same, a hard mask layer is formed over a substrate, portions of the hard mask layer and the substrate are etched to form trenches having protruding portions at sidewalls, and an insulation layer buried in the trenches is formed to form device isolation regions having protruding portions at sidewalls, wherein the device isolation regions decrease a portion of a width of active regions. | 02-04-2010 |
Hae-Jung Lee, Daejeon KR
| Patent application number | Description | Published |
|---|---|---|
| 20100022895 | DIAGNOSIS SYSTEM OF DEFICIENT AND FORCEFUL PULSE - Disclosed herein is a system for diagnosing a deficient pulse and an forceful pulse. The system includes a pulse diagnotic device, a deficient pulse and forceful pulse determining device, and an output device. The pulse diagnotic device measures pulse condition information at an examinee's Cun (˜\f˜) Gu (H), and Chi (,R) pulse-taking locations on his or her wrist using one or more pulse-taking sensors. The deficient pulse and forceful pulse determining device is operably connected to the pulse diagnotic device, analyzes the pulse pressure information measured by the pulse diagnotic device, calculates a quantified deficiency/forceful coefficient, and determines whether a pulse of interest is a deficient pulse or an forceful pulse. The output device is connected to the determining device and displays results of the determination. | 01-28-2010 |
Hae-Jung Lee, Gyeonggi-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20100015775 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH RECESS GATE - A method for fabricating a semiconductor device with a recess gate includes providing a substrate, forming an isolation layer over the substrate to define an active region, forming mask patterns with a first width opening exposing a region where recess patterns are to be formed, and a second width opening smaller than the first width and exposing the isolation layer, forming a passivation layer along a height difference of the mask patterns, etching the substrate using the passivation layer and the mask patterns as an etch barrier to form recess patterns, removing the passivation layer and the mask patterns, and forming gate patterns protruding from the substrate to fill the recess patterns. | 01-21-2010 |
| 20110159687 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes forming a plurality of plugs over a die region and an edge bead removal (EBR) region of a wafer, forming metal lines coupled to the plugs, removing the metal lines in the EBR region, forming an inter-layer dielectric layer over the wafer, and forming a plurality of contact holes that expose the metal lines by selectively etching the inter-layer dielectric layer through a dry etch process using a plasma etch device. | 06-30-2011 |
Hae-Jung Lee, Kyoungki-Do KR
| Patent application number | Description | Published |
|---|---|---|
| 20080220543 | Method for fabricating semiconductor device - A method for fabricating a semiconductor device includes forming a fuse over a substrate, the fuse having a barrier layer, a metal layer, and an anti-reflective layer stacked, selectively removing the anti-reflective layer, forming an insulation layer over a whole surface of the resultant structure including the fuse, and performing repair-etching such that part of the insulation layer remains above the fuse. | 09-11-2008 |