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| 20080266976 | NAND MEMORY DEVICE AND PROGRAMMING METHODS - A NAND Flash memory device is described that can reduce circuitry noise during program operations. The memory includes bit lines that can be electrically coupled together to charge share their respective voltage potentials prior to performing a discharge operation on the bit lines. | 10-30-2008 |
| 20090073772 | PROGRAM METHOD WITH OPTIMIZED VOLTAGE LEVEL FOR FLASH MEMORY - A non-volatile memory device and programming process is described that increases the programming voltage of successive programming cycles in relation to the percentage of the data bits that failed programming verification during the previous programming cycle and were not correctly programmed into the memory array. This allows for a faster on average program operation and a more accurate match of the subsequent increase in the programming voltage to the non-volatile memory device, the specific region or row being programmed and any changes due to device wear. In one embodiment of the present invention the manufacturing process/design and/or specific memory device is characterized by generating a failed bit percentage to programming voltage increase profile to set the desired programming voltage delta/increase. In another embodiment of the present invention, methods and apparatus are related for the programming of data into non-volatile memory devices and, in particular, NAND and NOR architecture Flash memory. | 03-19-2009 |
| 20090097331 | INTERLEAVED INPUT SIGNAL PATH FOR MULTIPLEXED INPUT - System and method for latching input signals from multiplexed signal lines. An input signal path includes a command path and an address path. In one embodiment, a command latch of the command path latches commands from the input signals and the address path includes a plurality of address latches that latch addresses from the input signals in an interleaved manner. In another embodiment, the command path includes a plurality of command latches that latch commands from the input signals in an interleaved manner and the address path includes a plurality of address latches that latch addresses from the input signals in an interleaved manner. | 04-16-2009 |
| 20090116283 | Controlling a memory device responsive to degradation - Embodiments of the present invention disclosed herein include devices, systems and methods, such as those directed to non-volatile memory devices and systems capable of determining a degradation parameter associated with one or more memory cells. Disclosed devices and systems according to embodiments of the present invention include those that utilize the degradation parameter to adjust control signals coupled to the memory cells. | 05-07-2009 |
| 20100074020 | CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE - A charge pump in a memory device is activated to produce a programming voltage prior to data loading during a programming operation. During an initial programming cycle, first and second load voltages are charged from the charge pump. The first load is removed from the charge pump during a verify operation. The first load voltage is subsequently recharged by charge sharing from the second load voltage so that the charge pump is not initially necessary for recharging the first load voltage. | 03-25-2010 |
| 20100124115 | PROGRAM AND SENSE OPERATIONS IN A NON-VOLATILE MEMORY DEVICE - Methods for programming and sensing in a memory device, a data cache, and a memory device are disclosed. In one such method, all of the bit lines of a memory block are programmed or sensed during the same program or sense operation by alternately multiplexing the odd or even page bit lines to the dynamic data cache. The dynamic data cache is comprised of dual SDC, PDC, DDC | 05-20-2010 |
| 20100142283 | PROGRAM METHOD WITH OPTIMIZED VOLTAGE LEVEL FOR FLASH MEMORY - A non-volatile memory device and programming process is described that increases the programming voltage of successive programming cycles in relation to the percentage of the data bits that failed programming verification during the previous programming cycle and were not correctly programmed into the memory array. This allows for a faster on average program operation and a more accurate match of the subsequent increase in the programming voltage to the non-volatile memory device, the specific region or row being programmed and any changes due to device wear. In one embodiment of the present invention the manufacturing process/design and/or specific memory device is characterized by generating a failed bit percentage to programming voltage increase profile to set the desired programming voltage delta/increase. In another embodiment of the present invention, methods and apparatus are related for the programming of data into non-volatile memory devices and, in particular, NAND and NOR architecture Flash memory. | 06-10-2010 |
| 20110122699 | CONTROLLING A MEMORY DEVICE RESPONSIVE TO DEGRADATION - Embodiments of the present invention disclosed herein include devices, systems and methods, such as those directed to non-volatile memory devices and systems capable of determining a degradation parameter associated with one or more memory cells. Disclosed devices and systems according to embodiments of the present invention include those that utilize the degradation parameter to adjust control signals coupled to the memory cells. | 05-26-2011 |
| 20110179218 | METHOD FOR READING A MULTILEVEL CELL IN A NON-VOLATILE MEMORY DEVICE - A non-volatile memory device has a memory array comprising a plurality of memory cells. The array can operate in either a multilevel cell or single level cell mode and each cell has a lower page and an upper page of data. The memory device has a data latch for storing flag data and a cache latch coupled to the data latch. A read method comprises initiating a lower page read of a memory cell and reading, from the data latch, flag data that indicates whether a lower page read operation is necessary. | 07-21-2011 |
| 20110280078 | CHARGE PUMP OPERATION IN A NON-VOLATILE MEMORY DEVICE - A charge pump in a memory device is activated to produce a programming voltage prior to data loading during a programming operation. During an initial programming cycle, first and second load voltages are charged from the charge pump. The first load is removed from the charge pump during a verify operation. The first load voltage is subsequently recharged by charge sharing from the second load voltage so that the charge pump is not initially necessary for recharging the first load voltage. | 11-17-2011 |
| 20110292732 | NAND MEMORY DEVICE AND PROGRAMMING METHODS - A NAND Flash memory device reduces circuitry noise during program operations. The memory includes bit lines that are electrically coupled together to charge share their respective voltage potentials prior to performing a discharge operation on the bit lines. A NAND flash cell is programmed by coupling a first memory array bit line to a program voltage to program the memory cell, biasing a second memory array bit line to a ground potential, wherein the second memory array bit line is located adjacent to the first memory array bit line, activating at least one first transistor to electrically coupling the first and second memory array bit lines together, and activating at least one second transistor to electrically couple the first and second memory array bit lines to a discharge potential. | 12-01-2011 |
| 20110296093 | PROGRAM AND SENSE OPERATIONS IN A NON-VOLATILE MEMORY DEVICE - Methods for programming and sensing in a memory device, a data cache, and a memory device are disclosed. In one such method, all of the bit lines of a memory block are programmed or sensed during the same program or sense operation by alternately multiplexing the odd or even page bit lines to the dynamic data cache. The dynamic data cache comprises dual SDC, PDC, DDC1, and DDC2 circuits such that one set of circuits is coupled to the odd page bit lines and the other set of circuits is coupled to the even page bit lines. | 12-01-2011 |
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| 20090093823 | Devices, Systems and Methods Useable for Treating Sinusitis - Sinusitis and other disorders of the ear, nose and throat are diagnosed and/or treated using minimally invasive approaches with flexible or rigid instruments. Various methods and devices are used for remodeling or changing the shape, size or configuration of a sinus ostium or duct or other anatomical structure in the ear, nose or throat; implanting a device, cells or tissues; removing matter from the ear, nose or throat; delivering diagnostic or therapeutic substances or performing other diagnostic or therapeutic procedures. Introducing devices (e.g., guide catheters, tubes, guidewires, elongate probes, other elongate members) may be used to facilitate insertion of working devices (e.g. catheters e.g. balloon catheters, guidewires, tissue cutting or remodeling devices, devices for implanting elements like stents, electrosurgical devices, energy emitting devices, devices for delivering diagnostic or therapeutic agents, substance delivery implants, scopes etc.) into the paranasal sinuses or other structures in the ear, nose or throat. Specific devices (e.g., tubular guides, guidewires, balloon catheters, tubular sheaths) are provided as are methods for manufacturing and using such devices to treat disorders of the ear, nose or throat. | 04-09-2009 |
| 20100042046 | DEVICES, SYSTEMS AND METHODS USEABLE FOR TREATING SINUSITIS - Sinusitis and other disorders of the ear, nose and throat are diagnosed and/or treated using minimally invasive approaches with flexible or rigid instruments. Various methods and devices are used for remodeling or changing the shape, size or configuration of a sinus ostium or duct or other anatomical structure in the ear, nose or throat; implanting a device, cells or tissues; removing matter from the ear, nose or throat; delivering diagnostic or therapeutic substances or performing other diagnostic or therapeutic procedures. Introducing devices (e.g., guide catheters, tubes, guidewires, elongate probes, other elongate members) may be used to facilitate insertion of working devices (e.g. catheters e.g. balloon catheters, guidewires, tissue cutting or remodeling devices, devices for implanting elements like stents, electrosurgical devices, energy emitting devices, devices for delivering diagnostic or therapeutic agents, substance delivery implants, scopes etc.) into the paranasal sinuses or other structures in the ear, nose or throat. Specific devices (e.g., tubular guides, guidewires, balloon catheters, tubular sheaths) are provided as are methods for manufacturing and using such devices to treat disorders of the ear, nose or throat. | 02-18-2010 |
| 20100174138 | DEVICES, SYSTEMS AND METHODS USEABLE FOR TREATING SINUSITIS - Sinusitis and other disorders of the ear, nose and throat are diagnosed and/or treated using minimally invasive approaches with flexible or rigid instruments. Various methods and devices are used for remodeling or changing the shape, size or configuration of a sinus ostium or duct or other anatomical structure in the ear, nose or throat; implanting a device, cells or tissues; removing matter from the ear, nose or throat; delivering diagnostic or therapeutic substances or performing other diagnostic or therapeutic procedures. Introducing devices (e.g., guide catheters, tubes, guidewires, elongate probes, other elongate members) may be used to facilitate insertion of working devices (e.g. catheters e.g. balloon catheters, guidewires, tissue cutting or remodeling devices, devices for implanting elements like stents, electrosurgical devices, energy emitting devices, devices for delivering diagnostic or therapeutic agents, substance delivery implants, scopes etc.) into the paranasal sinuses or other structures in the ear, nose or throat. Specific devices (e.g., tubular guides, guidewires, balloon catheters, tubular sheaths) are provided as are methods for manufacturing and using such devices to treat disorders of the ear, nose or throat. | 07-08-2010 |
| 20100174308 | DEVICES, SYSTEMS AND METHODS USEABLE FOR TREATING SINUSITIS - Sinusitis and other disorders of the ear, nose and throat are diagnosed and/or treated using minimally invasive approaches with flexible or rigid instruments. Various methods and devices are used for remodeling or changing the shape, size or configuration of a sinus ostium or duct or other anatomical structure in the ear, nose or throat; implanting a device, cells or tissues; removing matter from the ear, nose or throat; delivering diagnostic or therapeutic substances or performing other diagnostic or therapeutic procedures. Introducing devices (e.g., guide catheters, tubes, guidewires, elongate probes, other elongate members) may be used to facilitate insertion of working devices (e.g. catheters e.g. balloon catheters, guidewires, tissue cutting or remodeling devices, devices for implanting elements like stents, electrosurgical devices, energy emitting devices, devices for delivering diagnostic or therapeutic agents, substance delivery implants, scopes etc.) into the paranasal sinuses or other structures in the ear, nose or throat. Specific devices (e.g., tubular guides, guidewires, balloon catheters, tubular sheaths) are provided as are methods for manufacturing and using such devices to treat disorders of the ear, nose or throat. | 07-08-2010 |
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| 20090004850 | PROCESS FOR FORMING COBALT AND COBALT SILICIDE MATERIALS IN TUNGSTEN CONTACT APPLICATIONS - Embodiments of the invention described herein generally provide methods for forming cobalt silicide layers and metallic cobalt layers by using various deposition processes and annealing processes. In one embodiment, a method for forming a metallic silicide containing material on a substrate is provided which includes forming a metallic silicide material over a silicon-containing surface during a vapor deposition process by sequentially depositing a plurality of metallic silicide layers and silyl layers on the substrate, depositing a metallic capping layer over the metallic silicide material, heating the substrate during an annealing process, and depositing a metallic contact material over the barrier material. In one example, the metallic silicide layers and the metallic capping layer both contain cobalt. The cobalt silicide material may contain a silicon/cobalt atomic ratio of about 1.9 or greater, such as greater than about 2.0, or about 2.2 or greater. | 01-01-2009 |
| 20090053426 | COBALT DEPOSITION ON BARRIER SURFACES - Embodiments of the invention provide processes for depositing a cobalt layer on a barrier layer and subsequently depositing a conductive material, such as copper or a copper alloy, thereon. In one embodiment, a method for depositing materials on a substrate surface is provided which includes forming a barrier layer on a substrate, exposing the substrate to dicobalt hexacarbonyl butylacetylene (CCTBA) and hydrogen to form a cobalt layer on the barrier layer during a vapor deposition process (e.g., CVD or ALD), and depositing a conductive material over the cobalt layer. In some examples, the barrier layer and/or the cobalt layer may be exposed to a gas or a reagent during a treatment process, such as a thermal process, an in situ plasma process, or a remote plasma process. | 02-26-2009 |
| 20110086509 | PROCESS FOR FORMING COBALT AND COBALT SILICIDE MATERIALS IN TUNGSTEN CONTACT APPLICATIONS - Embodiments of the invention generally provide methods for forming cobalt silicide. In one embodiment, a method for forming a cobalt silicide material includes exposing a substrate having a silicon-containing material to either a wet etch solution or a pre-clean plasma during a first step and then to a hydrogen plasma during a second step of a pre-clean process. The method further includes depositing a cobalt metal layer on the silicon-containing material by a CVD process, heating the substrate to form a first cobalt silicide layer comprising CoSi at the interface of the cobalt metal layer and the silicon-containing material during a first annealing process, removing any unreacted cobalt metal from the substrate during an etch process, and heating the substrate to form a second cobalt silicide layer comprising CoSi | 04-14-2011 |
| 20110104400 | METHOD FOR DEPOSITING AN AMORPHOUS CARBON FILM WITH IMPROVED DENSITY AND STEP COVERAGE - A method for depositing an amorphous carbon layer on a substrate includes the steps of positioning a substrate in a chamber, introducing a hydrocarbon source into the processing chamber, introducing a heavy noble gas into the processing chamber, and generating a plasma in the processing chamber. The heavy noble gas is selected from the group consisting of argon, krypton, xenon, and combinations thereof and the molar flow rate of the noble gas is greater than the molar flow rate of the hydrocarbon source. A post-deposition termination step may be included, wherein the flow of the hydrocarbon source and the noble gas is stopped and a plasma is maintained in the chamber for a period of time to remove particles therefrom. | 05-05-2011 |
| 20110233778 | FORMATION OF LINER AND BARRIER FOR TUNGSTEN AS GATE ELECTRODE AND AS CONTACT PLUG TO REDUCE RESISTANCE AND ENHANCE DEVICE PERFORMANCE - The invention provides a method of forming a film stack on a substrate, comprising depositing a tungsten nitride layer on the substrate, subjecting the substrate to a nitridation treatment using active nitrogen species from a remote plasma, and depositing a conductive bulk layer directly on the tungsten nitride layer without depositing a tungsten nucleation layer on the tungsten nitride layer as a growth site for tungsten. | 09-29-2011 |
| 20110298062 | METAL GATE STRUCTURES AND METHODS FOR FORMING THEREOF - Metal gate structures and methods for forming thereof are provided herein. In some embodiments, a method for forming a metal gate structure on a substrate having a feature formed in a high k dielectric layer may include depositing a first layer within the feature atop the dielectric layer; depositing a second layer comprising cobalt or nickel within the feature atop the first layer; and depositing a third layer comprising a metal within the feature atop the second layer to fill the feature, wherein at least one of the first or second layers forms a wetting layer to form a nucleation layer for a subsequently deposited layer, wherein one of the first, second, or third layers forms a work function layer, and wherein the third layer forms a gate electrode. | 12-08-2011 |
| 20110312148 | CHEMICAL VAPOR DEPOSITION OF RUTHENIUM FILMS CONTAINING OXYGEN OR CARBON - Methods for depositing ruthenium-containing films are provided herein. In some embodiments, a method of depositing a ruthenium-containing film on a substrate may include depositing a ruthenium-containing film on a substrate using a ruthenium-containing precursor, the deposited ruthenium-containing film having carbon incorporated therein; and exposing the deposited ruthenium-containing film to an oxygen-containing gas to remove at least some of the carbon from the deposited ruthenium-containing film. In some embodiments, the oxygen-containing gas exposed ruthenium-containing film may be annealed in a hydrogen-containing gas to remove at least some oxygen from the ruthenium-containing film. In some embodiments, the deposition, exposure, and annealing may be repeated to deposit the ruthenium-containing film to a desired thickness. | 12-22-2011 |
| 20120012465 | METHODS FOR FORMING BARRIER/SEED LAYERS FOR COPPER INTERCONNECT STRUCTURES - Methods for forming barrier/seed layers for interconnect structures are provided herein. In some embodiments, a method of processing a substrate having an opening formed in a first surface of the substrate, the opening having a sidewall and a bottom surface, the method may include forming a layer comprising manganese (Mn) and at least one of ruthenium (Ru) or cobalt (Co) on the sidewall and bottom surface of the opening; and depositing a conductive material on the layer to fill the opening. In some embodiments, one of ruthenium (Ru) or cobalt (Co) is deposited on the sidewall and bottom surface of the opening. The materials may be deposited by chemical vapor deposition (CVD) or by physical vapor deposition (PVD). | 01-19-2012 |
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| 20090199132 | QUICK ACCESS TO VIRTUAL APPLICATIONS - An embedded operating system (OS) displays a user interface (UI) without waiting for the host OS to fully load. In one embodiment, the UI comprises icons for applications, advertisements, and browsers already configured with a URL. In one embodiment, the pre-configured browsers are set by the manufacturer. In another embodiment, the user can specify pre-configured browsers. In one embodiment, the icon owner pays for displaying an icon. The icon can be a static or a dynamic icon. Dynamic icons are downloaded from a file server. | 08-06-2009 |
| 20100115254 | Synchronization in Multiple Environments - A method and apparatus for synchronizing different environments in response to a change in one of the environments. The term environment encompasses operating systems, virtual machines, and states. The synchronization functions when one environment controls a master file or the environments access a shared folder. The synchronization is one-way or two-ways. The synchronization applies to digital photos, personal information management data, shared maps and directions, documents, configuration data, network settings, browser data sync, account information for accessing the client, and local and web applications. | 05-06-2010 |
| 20110314093 | Remote Server Environment - A system in which computer content is encoded at low latency and distributed to one or more client devices and in which user gestures on the client device are translated into a digital representation of the computer's native input format, thereby allowing the client device to control the computer. A method of capturing screen data on a desktop system, packaging the captured content, streaming the content to one or more client device, decoding the content on the client-side, displaying the decoded content on the client device, accepting user input, transmitting the user input to the desktop system, translating the input into a native format, and controlling the desktop system using the translated user input. | 12-22-2011 |
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| 20080320295 | METHOD AND APPARATUS FOR VIRTUALIZATION OF APPLIANCES - A method and apparatus for the virtualization of appliances provides an embedded operating system (OS) which is included in the system boot ROM of a personal computer. When the system boots, the OS is launched and looks for all available virtual appliances from, for example, the following places: local USB, flash card, e.g. SD, xD, CF, CDROM/DVD, or other storage media; local hard disk storage; and the Internet, e.g. an appliance server. The user selects an appliance to use from the OS, whereupon the appliance is loaded and launched. If the selected appliance is not on a local storage, then it is downloaded, e.g. over the Internet from an appliance server. The downloaded appliance can be cached in local storage media such that, the next time it is needed, it need not be downloaded from the appliance server. The user can also elect to boot an operating system from the hard disk, if an operating system and hard disk are installed, or to power-off the system. | 12-25-2008 |
| 20100306773 | Instant on Platform - A method and apparatus allows multiple computer operating systems (OS) and/or personalities to run concurrently. An instant-on platform includes a resource management service, a caching service, a profile manager, a network stack which provides TCP/IP communication to the OS, and at least one appliance. The instant-on platform can be placed in the path of network and disk traffic between said user OS and actual system hardware. User selectable profiles and personalities are also provided. | 12-02-2010 |
