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Gupta, Fremont
Ajit Gupta, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20110016180 | APPLICATION ACCELERATION AS A SERVICE SYSTEM AND METHOD - Disclosed are systems and methods to provide application acceleration as a service. In one embodiment, a system includes a head office to serve an enterprise application comprised of a collaborative document. The system also includes a branch office to request the collaborative document from the head office. The enterprise application may also include a computed document and/or a static document. In addition, the system also includes a set of Point of Presence (POP) locations between the head office and the branch office to communicate the collaborative document, the computed document and the static document on behalf of the head office from a closest POP location to the head office to a closest POP location to the branch office and then onward to the branch office. | 01-20-2011 |
Ajit K. Gupta, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090132648 | CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK SYSTEM - A content delivery and global traffic management network system provides a plurality of caching servers connected to a network. The caching servers host customer content that can be cached and stored, and respond to requests for Web content from clients. If the requested content does not exist in memory or on disk, it generates a request to an origin site to obtain the content. A DNS Server load balances network requests among customer Web servers and directs client requests for hosted customer content to the appropriate caching server. The customer pays a service that provides the content delivery and global traffic management network system a fee for usage of the content delivery and global traffic management network system. | 05-21-2009 |
| 20090210528 | METHOD FOR DETERMINING METRICS OF A CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK - A method for determining metrics of a content delivery and global traffic management network provides service metric probes that determine the service availability and metric measurements of types of services provided by a content delivery machine. Latency probes are also provided for determining the latency of various servers within a network. Service metric probes consult a configuration file containing each DNS name in its area and the set of services. Each server in the network has a metric test associated with each service supported by the server which the service metric probes periodically performs metric tests on and records the metric test results which are periodically sent to all of the DNS servers in the network. DNS servers use the test result updates to determine the best server to return for a given DNS name. The latency probe calculates the latency from its location to a client's location using the round trip time for sending a packet to the client to obtain the latency value for that client. The latency probe updates the DNS servers with the clients' latency data. The DNS server uses the latency test data updates to determine the closest server to a client. | 08-20-2009 |
| 20110099290 | METHOD FOR DETERMINING METRICS OF A CONTENT DELIVERY AND GLOBAL TRAFFIC MANAGEMENT NETWORK - A method for determining metrics of a content delivery and global traffic management network provides service metric probes that determine the service availability and metric measurements of types of services provided by a content delivery machine. Latency probes are also provided for determining the latency of various servers within a network. Service metric probes consult a configuration file containing each DNS name in its area and the set of services. Each server in the network has a metric test associated with each service supported by the server which the service metric probes periodically performs metric tests on and records the metric test results which are periodically sent to all of the DNS servers in the network. DNS servers use the test result updates to determine the best server to return for a given DNS name. The latency probe calculates the latency from its location to a client's location using the round trip time for sending a packet to the client to obtain the latency value for that client. The latency probe updates the DNS servers with the clients' latency data. The DNS server uses the latency test data updates to determine the closest server to a client. | 04-28-2011 |
Ajit Kumar Gupta, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090172145 | INTEGRATED POINT OF PRESENCE SERVER NETWORK - A network of point of presence servers allows a customer to organize their web site by functions where functions are mapped into domain names. The functions have requirements that define what is needed by a server to satisfy the function. The domain names are mapped into resources or servers that can be addressed by the domain name and that satisfy requests for the function that domain name has been defined to support. This method of organization allows individual elements of a web page to be retrieved from different resources and gives the name server the control to direct users to an available and optimal server for a given resource. | 07-02-2009 |
| 20110167111 | METHOD FOR OPERATING AN INTEGRATED POINT OF PRESENCE SERVER NETWORK - A method for operating a network of point of presence servers sharing a hostname includes receiving a request from a user for a web page at a first web address, determining traffic loads of a plurality of customer web servers, determining a customer web server from the plurality of customer web servers, the customer web server having a traffic load lower than traffic loads of remaining customer web servers, directing the request from the user to the customer web server, receiving a request from the user for static content on the web page at a second web address, determining the point of presence server from the network of point of presence servers that is appropriate for the request, the point of presence server having service metrics more appropriate than service metrics of remaining point of presence servers from the network. | 07-07-2011 |
Alok Gupta, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090161453 | METHOD AND APPARATUS FOR CALIBRATING WRITE TIMING IN A MEMORY SYSTEM - A system that calibrates timing relationships between signals involved in performing write operations is described. This system includes a memory controller which is coupled to a set of memory chips, wherein each memory chip includes a phase detector configured to calibrate a phase relationship between a data-strobe signal and a clock signal received at the memory chip from the memory controller during a write operation. Furthermore, the memory controller is configured to perform one or more write-read-validate operations to calibrate a clock-cycle relationship between the data-strobe signal and the clock signal, wherein the write-read-validate operations involve varying a delay on the data-strobe signal relative to the clock signal by a multiple of a clock period. In a variation of this system, the phase detector on the memory chip is configured to receive signals including a clock signal, a marking signal and a data-strobe signal from the memory controller, wherein the marking signal includes a pulse which marks a specific clock cycle in the clock signal. In this variation, the phase detector is configured to use the marking signal to window the specific clock cycle in the clock signal, and to use the data-strobe signal to capture the windowed clock signal, thereby creating a feedback signal which is returned to the memory controller to facilitate calibration of the timing relationship. | 06-25-2009 |
Naveen Gupta, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20080208556 | Accurate pin-based memory power model using arc-based characterization - A pin-based memory power modeling method using arc-based characterization includes steps as follows. All power arcs of a memory model are identified and characterized. A power arc is selected from the identified and characterized power arcs. Output bus switching power is computed by removing overlapping power using the selected power arc, and a temporary value for various input ramp times and output loads is derived. Output pin power for the selected power arc is calculated using the temporary value and a ratio of a number of output bits switching over an entire bus width. Switching power for the selected power arc is calculated by a power estimation tool based on port activity and an input intrinsic power value. | 08-28-2008 |
Vikram Gupta, Fremont, CA US
| Patent application number | Description | Published |
|---|---|---|
| 20090240971 | OPTIMIZED PERFORMANCE AND POWER ACCESS TO A SHARED RESOURCE IN A MULTICLOCK FREQUENCY SYSTEM ON A CHIP APPLICATION - A request from a first processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the first processor at a first clock frequency. A request from a second processor for access to a shared resource in a computing system is received, and access is provided to the shared resource by the second processor at a second clock frequency that is lower than the first clock frequency. | 09-24-2009 |
| 20090273101 | Apparatus and Method for Preventing Configurable System-on-a-Chip Integrated Circuits from Becoming I/O Limited - An integrated circuit containing multiple modules coupled to a pad via a multiplexer. The modules are selectively coupled to the pad by the multiplexer to provide integrated circuit function flexibility with a limited number of pads. A multiplexer select signal determines which module or clock circuit is coupled by the multiplexer. A common buffer may be coupled between the multiplexer and the pad to save substrate space. An analog circuit may be coupled to the pad to provide a signal path minimizing signal distortion. The integrated circuit's clock may be coupled via the multiplexer to an off-substrate circuit. Selective module coupling improves the integrated circuit's testing speed, may salvage an integrated circuit containing a malfunctioning module, and provides for signal loopback during testing. | 11-05-2009 |