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Gupta, AZ

Anand Gupta, Phoenix, AZ US

Patent application numberDescriptionPublished
20080210302Methods and apparatus for forming photovoltaic cells using electrospray - Methods of forming a photovoltaic structures including nanoparticles are disclosed. The method includes electrospray deposition of nanoparticles. The nanoparticles can include TiO09-04-2008

Anand Gupta, Tucson, AZ US

Patent application numberDescriptionPublished
20120200509HAPTICS EFFECT CONTROLLER ARCHITECTURE AND INSTRUCTION SET - A method for generating a desired haptics effect is provided. A haptics effect instruction is generated by a host processor responsive to a touch screen, where the haptics effect instruction corresponds to the desired haptics effect. This haptics effect instruction is received by a haptics driver, and a haptic profile from the haptics effect instruction is generated from the haptics effect instruction. The haptic profile includes at least one of a profile word, a move word, wait/halt word, and a branch word, and a sine wave is generated from the from the haptic profile that corresponds to the desired haptics effect.08-09-2012

Ashish X. Gupta, Chandler, AZ US

Patent application numberDescriptionPublished
20100164510LIQUID TIM DISPENSE AND REMOVAL METHOD AND ASSEMBLY - In some embodiments, a liquid TIM dispense and removal method and assembly is presented. In this regard, a method is introduced including loading an absorbent material of a thermal control unit with a liquid thermal interface material (TIM), pressing the absorbent material against an integrated circuit device causing the liquid TIM to be released, testing the integrated circuit device, and removing the absorbent material from against the integrated circuit device causing the liquid TIM to be reabsorbed. Other embodiments are also disclosed and claimed.07-01-2010
20110109335Direct liquid-contact micro-channel heat transfer devices, methods of temperature control for semiconductive devices, and processes of forming same - An apparatus to test a semiconductive device includes a base plane that holds at least one heat-transfer fluid unit cell. The at least one heat-transfer fluid unit cell includes a fluid supply structure including a supply-orifice cross section as well as a fluid return structure including a return-orifice cross section. The supply-orifice cross section is greater than the return-orifice cross section. A die interface is also included to be a liquid-impermeable material.05-12-2011

Debabrata Gupta, Scottsdale, AZ US

Patent application numberDescriptionPublished
20120145442INTERCONNECT STRUCTURE - A microelectronic assembly includes a first surface and a first thin conductive element exposed at the first surface and having a face comprising first and second regions. A first conductive projection having a base connected to and covering the first region of the face extends to an end remote from the base. A first dielectric material layer covers the second region of the first thin element and contacts at least the base of the first conductive projection. The assembly further includes a second substrate having a second face and a second conductive projection extending away from the second face. A first fusible metal mass connects the first projection to the second projection and extends along an edge of the first projection towards the first dielectric material layer.06-14-2012

Lokesh M. Gupta, Tucson, AZ US

Patent application numberDescriptionPublished
20100318744DIFFERENTIAL CACHING MECHANISM BASED ON MEDIA I/O SPEED - A method for allocating space in a cache based on media I/O speed is disclosed herein. In certain embodiments, such a method may include storing, in a read cache, cache entries associated with faster-responding storage devices and cache entries associated with slower-responding storage devices. The method may further include implementing an eviction policy in the read cache. This eviction policy may include demoting, from the read cache, the cache entries of faster-responding storage devices faster than the cache entries of slower-responding storage devices, all other variables being equal. In certain embodiments, the eviction policy may further include demoting, from the read cache, cache entries having a lower read-hit ratio faster than cache entries having a higher read-hit ratio, all other variables being equal. A corresponding computer program product and apparatus are also disclosed and claimed herein.12-16-2010
20100325356NONVOLATILE STORAGE THRESHOLDING - Embodiments for facilitating data transfer between a nonvolatile storage (NVS) write cache and a pool of target storage devices are provided. Each target storage device in the pool of target storage devices is determined as one of a hard disk drive (HDD) and a solid-state drive (SSD) device, and classified into one of a SSD rank group and a HDD rank group. If no data is received in the NVS write cache for a predetermined time to be written to a target storage device classified in the SSD rank group, a threshold of available space in the NVS write cache is set to allocate at least a majority of the available space to the HDD rank group. Upon receipt of a write request for the SSD rank group, the threshold of the available space is reduced to allocate a greater portion of the available space to the SSD rank group.12-23-2010
20110087837SECONDARY CACHE FOR WRITE ACCUMULATION AND COALESCING - A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed and claimed herein.04-14-2011
20110191534DYNAMIC MANAGEMENT OF DESTAGE TASKS IN A STORAGE CONTROLLER - Method, system, and computer program product embodiments for facilitating data transfer from a write cache and NVS via a device adapter to a pool of storage devices by a processor or processors are provided. The processor(s) adaptively varies the destage rate based on the current occupancy of the NVS for a particular storage device and stage activity related to that storage device. The stage activity includes one or more of the storage device stage activity, device adapter stage activity, device adapter utilized bandwidth and the read/write speed of the storage device. These factors are generally associated with read response time in the event of a cache miss and not ordinarily associated with dynamic management of the destage rate. This combination maintains the desired overall occupancy of the NVS while improving response time performance.08-04-2011
20110196987COMPRESSION ON THIN PROVISIONED VOLUMES USING EXTENT BASED MAPPING - Method, system, and computer program product embodiments for facilitating data compression are provided. A set of logical extents, each having compressed logical tracks of data, is mapped to a head physical extent and, if the head physical extent is determined to have been filled, to at least one overflow extent having spatial proximity to the head physical extent. Pursuant to at least one subsequent write operation and destage operation, the at least one subsequent write operation and destage operation determined to be associated with the head physical extent, the write operation is mapped to one of the head physical extent, the at least one overflow extent, and an additional extent having spatial proximity to the at least one overflow extent.08-11-2011
20110202708Integrating A Flash Cache Into Large Storage Systems - An I/O enclosure module is provided with one or more I/O enclosures having a plurality of slots for receiving electronic devices. A host adapter is connected a first slot of the I/O enclosure module and is configured to connect a host to the I/O enclosure. A device adapter is connected to a second slot of the I/O enclosure module and is configured to connect a storage device to the I/O enclosure module. A flash cache is connected to a third slot of the I/O enclosure module and includes a flash-based memory configured to cache data associated with data requests handled through the I/O enclosure module. A primary processor complex manages data requests handled through the I/O enclosure module by communicating with the host adapter, device adapter, and flash cache to manage to the data requests.08-18-2011
20120079187MANAGEMENT OF WRITE CACHE USING STRIDE OBJECTS - Method, system, and computer program product embodiments for, in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit, identifying working data on a stride basis by a processor device are provided. A multi-update bit is established for each stride in a modified cache. The multi-update bit is adapted to indicate at least one track in a working set. A schedule of destage scans is configured based on a plurality of levels of urgency. A destage operation is performed based on at least one of a number of strides examined by the destage scans, whether the multi-update bit is set, and whether an emergency level of the plurality of levels of urgency is active.03-29-2012
20120079199INTELLIGENT WRITE CACHING FOR SEQUENTIAL TRACKS - Method, system, and computer program product embodiments for, in a computing storage environment for destaging data from nonvolatile storage (NVS) to a storage unit, write caching for sequential tracks by a processor device are provided. If a first track is determined to be sequential, and an earlier track is also determined to be sequential, a temporal bit associated with the earlier track is cleared to allow for destage of data of the earlier track. If a temporal bit for one of a plurality of additional tracks in one of a plurality of strides in a modified cache is determined to be not set, a stride associated with the one of the plurality of additional tracks is selected for a destage operation. If the NVS exceeds a predetermined storage threshold, a predetermined one of the plurality of strides is selected for the destage operation.03-29-2012
20120089795MULTIPLE INCREMENTAL VIRTUAL COPIES - Provided are techniques for, in response to establishing each incremental virtual copy from a source to a target, creating a target change recording structure for the target. While performing destage to a source data block at the source, it is determined that there is at least one incremental virtual copy target for this source data block. For each incremental virtual copy relationship where the source data block is newer than the incremental virtual copy relationship and an indicator is set in a target inheritance structure on the target for a corresponding target data block, the source data block is copied to each corresponding target data block, and an indicator is set in each target change recording structure on each target for the target data block corresponding to the source data block being destaged.04-12-2012
20120151140SYSTEMS AND METHODS FOR DESTAGING STORAGE TRACKS FROM CACHE - Systems and methods for destaging storage tracks from cache are provided. One system includes a cache and a processor coupled to the cache. The cache stores data in multiple storage tracks and each storage track includes an associated multi-bit counter. The processor is configured to perform the following method. One method includes writing data to the plurality of storage tracks and incrementing the multi-bit counter on each respective storage track a predetermined amount each time the processor writes to a respective storage track. The method further includes scan each of the storage tracks in each of multiple scan cycles, decrementing each multi-bit counter each scan cycle, and destaging each storage track including a zero count. Also provided are physical computer storage mediums including a computer program product for performing the above method.06-14-2012
20120151147SYSTEMS AND METHODS FOR MANAGING DESTAGE CONFLICTS - Systems and methods for managing destage conflicts in cache are provided. One system includes a cache partitioned into multiple ranks configured to store multiple storage tracks and a processor coupled to the cache. The processor is configured to perform the following method. One method includes allocating an amount of storage space in the cache to each rank and monitoring a current amount of storage space used by each rank with respect to the amount of storage space allocated to each respective rank. The method further includes destaging storage tracks from each rank until the current amount of storage space used by each respective rank is equal to a predetermined minimum amount of storage space with respect to the amount of storage space allocated to each rank. Also provided are physical computer storage mediums including code that, when executed by a processor, cause the processor to perform the above method.06-14-2012
20120151148SYSTEMS AND METHODS FOR BACKGROUND DESTAGING STORAGE TRACKS - Systems and methods for background destaging storage tracks from cache when one or more hosts are idle are provided. One system includes a write cache configured to store a plurality of storage tracks and configured to be coupled to one or more hosts, and a processor coupled to the write cache. The processor includes code that, when executed by the processor, causes the processor to perform the method below. One method includes monitoring the write cache for write operations from the host(s) and determining if the host(s) is/are idle based on monitoring the write cache for write operations from the host(s). The storage tracks are destaged from the write cache if the host(s) is/are idle and are not destaged from the write cache if one or more of the hosts is/are not idle. Also provided are physical computer storage mediums including a computer program product for performing the above method.06-14-2012
20120151151SYSTEMS AND METHODS FOR MANAGING CACHE DESTAGE SCAN TIMES - Systems and methods for managing destage scan times in a cache are provided. One system includes a cache and a processor. The processor is configured to utilize a first thread to continually determine a desired scan time for scanning the plurality of storage tracks in the cache and utilize a second thread to continually control an actual scan time of the plurality of storage tracks in the cache based on the continually determined desired scan time. One method includes utilizing a first thread to continually determine a desired scan time for scanning the plurality of storage tracks in the cache and utilizing a second thread to continually control an actual scan time of the plurality of storage tracks in the cache based on the continually determined desired scan time. Physical computer storage mediums including a computer program product for performing the above method are also provided.06-14-2012
20120185648STORAGE IN TIERED ENVIRONMENT FOR COLDER DATA SEGMENTS - Exemplary method, system, and computer program embodiments for storing data by a processor device in a computing environment are provided. In one embodiment, by way of example only, from a plurality of available data segments, a data segment having a storage activity lower than a predetermined threshold is identified as a colder data segment. A chunk of storage is located to which the colder data segment is assigned. The colder data segment is compressed. The colder data segment is migrated to the chunk of storage. A status of the chunk of storage is maintained in a compression data segment bitmap.07-19-2012
20120191904SECONDARY CACHE FOR WRITE ACCUMULATION AND COALESCING - A method for efficiently using a large secondary cache is disclosed herein. In certain embodiments, such a method may include accumulating, in a secondary cache, a plurality of data tracks. These data tracks may include modified data and/or unmodified data. The method may determine if a subset of the plurality of data tracks makes up a full stride. In the event the subset makes up a full stride, the method may destage the subset from the secondary cache. By destaging full strides, the method reduces the number of disk operations that are required to destage data from the secondary cache. A corresponding computer program product and apparatus are also disclosed herein.07-26-2012
20120198148ADAPTIVE PRESTAGING IN A STORAGE CONTROLLER - In one aspect of the present description, at least one of the value of a prestage trigger and the value of the prestage amount, may be modified as a function of the drive speed of the storage drive from which the units of read data are prestaged into a cache memory. Thus, cache prestaging operations in accordance with another aspect of the present description may take into account storage devices of varying speeds and bandwidths for purposes of modifying a prestage trigger and the prestage amount. Still further, a cache prestaging operation in accordance with further aspects may decrease one or both of the prestage trigger and the prestage amount as a function of the drive speed in circumstances such as a cache miss which may have resulted from prestaged tracks being demoted before they are used. Conversely, a cache prestaging operation in accordance with another aspect may increase one or both of the prestage trigger and the prestage amount as a function of the drive speed in circumstances such as a cache miss which may have resulted from waiting for a stage to complete. In yet another aspect, the prestage trigger may not be limited by the prestage amount. Instead, the pre-stage trigger may be permitted to expand as conditions warrant it by prestaging additional tracks and thereby effectively increasing the potential range for the prestage trigger. Other features and aspects may be realized, depending upon the particular application.08-02-2012
20120198150ASSIGNING DEVICE ADAPTORS AND BACKGROUND TASKS TO USE TO COPY SOURCE EXTENTS TO TARGET EXTENTS IN A COPY RELATIONSHIP - Provided are a computer program product, system, and method for assigning device adaptors and background tasks to use to copy source extents to target extents in a copy relationship. A relation is provided of a plurality of source extents in source ranks to copy to a plurality of target extents in target ranks in the storage system. One target rank in the relation is used to determine an order in which the target ranks in the relation are selected to register for copying. For each selected target rank in the relation selected according to the determined order, an iteration of a registration operation is performed to register the selected target rank and a selected source rank copied to the selected target rank in the relation. The registration operation comprises indicating in a device adaptor assignment data structure a source device adaptor and target device adaptor to use to copy the selected rank to the selected target rank and adding an entry to a priority queue for the relation for the selected target rank. The selected source rank is copied to the selected target rank using as the source and target device adaptors indicated in the device adaptor assignment data structure for the selected target rank in response to processing the entry in the priority queue added to the priority queue for the selected target rank.08-02-2012
20120203983COMPRESSION ON THIN PROVISIONED VOLUMES USING EXTENT BASED MAPPING - A set of logical extents, each having compressed logical tracks of data, is mapped to a head physical extent and, if the head physical extent is determined to have been filled, to at least one overflow extent having spatial proximity to the head physical extent. Pursuant to at least one subsequent write operation and destage operation, the at least one subsequent write operation and destage operation determined to be associated with the head physical extent, the write operation is mapped to one of the head physical extent, the at least one overflow extent, and an additional extent having spatial proximity to the at least one overflow extent.08-09-2012

Patent applications by Lokesh M. Gupta, Tucson, AZ US

Lokesh Mohan Gupta, Tucson, AZ US

Patent application numberDescriptionPublished
20080201523PRESERVATION OF CACHE DATA FOLLOWING FAILOVER - In a data storage subsystem with disk storage and a pair of clusters, one set of DASD fast write data is in cache of one cluster and in non-volatile data storage of the other. In response to a failover of one of the pair of clusters to a local cluster, the local cluster converts the DASD fast write data in local cache to converted fast write data to prioritize the converted data for destaging to disk storage. In response to failure to destage, the local cluster allocates local non-volatile storage tracks and emulates a host adapter to store the converted fast write data by the local non-volatile storage, reconverting the converted fast write data of the non-volatile storage to local DASD fast write data stored in the local non-volatile storage and stored in the local cache storage.08-21-2008
20080250210COPYING DATA FROM A FIRST CLUSTER TO A SECOND CLUSTER TO REASSIGN STORAGE AREAS FROM THE FIRST CLUSTER TO THE SECOND CLUSTER - Provided are a method, system, and article of manufacture for copying data from a first cluster to a second cluster to reassign storage areas from the first cluster to the second cluster. An operation is initiated to reassign storage areas from a first cluster to a second cluster, wherein the first cluster includes a first cache and a first storage unit and the second cluster includes a second cache and a second storage unit. Data in the first cache for the storage areas to reassign to the second cluster is copied to the second cache. Data in the first storage unit for storage areas remaining assigned to the first cluster is copied to the second storage unit.10-09-2008
20090300298MEMORY PRESERVED CACHE TO PREVENT DATA LOSS - A method, system, and computer program product for preserving data in a storage subsystem having dual cache and dual nonvolatile storage (NVS) through a failover from a failed cluster to a surviving cluster is provided. A memory preserved indicator is initiated to mark tracks on a cache of the surviving cluster to be preserved, the tracks having an image in an NVS of the failed cluster. A destage operation is performed to destage the marked tracks. Subsequent to a determination that each of the marked tracks have been destaged, the memory preserved indicator is disabled to remove the mark from the tracks. If the surviving cluster reboots previous to each of the marked tracks having been destaged, the cache is verified as a memory preserved cache, the marked tracks are retained for processing while all unmarked tracks are removed, and the marked tracks are processed.12-03-2009
20090300408MEMORY PRESERVED CACHE FAILSAFE REBOOT MECHANISM - A method, system and computer program product for preserving data in a storage subsystem having dual cache and dual nonvolatile storage (NVS) through a failover from a failed cluster to a surviving cluster, the surviving cluster undergoing a rebooting process, is provided. A memory preserved indicator associated with a cache of the surviving cluster is detected. The memory preserved indicator designates marked tracks having an image in an NVS of the failed cluster to be preserved through the rebooting process. A counter in a data structure of the surviving cache is incremented. If a value of the counter exceeds a predetermined value, a cache memory is initialized, and the marked tracks are removed from the cache to prevent an instance of repetitive reboots caused by a corrupted structure in the cache memory.12-03-2009
20100037226GROUPING AND DISPATCHING SCANS IN CACHE - A method, system, and computer program product for grouping and dispatching scans in a cache directory of a processing environment is provided. A plurality of scan tasks is aggregated from a scan wait queue into a scan task queue. The plurality of scan tasks is determined by selecting one of (1) each of the plurality of scan tasks on the scan wait queue, (2) a predetermined number of the plurality of scan tasks on the scan wait queue, and (3) a set of scan tasks of a similar type on the scan wait queue. A first scan task from the plurality of scan tasks is selected from the scan task queue. The scan task is performed.02-11-2010
20100191925DEFERRED VOLUME METADATA INVALIDATION - A method, system, and computer program product for managing modified metadata in a storage controller cache pursuant to a recovery action by a processor in communication with a memory device is provided. A count of modified metadata tracks for a storage rank is compared against a predetermined criterion. If the predetermined criterion is met, a storage volume having the storage rank is designated with a metadata invalidation flag to defer metadata invalidation of the modified metadata tracks until after the recovery action is performed.07-29-2010
20120131293DATA ARCHIVING USING DATA COMPRESSION OF A FLASH COPY - Embodiments of the disclosure relate to archiving data in a storage system. An exemplary embodiment comprises making a flash copy of data in a source volume, compressing data in the flash copy wherein each track of data is compressed into a set of data pages, and storing the compressed data pages in a target volume. Data extents for the target volume may be allocated from a pool of compressed data extents. After each stride worth of data is compressed and stored in the target volume, data may be destaged to avoid destage penalties. Data from the target volume may be decompressed from a flash copy of the target volume in a reverse process to restore each data track, when the archived data is needed. Data may be compressed and uncompressed using a Lempel-Ziv-Welch process.05-24-2012

Patent applications by Lokesh Mohan Gupta, Tucson, AZ US

Nidhi Gupta, Phoenix, AZ US

Patent application numberDescriptionPublished
20120021967SYNTHETIC ANTIBODIES - The present invention provides methods for synthetic antibodies, methods for making synthetic antibodies, methods for identifying ligands, and related methods and reagents.01-26-2012
20120065123Synthetic Antibodies - Methods for synthetic antibodies, methods for making synthetic antibodies, methods for identifying ligands, and related methods and reagents.03-15-2012

Rajiv Gupta, Tucson, AZ US

Patent application numberDescriptionPublished
20090172644SOFTWARE FLOW TRACKING USING MULTIPLE THREADS - Methods, systems and machine readable media are disclosed for performing dynamic information flow tracking. One method includes executing operations of a program with a main thread, and tracking the main thread's execution of the operations of the program with a tracking thread. The method further includes updating, with the tracking thread, a taint value associated with the value of the main thread to reflect whether the value is tainted, and determining, with the tracking thread based upon the taint value, whether use of the value by the main thread violates a specific security policy.07-02-2009

Sheetal Gupta, Tuscon, AZ US

Patent application numberDescriptionPublished
20100109740Clamp networks to insure operation of integrated circuit chips - Clamp networks are provided to insure successful operation of a variety of electronic circuits that are realized in the form of integrated circuit chips. These networks are especially suited for use in chips in which on-chip circuits generate a voltage to bias the chip substrate relative to the chip ground. The clamp networks are configured to drive a current between the chip ground and the chip substrate whenever the chip substrate begins to rise above the chip ground during turn on of the chip input voltage. The clamp networks thus insure that the chip substrate is properly biased when the input voltage has been established and that the chip, therefore, functions as intended.05-06-2010