Patent application number | Description | Published |
20120319215 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The present invention discloses a semiconductor device and method of manufacturing the same, comprising: forming an insulating isolation layer on a substrate; forming an insulating isolation layer trench in the insulating isolation layer; forming an active region layer in the insulating isolation layer trench; and forming a semiconductor device structure in and above the active region layer, wherein the carrier mobility of the active region layer is higher than that of the substrate. In accordance with the semiconductor device and the manufacturing method thereof in the present invention, an active region formed of a material different from that of the substrate is used, the carrier mobility in the channel region is enhanced, thereby the device response speed is substantially improved and the device performance is enhanced greatly. Furthermore, unlike the existing STI manufacturing process, in the present invention a STI is formed first, and then filling is performed to form an active region, to avoid the problem of generation of holes in the STI and improve the device reliability. | 12-20-2012 |
20130037821 | Semiconductor Device and Manufacturing Method thereof - The present invention provides a semiconductor device, comprising: a substrate; shallow trench isolations embedded into the substrate and forming at least one opening area; a channel region located in the opening area; a gate stack comprising a gate dielectric layer and a gate electrode layer and located above the channel region; source/drain regions located at both sides of the channel region and comprising a stress layer that provides a strain to the channel region; wherein, there is a liner layer between the shallow trench isolation and the stress layer, which serves as the seed layer of the stress layer. A liner layer that is of the same or similar material as the stress layer in the source/drain region is inserted between the STI and the stress layer of the source/drain region as a seed layer or nucleation layer for the epitaxial growth, thereby eliminating the STI edge effect during the source/drain strain engineering, i.e. eliminating the gap between the STI and the stress layer of the source/drain region, as a result, the reduction of the channel stress produced by the source/drain strain is prevented, the carrier mobility of the MOS device is increased and the driving capability of the device is enhanced. | 02-14-2013 |
20130087833 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The present invention discloses a semiconductor device, comprising: a substrate, a channel layer epitaxially grown in the substrate, a gate stack structure on the channel layer, gate spacers on both sides of the gate stack structure, and source/drain areas on both sides of the channel layer in the substrate, characterized in that the carrier mobility of the channel layer is higher than that of the substrate. In accordance with the semiconductor device and the method of manufacturing the same in the present invention, forming the device channel region by filling the trench with epitaxial high-mobility materials in a gate last process can enhance the carrier mobility in the channel region, thereby the device response speed is substantially improved and the device performance is greatly enhanced. Furthermore, traditional materials for a substrate are still used for the source/drain areas of the device to facilitate usage of a gate last process, thereby enhancing the performance while reducing the cost at the same time. | 04-11-2013 |
20130105859 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME | 05-02-2013 |
20130213434 | METHOD FOR ELIMINATING CONTACT BRIDGE IN CONTACT HOLE PROCESS - A method for eliminating contact bridge in a contact hole process is disclosed, wherein a cleaning menu comprising a multi-step adaptive protective thin film deposition process is provided, so that a stack adaptive protective thin film is formed on the sidewall of the chamber of the HDP CVD equipment. The stack adaptive protective thin film has good adhesivity, compactness and uniformity to protect the sidewall of the chamber of the HDP CVD equipment from being damaged by the plasma, and avoid the generation of defect particles, thereby improving the HDP CVD technical yield and eliminating the contact bridge phenomenon in the contact hole process. | 08-22-2013 |
20130313655 | SEMICONDUCTOR DEVICE AND A METHOD FOR MANUFACTURING THE SAME - A semiconductor device comprises a substrate; a shallow trench isolation embedded in the substrate and forms at least one opening region; a channel region located in the opening region; a gate stack including a gate dielectric layer and a gate electrode layer, located above said channel region; a source/drain region located on both sides of the channel region, including a stress layer which provides strain for the channel region. A liner layer is provided between the shallow trench isolation and the stress layer, which serves as a crystal seed layer of the stress layer. A liner layer and a pad oxide layer are provided between the substrate and the shallow trench isolation. The liner layer is inserted between the STI and the stress layer of the source/drain region as a crystal seed layer or nucleating layer for epitaxial growth, thereby eliminating the STI edge effect during the source/drain strain engineering. | 11-28-2013 |
20150035055 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR - A method for manufacturing a semiconductor device includes providing a substrate, forming a pseudo-gate stack and sidewalls on the substrate, forming an S/D region on both sides of the pseudo-gate stack, and forming a stop layer and a first interlayer dielectric layer covering the entire semiconductor device; removing part of the stop layer to expose the pseudo-gate stack, and further removing the pseudo-gate stack to expose the channel region; etching the channel region to form a groove structure; forming a new channel region to flush with the upper surface of the substrate, wherein the new channel region includes a buffer layer, a Ge layer, and a Si cap layer; forming a gate stack. Accordingly, the present application also discloses a semiconductor device. The present application can effectively improve the carrier mobility and the performance of the semiconductor device by replacing Si with Ge to form a new channel region. | 02-05-2015 |
20150287606 | METHOD OF DEPOSITING TUNGSTEN LAYER WITH IMPROVED ADHESION AND FILLING BEHAVIOR - A method of depositing a tungsten (W) layer is disclosed. In one aspect, the method includes depositing a SiH | 10-08-2015 |