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Guenthner, US

Andrew J. Guenthner, Ridgecrest, CA US

Patent application numberDescriptionPublished
20100139931Thermally-activated heat resistant insulating apparatus - A firefighting and protection apparatus being thermally-activated and/or heat resistant when subjected to a temperature above a pre-determined limit thermally set chemical reactions occur within the apparatus which causes the apparatus to expand in volume for multifunctional purposes including acting as an insulator against heat, an absorbent for diminishing contact between fuel and oxygen, and release inert gases and flame retardants for disrupting chemical reactions that sustain a fire.06-10-2010
20100139932Thermally-Activated Heat Resistant Insulating Apparatus - A firefighting and protection apparatus being thermally-activated and/or heat resistant when subjected to a temperature above a pre-determined limit thermally set chemical reactions occur within the apparatus which causes the apparatus to expand in volume for multifunctional purposes including acting as an insulator against heat, an absorbent for diminishing contact between fuel and oxygen, and release inert gases and flame retardants for disrupting chemical reactions that sustain a fire.06-10-2010
20100139933Thermally-Activated Heat Resistant Insulating Apparatus - A firefighting and protection apparatus being thermally-activated and/or heat resistant when subjected to a temperature above a pre-determined limit thermally set chemical reactions occur within the apparatus which causes the apparatus to expand in volume for multifunctional purposes including acting as an insulator against heat, an absorbent for diminishing contact between fuel and oxygen, and release inert gases and flame retardants for disrupting chemical reactions that sustain a fire.06-10-2010
20100144226Thermally-Activated Heat Resistant insulating Apparatus - A firefighting and protection apparatus being thermally-activated and/or heat resistant when subjected to a temperature above a pre-determined limit thermally set chemical reactions occur within the apparatus which causes the apparatus to expand in volume for multifunctional purposes including acting as an insulator against heat, an absorbent for diminishing contact between fuel and oxygen, and release inert gases and flame retardants for disrupting chemical reactions that sustain a fire.06-10-2010

Cynthia S. Guenthner, Glendale, AZ US

Patent application numberDescriptionPublished
20110093837Method and apparatus for enabling parallel processing during execution of a cobol source program using two-stage compilation - A method and apparatus is disclosed for compilation of an original Cobol program and building an executable program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a compilation (or translation) step utilizing a first compiler or translating program which is a parallel aware translating first compiler. The parallel aware first compiler is a specialized compiler/translator which takes as input a Cobol source program, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives, the intermediate program intended for further compilation utilizing an existing selected second compiler, the second compiler providing support for parallelism for programs described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.04-21-2011

Russell W. Guenthner, Glendale, AZ US

Patent application numberDescriptionPublished
20080208562Instructions providing new functionality for utilization by a target system program of host system container words during computer system emulation with host word size larger than that of the emulated machine - Two unique instructions for the instruction set of a target 36-bit machine which is emulated on a host 64-bit machine are provided in order to achieve visibility, to an emulated application program, of a “containing” word stored in the memory of the host machine. A “LOAD64” instruction loads the emulator memory location representing an emulated “Q” (supplementary accumulator) register with the “normal” 36-bits of the containing word. At the same time, the “upper” 28 bits of the 64-bit containing word is copied into the emulator memory location representing an emulated “A” (accumulator) register. Thus, the emulated 36-bit machine “sees” and can examine the 64-bit word in its entirety. A “Store64” instruction stores the emulated “Q” register contents into the lower 36-bits of the 64-bit containing word, and at the same time stores the lower 28 bits of the emulated “A” register contents into the upper 28 bits of the 64-bit containing word.08-28-2008
20100153735Entering an identifier with security improved by time based randomization of input steps based upon time - A secure method, apparatus or computer program incorporates a method for entering private information such as a user identifier, password or other secret code comprising at least one symbol or character. According to method in one illustrated embodiment, the user selects characters for input starting from presentation of an initial suggested character, moving under user control to presentation of a user's desired input character, and then followed by the selection by the user of that presented character as a character for data input. The method includes randomizing the timing of the display and/or reaction time to user input so that the number and timing of the key presses required to select any specific desired character for input is made unpredictable. This makes it difficult during entry of information to determine by covert means what specific information is being entered.06-17-2010
20110093837Method and apparatus for enabling parallel processing during execution of a cobol source program using two-stage compilation - A method and apparatus is disclosed for compilation of an original Cobol program and building an executable program with support for improved performance by increased parallelism during execution using multiple threads of processing. The approach includes a compilation (or translation) step utilizing a first compiler or translating program which is a parallel aware translating first compiler. The parallel aware first compiler is a specialized compiler/translator which takes as input a Cobol source program, and produces as output an intermediate computer program in a second computer programming language, the intermediate program including parallelization directives, the intermediate program intended for further compilation utilizing an existing selected second compiler, the second compiler providing support for parallelism for programs described in the second programming language. The approach optionally allows for use of pragmas serving as parallelization directives to the compiler in the original Cobol program or in the intermediate program.04-21-2011

Patent applications by Russell W. Guenthner, Glendale, AZ US