| Patent application number | Description | Published |
|---|
| 20090080268 | Integrated Circuit with Separate Supply Voltage for Memory That is Different from Logic Circuit Supply Voltage - In one embodiment, an integrated circuit comprises at least one logic circuit supplied by a first supply voltage and at least one memory circuit coupled to the logic circuit and supplied by a second supply voltage. The memory circuit is configured to be read and written responsive to the logic circuit even if the first supply voltage is less than the second supply voltage during use. In another embodiment, a method comprises a logic circuit reading a memory cell, the logic circuit supplied by a first supply voltage; and the memory cell responding to the read using signals that are referenced to the first supply voltage, wherein the memory cell is supplied with a second supply voltage that is greater than the first supply voltage during use. | 03-26-2009 |
| 20100231267 | Input/Output Driver with Controlled Transistor Voltages - In an embodiment, an integrated circuit comprises core circuitry and at least one driver circuit. The core circuitry is powered by a first supply voltage during use, and comprises a control circuit configured to generate a pull up control signal, a pull down control signal, and at least one reference voltage. The driver circuit is powered by a second supply voltage during use, the second supply voltage having a greater magnitude than the first supply voltage. The driver circuit is connected to a pad to be connected to a pin on a package of the integrated circuit. The driver circuit comprises a cascode connection of a first transistor and a second transistor, and a capacitor coupled between a first gate terminal of the first transistor and a second gate terminal of the second transistor. The first gate terminal is coupled to receive the pull down control signal. | 09-16-2010 |
| 20100238745 | Integrated Circuit with Separate Supply Voltage for Memory That is Different from Logic Circuit Supply Voltage - In one embodiment, an integrated circuit comprises at least one logic circuit supplied by a first supply voltage and at least one memory circuit coupled to the logic circuit and supplied by a second supply voltage. The memory circuit is configured to be read and written responsive to the logic circuit even if the first supply voltage is less than the second supply voltage during use. In another embodiment, a method comprises a logic circuit reading a memory cell, the logic circuit supplied by a first supply voltage; and the memory cell responding to the read using signals that are referenced to the first supply voltage, wherein the memory cell is supplied with a second supply voltage that is greater than the first supply voltage during use. | 09-23-2010 |
| 20100264975 | Level Shifter with Rise/Fall Delay Matching - In one embodiment, a level shifter circuit is provided that may include approximately matched rising edge and falling edge delays through the level shifter. The level shifter may also have a low delay and low power consumption. The level shifter circuit may include a pair of low voltage input inverters coupled to a pulldown transistor, where a node between the low voltage input inverters is coupled through another pulldown stack to a pullup transistor. Including an output inverter, both rising transitions and falling transitions may include about 4 gate delays in one embodiment. The level shifter may include keeper transistors to turn off the pullup transistor after the pullup is performed, and the pulldown transistor may be turned off as the pullup transistor is turned on. The pullup and pulldown transistors may not drive against each other during operation, which may reduce power consumption in the circuit. | 10-21-2010 |
| 20100279645 | Receiver to Match Delay for Single Ended and Differential Signals - In one embodiment, a receiver circuit is provide that may receive either a differential input or a single-ended input corresponding to an interface. The receiver circuit may include at least two current sources to control a gain of an amplification stage in the receiver. If the receiver circuit is receiving a differential input, one of the current sources may be used. If the receiver circuit is receiving a single-ended input, both of the current sources may be used. A larger gain may thus be provided for the single-ended input as compared to the differential input. | 11-04-2010 |
| 20110204922 | Receiver to Match Delay for Single Ended and Differential Signals - In one embodiment, a receiver circuit is provide that may receive either a differential input or a single-ended input corresponding to an interface. The receiver circuit may include at least two current sources to control a gain of an amplification stage in the receiver. If the receiver circuit is receiving a differential input, one of the current sources may be used. If the receiver circuit is receiving a single-ended input, both of the current sources may be used. A larger gain may thus be provided for the single-ended input as compared to the differential input. | 08-25-2011 |
| 20110235442 | Integrated Circuit with Separate Supply Voltage for Memory That is Different from Logic Circuit Supply Voltage - In one embodiment, an integrated circuit includes at least one logic circuit supplied by a first supply voltage and at least one memory circuit coupled to the logic circuit and supplied by a second supply voltage. The memory circuit is configured to be read and written responsive to the logic circuit even if the first supply voltage is less than the second supply voltage during use. In another embodiment, a method includes a logic circuit reading a memory cell, the logic circuit supplied by a first supply voltage; and the memory cell responding to the read using signals that are referenced to the first supply voltage, wherein the memory cell is supplied with a second supply voltage that is greater than the first supply voltage during use. | 09-29-2011 |
| 20110304363 | Input/Output Driver with Controlled Transistor Voltages - In an embodiment, an integrated circuit comprises core circuitry and at least one driver circuit. The core circuitry is powered by a first supply voltage during use, and comprises a control circuit configured to generate a pull up control signal, a pull down control signal, and at least one reference voltage. The driver circuit is powered by a second supply voltage during use, the second supply voltage having a greater magnitude than the first supply voltage. The driver circuit is connected to a pad to be connected to a pin on a package of the integrated circuit. The driver circuit comprises a cascode connection of a first transistor and a second transistor, and a capacitor coupled between a first gate terminal of the first transistor and a second gate terminal of the second transistor. The first gate terminal is coupled to receive the pull down control signal. | 12-15-2011 |
