Patent application number | Description | Published |
20080215900 | Power-Managed Server and Method for Managing Power Consumption - A power-managed server and method for managing power consumption is disclosed. According to one embodiment, a power-managed server data processing system is provided among a plurality of server data processing systems which comprises a power management communication port to communicatively couple the power-managed server data processing system to a power management server data processing system of the plurality of server data processing systems. The power-managed server data processing system of the described embodiment further comprises a system management processor coupled to the power management communication port which comprises power-managed logic configured to transmit power management data to the power management server data processing system and to receive a power management command utilizing the power management communication port. Moreover, the power management command is generated utilizing the power management data, and the power management data comprises power management capability data. | 09-04-2008 |
20090031153 | Power Management Server for Managing Power Consumption - A power management server and method for managing power consumption is disclosed. According to one embodiment, a power management server data processing system is provided, where the power management server data processing system comprises a power management communication port to communicatively couple the power management server data processing system to a power-managed server data processing system and a system management processor coupled to the power management communication port. In the described embodiment, the system management processor comprises power management logic configured to receive power management data from the power-managed server data processing system, to generate a power management command utilizing the power management data, and to transmit the power management command to the power-managed server data processing system utilizing the power management communication port. Moreover, the power management data of the described embodiment comprises power management capability data. | 01-29-2009 |
20130272515 | Selectively Filtering Incoming Communications Events In A Communications Device - Selectively filtering incoming communications events in a communications device, including: receiving, by a communications event filtering module, an incoming communications event; determining, by the communications event filtering module, whether the communications device is currently servicing a call; responsive to determining that the communications device is currently servicing a call, determining, by the communications event filtering module, whether the call is interruptible; and responsive to determining that the call is not interruptible, blocking, by the communications event filtering module, the incoming communications event from presentation by the communications device until the call has ended. | 10-17-2013 |
20130275636 | ACCESSING PERIPHERAL DEVICES - A hardware system comprises a master device and a slave device that are coupled by a signal line. A frequency generator in the master device places a selected frequency signal on the signal line. A frequency detector/comparator in the slave device, which is coupled to the signal line, determines whether the selected frequency signal on the signal line matches a predetermined frequency for the slave device. If the selected frequency signal matches the predetermined frequency, then a chip select node on the slave device is enabled, in order to permit a data exchange session between the master device and the slave device. | 10-17-2013 |
20130288502 | MEMORY MODULE CONNECTOR WITH AIR DEFLECTION SYSTEM - In one embodiment, a memory module connector includes sidewalls extending along a length of the connector body. A longitudinally oriented socket is provided between the sidewalls for receiving a card edge of a memory module. A top of the connector defines a socket opening. A bottom of the connector is for mounting to a system board. A plurality of air deflectors is provided adjacent to the connector body to manipulate airflow to improve cooling. The size, positioning, and spacing of the air deflectors may be selected to optimize cooling. | 10-31-2013 |
20130301670 | Detecting Thermal Interface Material ('TIM') Between A Heat Sink And An Integrated Circuit - Detecting TIM between a heat sink and an integrated circuit, the heat sink including TIM detection points, each TIM detection point adapted to receive TIM upon installation of the heat sink, each TIM detection point including a TIM detection device configured to be activated upon contact with TIM, including: receiving, upon installation of the heat sink on the integrated circuit and the TIM, TIM in one or more of the TIM detection points; activating, by the TIM in each of the one or more TIM detection points receiving the TIM, a TIM detection device; and determining, by a TIM detection module in dependence upon the activations of the TIM detection devices, sufficiency of the TIM between the heat sink and the integrated circuit. | 11-14-2013 |
20130301671 | Detecting Thermal Interface Material ('TIM') Between A Heat Sink And An Integrated Circuit - Detecting TIM between a heat sink and an integrated circuit, the integrated circuit including TIM detection points adapted to receive TIM upon installation of the heat sink and including a TIM detection device configured to be activated upon contact with TIM, including: receiving, upon installation of the heat sink on the integrated circuit and the TIM, TIM in one or more of the TIM detection points; activating, by the TIM in each of the one or more TIM detection points receiving the TIM, a TIM detection device; determining, by a TIM detection module of the integrated circuit in dependence upon the activations of the TIM detection devices, sufficiency of the TIM; and responsive to determining that the TIM between the heat sink and the integrated circuit is insufficient, controlling, in real-time by the TIM detection module, operation of the integrated circuit to reduce heat generated by the integrated circuit. | 11-14-2013 |
20130304954 | Dynamically Optimizing Bus Frequency Of An Inter-Integrated Circuit ('I2C') Bus - Optimizing an I | 11-14-2013 |
20130312257 | CONNECTING AN ELECTRONIC COMPONENT TO A PRINTED CIRCUIT BOARD - An electronic component is connected to a circuit board by forming a connector pin on the electronic component, the connector pin having a proximate end secured to the electronic component, a distal end with a fork lock, and a compliant portion between the proximate and distal ends. A multi-width through-hole is formed on a circuit board having a circuit board thickness greater than a length of the connector pin, with a first portion that is narrower than each of the compliant portion and the fork lock and extends partially through the circuit board and a second portion that extends beyond the first portion and is wider than the first portion. The connector pin is inserted into the first portion of the through-hole and the fork lock is moved beyond the first portion into the second portion of the through-hole. | 11-28-2013 |
20130316551 | UNIVERSAL PRESS-FIT CONNECTION FOR PRINTED CIRCUIT BOARDS - A universal press-fit connection allows a component having a connector pin to be connected to a compatible plated through hole of a circuit board regardless of circuit board thickness. The connector pin includes a proximate end adjacent the component, a distal end with a fork lock, and a compliant portion between the proximate and distal ends. A multi-width through hole includes a first portion partially extending through the circuit board and a second, wider portion extending beyond the first portion. The fork lock initially moves radially inward upon insertion into the first portion via flexing of the compliant portion, and re-expands when entering the second portion. The compliant portion engages the through hole and the fork lock secures the connector pin in the through hole. | 11-28-2013 |
20130340989 | MULTICOMPONENT HEAT SINK WITH MOVABLE FIN SUPPORT PORTION - A heat sink comprises a base and a fin support larger in area than the base and supporting fins that may be positioned in a plurality of orientations relative to the base. The base is adapted for being connected to a heat-generating electronic component on a circuit board, and the heat sink dissipates heat generated by the heat-generating electronic device and conducted through the base and the fin support to the fins supported thereon. The heat sink dissipates heat from the heat-generating electronic device in a first operable position and in a second operable position. The heat sink may be moved from the first to the second operable position to facilitate access to electrical contacts proximal the heat-generating electronic component. | 12-26-2013 |
20130343197 | Operating A Demultiplexer On An Inter-Integrated Circuit ('I2C') Bus - Operating a demultiplexer on an I | 12-26-2013 |
20130346658 | Chip Select ('CS') Multiplication In A Serial Peripheral Interface ('SPI') System - Chip select (‘CS’) multiplication in an SPI system that includes an SPI master, a CS multiplier, a plurality of SPI slaves, and a fall time detection circuit, where the SPI master is coupled to the CS multiplier and the fall time detection circuit by a CS signal line, the CS multiplier includes a plurality of CS outputs with each CS output coupled to an SPI slave, and CS multiplication includes: receiving, from the SPI master, the CS signal on the CS signal line; detecting fall time of the CS signal; and, if the fall time of the CS signal is less than a predefined threshold, configuring, by the fall-time detection circuit, the CS multiplier to vary from providing a CS signal on a first CS output to providing a CS signal on a second CS output. | 12-26-2013 |
20130346763 | Increasing Data Transmission Rate In An Inter-Integrated Circuit ('I2C') System - Increasing data transmission rate in an I | 12-26-2013 |
20130346835 | Detecting Data Transmission Errors In An Inter-Integrated Circuit ('I2C') System - Detecting data transmission errors in an I | 12-26-2013 |
20140013017 | I2C TO MULTI-PROTOCOL COMMUNICATION - A method, device and computer program product for providing multi-protocol communication on an inter-integrated circuit (I2C) bus. The method for providing multi-protocol communication on an inter-integrated circuit (I2C) bus can include issuing a start command by a bus management device onto the I2C bus. Thereafter, the bus management device can send an embedded differential protocol to a non-I2C device. Once communication with the non-I2C device is completed, the bus management device can issue a stop command to release the I2C bus. In one aspect of this embodiment, the method can include receiving a response from the non-I2C device. | 01-09-2014 |
20140013151 | I2C MULTIPLEXER SWITCHING AS A FUNCTION OF CLOCK FREQUENCY - In accordance with one embodiment of the invention, an I2C bus multiplexing circuit for use in an I2C bus interface can be provided. The I2C bus multiplexing circuit can facilitate multiplexer switching in an I2C bus interface by detecting a start command from an I2C master device via an I2C bus, buffering data from the I2C master device, detecting a clock frequency of a bus serial clock (SCL) line of the I2C master device, holding the serial data (SDA) line of the I2C master device in a clock stretch state and selecting a port based on the detected clock frequency of the SCL of the I2C master device. The method further can include sending the buffered data to an I2C slave device on the selected port. The method further can include receiving an acknowledgement from the I2C slave device on the selected port. | 01-09-2014 |
20140019644 | Controlling A Plurality Of Serial Peripheral Interface ('SPI') Peripherals Using A Single Chip Select - Controlling a plurality of serial peripheral interface (‘SPI’) peripherals using a single chip select in a computing system, the computing system including an SPI master, a first SPI peripheral, and a second SPI peripheral, wherein the first SPI peripheral is operatively coupled to the second SPI peripheral, including: receiving, by the first SPI peripheral, a signal from the SPI master; determining, by the first SPI peripheral, whether the first SPI peripheral is a primary SPI peripheral or a backup SPI peripheral; responsive to determining that the first SPI peripheral is the backup SPI peripheral, transmitting, by the first SPI peripheral to the second SPI peripheral, the signal; and responsive to determining that the first SPI peripheral is the primary SPI peripheral: servicing, by the first SPI peripheral, an instruction contained in the signal; and transmitting, by the first SPI peripheral to the second SPI peripheral, a response signal. | 01-16-2014 |
20140029693 | Providing Noise Protection In A Signal Transmission System - Providing noise protection in a signal transmission system that includes a first component, second component, controller, switch, and pre-charged capacitor, the first and second components coupled by a signal line, the controller coupled to the switch, the switch configured to couple the signal line to the capacitor when activated, where providing noise protection includes: determining, by the controller, that a signal transmitted on the signal line transitioned to a steady state voltage; enabling, by the controller responsive to determining that the signal transitioned to the steady state voltage, noise protection to the signal on the signal line including activating the switch thereby coupling the signal line to the pre-charged capacitor, the pre-charged capacitor providing noise protection to the signal on the signal line; and prior to the signal on the signal line transitioning from the steady state voltage, deactivating the switch, thereby decoupling the signal line from the pre-charged capacitor. | 01-30-2014 |
20140031971 | LIFT APPARATUS FOR STABLE PLACEMENT OF COMPONENTS INTO A RACK - A method uses scales onboard a lift apparatus to weigh an uninstalled component that is positioned on the lift apparatus for installation into a rack. Data is accessed that identifies the weight and rack location of components currently installed in the rack, and one or more available rack locations are identified where the component may be installed without violating one or more predetermined rack stability rules. The method then uses the lift apparatus to raise the component into a selected one of the one or more available rack locations. The components are preferably information technology components, such as servers, network switches and power distribution units. | 01-30-2014 |
20140071647 | INTEGRATED CIRCUIT RETENTION MECHANISM WITH RETRACTABLE COVER - A computer processor retention device comprises a load frame, a load plate, and a pair of retractable cover members. The load frame may be secured to a circuit board around a processor mounting site. The load plate is pivotally coupled to the load frame and is pivotable between being open for receiving a processor at the processor mounting site and closed in engagement with a periphery of the received processor. The load plate has a window that is open to the processor mounting site when the load plate is closed. The retractable cover members span the window and are alternately movable along a track toward one another to cover the processor mounting site and away from one another to expose the processor mounting site. | 03-13-2014 |
20140087704 | BLOCKING INCOMING COMMUNICATION INTERRUPTIONS - Embodiments of the present invention provide a system, method, and program product for blocking an alert of an incoming communication external to an in-progress conference call which includes telecommunication devices connected to a communications network. A telecommunication device determines that the device is party to a conference call. The telecommunication device receives an incoming communication external to the conference call while it is party to the conference call. The telecommunication device blocks an alert of the incoming communication, so as to avoid interruption of the conference call. The telecommunication device determines that the conference call has concluded and the telecommunication device presents the blocked alert. | 03-27-2014 |
20140115222 | HIGH SPEED SERIAL PERIPHERAL INTERFACE SYSTEM - A serial peripheral interface (SPI) system including a bus adapter is disclosed. The bus adapter may include a data converter that may be adapted to receive respective first and second data from a first master output peripheral input (MOPI) line and a chip select line from a SPI master device. The data converter may also be adapted to interleave the first and second data, and the data converter may be adapted to transmit the interleaved first and second data synchronously with a second clock signal on a second MOPI line. The bus adapter may also include a clock rate adjuster adapted to generate the second clock signal to transmit to a SPI peripheral device. The second clock signal may be adapted to enable the SPI peripheral device to read the transmitted data. | 04-24-2014 |
20140164660 | DEVICE PRESENCE DETECTION USING A SINGLE CHANNEL OF A BUS - The presence of devices attached to a bus are detected by a controller of a bus transmitting a signal on a channel of the bus, to cause each device to hold the channel to a first logical state for a duration of time that is unique to each device. The device that holds the channel to the first logical state for the longest duration of time is detected. Detected devices remain idle while undetected devices repeat holding the channel to the first logical state for the duration of time, until detected. All devices are detected when the channel returns to a second logical state. | 06-12-2014 |
20140164814 | IDENTIFICATION OF POWER SOURCE ELECTRICAL CONNECTIVITY - A computer determines a characteristic corresponding to each of a first power source and a second power source. The first and second power sources are connected to one or more power distribution units and are configured to provide power in a datacenter. The characteristic includes at least one of a current, a resistance, a voltage, a frequency, a phase, and a magnetic field. The computer generates a comparison of the characteristic corresponding to the first power source and the second power source, to a threshold value of the characteristic. The computer determines if the comparison violates the threshold value of the characteristic. In response to determining the comparison does not violate the threshold value of the characteristic, the computer determines that the first power source and the second power source are connected to a given power distribution unit included in the one or more power distribution units. | 06-12-2014 |
20140306528 | INTELLIGENT OVER-CURRENT PREVENTION - A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source. | 10-16-2014 |
20140310547 | INTELLIGENT OVER-CURRENT PREVENTION - A system, method, and/or computer program product comprises an input/output (I/O) bus and an intelligent current bank that couples a voltage source to the I/O bus. The intelligent current bank includes an ammeter that measures a real-time flow of current to the I/O bus. In response to the current to the I/O bus exceeding a predetermined level, an intelligent Pulse-Width Modulator (iPWM) within the intelligent current bank selectively decreases current to one or more electronic devices on the I/O bus by shortening a duty cycle of voltage being received by the iPWM from the voltage source. | 10-16-2014 |
20140344487 | Auto-Switching Interfaces to Device Subsystems - A method auto-switches interfaces between a client computer and subsystems in a device under management. A first output bus from a first subsystem is coupled to a client computer via a multiplexer, wherein the first subsystem is a subsystem from multiple system subsystems in the device under management. A hardware subsystem bus monitor monitors all output busses from the multiple system subsystems for a predetermined event on a bus. In response to the predetermined event being detected on a second output bus from a second subsystem in the device under management, the multiplexor decouples the first output bus from the client computer and couples the second output bus to the client computer. | 11-20-2014 |
20140359313 | IMPLEMENTATION OF AN AIR TUBE BUTTON - An approach is described for implementing an air tube button in a computing system. An associated apparatus may include an air tube having an aperture located on a panel of the computing system. The apparatus further may include an airflow sensor located in the air tube and a fan configured for facilitating airflow though the air tube. The airflow sensor may be an anemometer, an air pressure gauge, or a mass flow meter. The apparatus further may include a service processor subsystem connected to the airflow sensor. The service processor subsystem may be configured for implementing a virtual signal having a default logical high value. The service processor subsystem further may be configured for establishing a baseline value by determining average airflow detected by the airflow sensor over a unit of time and commencing sampling of the airflow sensor to obtain airflow values at uniform time intervals. | 12-04-2014 |
20150026374 | MANAGING SLAVE DEVICES - A hardware system comprises a digital signal generator, which generates a digital electrical signal that describes a first physical state of a first device; an analog electrical signal generator, which generates an analog electrical signal that describes a second physical state of the first device; a hybrid digital state signal generator, which generates a hybrid digital state signal that comprises the analog electrical signal overlaid onto the initial digital electric signal; and a hybrid signal transmitter, which transmits the hybrid digital state signal from the first device to a second device, wherein the second device comprises a hybrid signal receiver/decoder that extracts the analog electrical signal from the hybrid digital state signal. | 01-22-2015 |
20150046615 | MEMORY MODULE COMMUNICATION CONTROL - Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle. | 02-12-2015 |
20150046628 | MEMORY MODULE COMMUNICATION CONTROL - Methods and systems for memory module communication control are disclosed. A method includes receiving a message associated with a memory module in communication with a controller via a bus including a clock line. Further, the method includes determining whether the bus is idle. The method also includes communicating a signal via the clock line regarding the message associated with the memory module in response to determining that the bus is idle. | 02-12-2015 |
20150053020 | IDENTIFYING PHYSICAL LOCATIONS OF DEVICES WITHIN AN ELECTRONIC SYSTEM - A system comprises a plurality of fans, wherein each of the fans is configurable to run at a unique fan speed that is different from fan speeds of other fans from the plurality of fans. A plurality of variable-positioned devices, capable of being positioned at various locations within the system, are physically positioned such that airflow from one of the plurality of fans strikes a particular variable-positioned device. A plurality of anemometers, each of which is connected to a particular variable-positioned device, measure airflow across the variable-positioned devices. A system controller, which contains location information that identifies a physical position within the system of each of the plurality of fans, utilizes airflow readings from each of the anemometers to identify a physical location of each of the plurality of variable-positioned devices by matching physical locations of the fans to measured airflow across the variable-positioned devices. | 02-26-2015 |
20150055455 | CONTROLLING WI-FI ACCESS IN A PUBLIC LOCATION - A method, computer system, and/or computer program product controls access to a wireless local area network (WLAN) access point in a retail establishment. A predetermined retail activity threshold is established for a retail establishment, where the retail establishment has a patron service area with a WLAN access point, and where a determination has been made that exceeding the predetermined retail activity threshold without increasing patron traffic out of the retail establishment will cause an excessive wait time for occupying the patron service area. In response to determining that the predetermined retail activity threshold is being exceeded, a secondary criterion is examined in order to determine if the mobile device should be disconnected from the WLAN access point, in order to motivate a user of the mobile device to leave the patron service area. If so, then the mobile device is disconnected from the WLAN access point. | 02-26-2015 |
20150070257 | LIQUID CRYSTAL DISPLAY USING BACKLIGHT INTENSITY TO COMPENSATE FOR PIXEL DAMAGE - A computer program product (CPP) for controlling a liquid crystal display (LCD) includes code for applying a test voltage to each liquid crystal element (LCE) disposed in an addressable array forming the LCD, and code for detecting an amount of light received by photosensors while applying the test voltage applied to the LCEs, wherein each photosensor is aligned behind and logically associated with one of the LCEs. The CPP further includes code for applying selected voltage levels to each LCE to display an image, and code for controlling an amount of backlight produced by backlighting elements in an addressable array while the image is displayed. Each backlighting element is aligned behind and logically associated with one LCE, and at least one backlighting element is controlled to compensate for a difference between the amount of light detected by the photosensor logically associated with at least one LCE and the other photosensors. | 03-12-2015 |
20150070401 | LIQUID CRYSTAL DISPLAY USING BACKLIGHT INTENSITY TO COMPENSATE FOR PIXEL DAMAGE - A method of controlling a liquid crystal display (LCD) includes applying a test voltage to the LCD, and detecting an amount of light received by a plurality of photosensors while the test voltage is being applied, wherein the photosensors are each aligned behind one of the liquid crystal elements of the LCD. An image is then displayed on the LCD by applying selected voltage levels to the LCD elements. An amount of backlight produced by backlighting elements is controlled to compensate for differences in the light transmittance of the individual LCD elements. | 03-12-2015 |