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Greer, TX
Alexandra M. Greer, Houston, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20100143436 | SELF-ASSEMBLY OF PROTEIN-BASED BIOMATERIALS WITH MULTIPLE MORPHOLOGIES - The present disclosure relates, in some embodiments, to a composition comprising a biomaterial. A biomaterial may comprise, for example, one or more molecules capable of self-association and/or self-assembly. In some embodiments, a biomaterial may comprise one or more polypeptides and/or proteins. A biomaterial may comprise, for example, two or more self-assembled Ultrabithorax (Ubx) protein molecules. A Ubx protein, in some embodiments, may be any wild type | 06-10-2010 |
Christopher Greer, Richardson, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20080270708 | System and Method for Achieving Cache Coherency Within Multiprocessor Computer System - A system and method are disclosed for achieving cache coherency in a multiprocessor computer system having a plurality of sockets with processing devices and memory controllers and a plurality of memory blocks. In at least some embodiments, the system includes a plurality of node controllers capable of being respectively coupled to the respective sockets of the multiprocessor computer, a plurality of caching devices respectively coupled to the respective node controllers, and a fabric coupling the respective node controllers, by which cache line request signals can be communicated between the respective node controllers. Cache coherency is achieved notwithstanding the cache line request signals communicated between the respective node controllers due at least in part to communications between the node controllers and the respective caching devices to which the node controllers are coupled. In at least some embodiments, the caching devices track remote cache line ownership for processor and/or input/output hub caches. | 10-30-2008 |
David Stanton Greer, Hewitt, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20100093245 | NON-WOVEN FABRIC COMPOSITES FROM LIGNIN-RICH, LARGE DIAMETER NATURAL FIBERS - A non-woven fabric composite containing natural fibers and a method for producing such composites. The non-woven fabric composite is comprised of large diameter, lignin-rich natural fibers with a high viscous flow temperature and a high degradation temperature combined with fibers made of a thermoplastic polymer with a lower viscous flow temperature such as polypropylene, polyethylene or a biodegradable thermoplastic polymer fiber such as polylactic acid, or mixture thereof. A hot-pressed non-woven fabric composite material prepared from the non-woven fabric composite. | 04-15-2010 |
| 20110250813 | NON-WOVEN FABRIC COMPOSITES FROM COIR FIBERS - A non-woven fabric composite containing coir fibers and a method for producing such composites. The non-woven fabric composite is comprised of coir fibers, which are large diameter, lignin-rich fibers, with a high viscous flow temperature and a high degradation temperature combined with fibers made of a thermoplastic polymer with a lower viscous flow temperature such as polypropylene, polyethylene or a biodegradable thermoplastic polymer fiber such as polylactic acid, or mixture thereof. A hot-pressed non-woven fabric composite material prepared from the non-woven fabric composite. | 10-13-2011 |
| 20110250814 | NON-WOVEN FABRIC COMPOSITES FROM COIR FIBERS - A non-woven fabric composite containing coir fibers and a method for producing such composites. The non-woven fabric composite is comprised of coir fibers, which are large diameter, lignin-rich fibers, with a high viscous flow temperature and a high degradation temperature combined with fibers made of a thermoplastic polymer with a lower viscous flow temperature such as polypropylene (“PP”), polyethylene (“PE”), polylactic acid (“PLA”), and polyester (“PET”) or mixtures thereof. A hot-pressed non-woven fabric composite material prepared from the non-woven fabric composite. | 10-13-2011 |
F.c. Greer, Coppell, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20080267855 | PROCESS FOR THE PRODUCTION OF METAL FLUORIDE MATERIALS WITH SUBMICRON STRUCTURES - A process for the production of metal fluorides comprising maintaining a low concentration of the by-products of the reaction between a non-fluorinated metal compound and hydrofluoric acid, so as to produce, by this reaction, sub-micron particle sizes of metal fluoride of high purity. | 10-30-2008 |
Gary L. Greer, Lewisville, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20080301153 | System and method for managing construction projects - A system for managing construction projects includes a database, a component interface, a state interface, and a database interface. The component interface is operative to receive component identifiers identifying components of a construction project. The state interface is operative to receive state indicators, each state indicator indicating a particular state (e.g., ordered, in transit, installed, inspected, etc.) associated with one of the components. The database interface is operative to store the component identifiers and the associated state indicators in the database. A method of managing construction projects is also described. The method includes the steps of receiving a plurality of component identifiers from a user, associating an initial predefined state with each received identifier, storing the component identifiers and the associated initial states in a database, updating the states associated with the component identifiers in the data base, and retrieving the updated states from the database to determine the status of the construction project. Novel data structures, application program interfaces, and graphical user interfaces are also disclosed. | 12-04-2008 |
John Michael Greer, Austin, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20110010506 | DATA PREFETCHER WITH MULTI-LEVEL TABLE FOR PREDICTING STRIDE PATTERNS - A data prefetcher includes a table of entries to maintain a history of load operations. Each entry stores a tag and a corresponding next stride. The tag comprises a concatenation of first and second strides. The next stride comprises the first stride. The first stride comprises a first cache line address subtracted from a second cache line address. The second stride comprises the second cache line address subtracted from a third cache line address. The first, second and third cache line addresses each comprise a memory address of a cache line implicated by respective first, second and third temporally preceding load operations. Control logic calculates a current stride by subtracting a previous cache line address from a new load cache line address, looks up in the table a concatenation of a previous stride and the current stride, and prefetches a cache line using the hitting table entry next stride. | 01-13-2011 |
| 20110035551 | MICROPROCESSOR WITH REPEAT PREFETCH INDIRECT INSTRUCTION - A microprocessor includes an instruction decoder for decoding a repeat prefetch indirect instruction that includes address operands used to calculate an address of a first entry in a prefetch table having a plurality of entries, each including a prefetch address. The repeat prefetch indirect instruction also includes a count specifying a number of cache lines to be prefetched. The memory address of each of the cache lines is specified by the prefetch address in one of the entries in the prefetch table. A count register, initially loaded with the count specified in the prefetch instruction, stores a remaining count of the cache lines to be prefetched. Control logic fetches the prefetch addresses of the cache lines from the table into the microprocessor and prefetches the cache lines from the system memory into a cache memory of the microprocessor using the count register and the prefetch addresses fetched from the table. | 02-10-2011 |
| 20110238920 | BOUNDING BOX PREFETCHER WITH REDUCED WARM-UP PENALTY ON MEMORY BLOCK CROSSINGS - A microprocessor includes a cache memory and a data prefetcher. The data prefetcher detects a pattern of memory accesses within a first memory block and prefetch into the cache memory cache lines from the first memory block based on the pattern. The data prefetcher also observes a new memory access request to a second memory block. The data prefetcher also determines that the first memory block is virtually adjacent to the second memory block and that the pattern, when continued from the first memory block to the second memory block, predicts an access to a cache line implicated by the new request within the second memory block. The data prefetcher also responsively prefetches into the cache memory cache lines from the second memory block based on the pattern. | 09-29-2011 |
| 20110238922 | BOUNDING BOX PREFETCHER - A data prefetcher in a microprocessor having a cache memory receives memory accesses each to an address within a memory block. The access addresses are non-monotonically increasing or decreasing as a function of time. As the accesses are received, the prefetcher maintains a largest address and a smallest address of the accesses and counts of changes to the largest and smallest addresses and maintains a history of recently accessed cache lines implicated by the access addresses within the memory block. The prefetcher also determines a predominant access direction based on the counts and determines a predominant access pattern based on the history. The prefetcher also prefetches into the cache memory, in the predominant access direction according to the predominant access pattern, cache lines of the memory block which the history indicates have not been recently accessed. | 09-29-2011 |
| 20110238923 | COMBINED L2 CACHE AND L1D CACHE PREFETCHER - A microprocessor includes a first-level cache memory, a second-level cache memory, and a data prefetcher that detects a predominant direction and pattern of recent memory accesses presented to the second-level cache memory and prefetches cache lines into the second-level cache memory based on the predominant direction and pattern. The data prefetcher also receives from the first-level cache memory an address of a memory access received by the first-level cache memory, wherein the address implicates a cache line. The data prefetcher also determines one or more cache lines indicated by the pattern beyond the implicated cache line in the predominant direction. The data prefetcher also causes the one or more cache lines to be prefetched into the first-level cache memory. | 09-29-2011 |
Matthew N. Greer, Kingwood, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20080210432 | System and Vessel for Supporting Offshore Fields - A system for supporting multiple-well-site, offshore, hydrocarbon-bearing fields, each well-site has one or more wells. In general, the system first comprises a floating vessel that is relocatable from a first subsea well-site to a second subsea well-site. The system also comprises two separate systems: (1) an operations control system for providing subsea well-site operations such as power and communications; and (2) an intervention system for conducting intervention services to an individual subsea well such as workover services and maintenance services. The operations system may provide control to wells and other subsea equipment at either the first well-site or the second well-site, regardless of the location of the floating vessel. The intervention system may provide workover and/or maintenance to subsea equipment or individual wells at the well-site at which it is located. | 09-04-2008 |
Rachel S. Greer, Dallas, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090099109 | INTERFERING RNAS AGAINST THE PROMOTER REGION OF P53 - The present invention relates to the inhibition of p53 transcription by interfering with the activity of a p53 promoter using inhibitory double-stranded RNAs. Use of these inhibitory RNAs in the treatment of cancers also is disclosed. | 04-16-2009 |
Stephen P. Greer, Brownsville, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20110281339 | System And Method To Create A Traveling Wave Within A Photobiotic Reactor To Enhance Algae Growth - A photobioreactor with a gas input is disclosed herein. The photobioreactor is tilted about an axis of rotation at various angles to provide for various flow patterns of bubbles created by the gas input. The flow patterns may vary, but include: bubble flow; slug or plug flow; churn; annular flow; or wispy annular flow. In certain configurations, a bubble flowing through the photobioreactor may increase algae growth within the reactor. | 11-17-2011 |
Todd Greer, Austin, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090323555 | System and Method for Controlling and Configuring a Router - Methods and systems for configuring a network are provided. A method may include monitoring properties of a connection between a network device and a network. The method may also include detecting a change in the properties of the connection. The method may also include verifying the connection to the network is provided by a service provider when the change in the properties is detected and providing network configuration options based on the change. | 12-31-2009 |
| 20090327440 | System and Method for Securing a Wireless Network - Methods and systems for configuring a network are provided. A method may include monitoring properties of a connection between a network device and a network. The method may also include detecting a change in the properties of the connection. The may also include verifying the connection to the network is provided by a service provider when the change in the properties is detected and providing network configuration options based on the change. | 12-31-2009 |
Todd M. Greer, Austin, TX US
| Patent application number | Description | Published |
|---|---|---|
| 20090113044 | SYSTEM AND METHOD OF CONFIGURING A NETWORK - Methods and systems for configuring a network are provided. A method may include monitoring properties of a connection between a computing device and a network. The method may also include detecting a change in the properties of the connection. The may also include verifying the connection to the network is provided by a service provider when the change in the properties is detected and providing network configuration options based on the change. | 04-30-2009 |