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Gray, AZ

Randall C. Gray, Tempe, AZ US

Patent application numberDescriptionPublished
20090161287ELECTRONIC DEVICE OPERABLE TO PROTECT A POWER TRANSISTOR WHEN USED IN CONJUNCTION WITH A TRANSFORMER - An electronic device can be used with a system, such as an ignition system, that operates a relatively high voltage. The device can include a signal clamping control module that can include a signal reference module and a feedback control module. The signal reference module is operable to provide a reference signal to the feedback control module. The feedback control can be configured to receive a scaled signal from a signal scaling module, wherein the scaled signal is representative of a signal at a current carrying electrode of a power transistor. Based on the comparison of the reference signal to the scaled signal, the measurement module provides one or more signals to a control signal drive module. The feedback control module provides a control electrode signal to a control electrode of the power transistor.06-25-2009
20110115527METHOD AND DETECTOR FOR DETERMINING A STATE OF A SWITCH - In an integrated circuit, a state of a switch coupled to the integrated circuit is determined by comparing a switch voltage at a first terminal of the switch to a reference voltage at a first time. If the switch voltage is higher than the reference voltage, the switch is determined to be in a first state. If the switch voltage is lower than the reference voltage, the switch voltage is stored in a storage element to produce a stored voltage. The stored voltage is compared to the switch voltage at a second time after the first time. A determination is made that the switch is in the first state if the switch voltage is higher than the stored voltage at the second time. A determination is made that the switch is in a second state if the switch voltage is not higher than the stored voltage at the second time.05-19-2011

Patent applications by Randall C. Gray, Tempe, AZ US

Scott Gray, Peoria, AZ US

Patent application numberDescriptionPublished
20080232253PORT RATE SMOOTHING IN AN AVIONICS NETWORK - A communication network is provided. The network includes a least one switch and a plurality of ports. Each port is in communication with the at least one switch. At least one of the ports is configured to introduce a time delay after each transmission of a frame based at least in part on a maximum transmission rate of the at least one port and its allocated transmission rate.09-25-2008
20100195491BOUNDED MINIMAL LATENCY FOR NETWORK RESOURCES WITHOUT SYNCHRONIZATION - Systems and methods for bounded minimal latency for network resources without synchronization are provided. In one embodiment, a method for managing data traffic between nodes in an asynchronous network comprises: receiving a data request message at a first port of network switch; storing information about the data request message in a memory at the network switch; forwarding the data request message to a producer node; receiving a data message at a second port of the network switch; determining whether the data message is responsive to the data request message; when the data message is responsive, forwarding the data message from the network switch; and when the data message is not responsive, blocking the data message from being forwarded from the network.08-05-2010
20110087847 MULTIPLE-PORT MEMORY SYSTEMS AND METHODS - Systems and methods for improved multiple-port memory are provided. In one embodiment, a processing system comprises: at least one processing core; a peripheral bus; and a memory for storing digital data, the memory divided into a first and a second partition of memory segments. The memory includes a first port coupled to the peripheral bus providing read access and write access only to the first partition, wherein the first partition stores peripheral data associated with one or more peripheral components coupled to the peripheral bus; a second port coupled to the at least one processor providing read-only access to only the second partition, wherein the second partition stores executable code for the at least one processing core; and a third port coupled to the at least one processor providing read access and write access to the entire first partition and the second partition.04-14-2011
20110107022REDUCING POWER CONSUMPTION FOR DYNAMIC MEMORIES USING DISTRIBUTED REFRESH CONTROL - A method for refreshing memory is provided. The method comprises determining when a first memory of a plurality of memories is not being accessed and sending a refresh opportunity command from a master refresh controller to one of a plurality of local refresh controllers when the first memory is not being accessed, wherein the one of a plurality of local refresh controllers controls only the first memory. The method further comprises determining when the first memory needs refreshing and refreshing the first memory.05-05-2011
20110131377MULTI-CORE PROCESSING CACHE IMAGE MANAGEMENT - A multi-core processor chip comprises at least one shared cache having a plurality of ports and a plurality of address spaces and a plurality of processor cores. Each processor core is coupled to one of the plurality of ports such that each processor core is able to access the at least one shared cache simultaneously with another of the plurality of processor cores. Each processor core is assigned one of a unique application or a unique application task and the multi-core processor is operable to execute a partitioning operating system that temporally and spatially isolates each unique application and each unique application task such that each of the plurality of processor cores does not attempt to write to the same address space of the at least one shared cache at the same time as another of the plurality of processor cores.06-02-2011
20110214043HIGH INTEGRITY DATA BUS FAULT DETECTION USING MULTIPLE SIGNAL COMPONENTS - Methods and apparatus are provided for verifying the integrity of a signal transmitted across a multiple rail data bus. The method and apparatus provide for independently processing a signal by a first processor and a second processor, the first and second processors being connected in parallel thereby generating a first processed signal and a second processed signal. Each of the processed signals is split into a first component sequence and a second component sequence, the first component sequences being different from the second component sequences. It is then determined that the first component sequences are not identical and that the second component sequences are not identical. If either of the first component sequences is not identical, or if either of the second component sequences is not identical, then an error signal is transmitted to a receiving device via a first or second rail of the bus.09-01-2011
20120030519INTEGRATED DISSIMILAR HIGH INTEGRITY PROCESSING - A self-checking network is provided, comprising a first command processor configured to execute a performance function and a second command processor configured to execute the performance function, coupled to the first command processor. The self-checking network also comprises a first monitor processor configured to execute a monitor function that is coupled to the first command processor and a second monitor processor configured to execute the monitor function that is coupled to the second command processor. The first and second command processors compare outputs, the first and second monitor processors compare outputs, and the first monitor processor determines whether an output of the first command processor exceeds a first selected limit.02-02-2012

Patent applications by Scott Gray, Peoria, AZ US

Scott L. Gray, Peoria, AZ US

Patent application numberDescriptionPublished
20090164867High Speed Memory Error Detection and Correction Using Interleaved (8,4) LBCs - Methods and systems are disclosed for the detection and correction of memory errors using code words with a quantity, divisible by 4, of data bits, with an equal quantity of check bits, and having the check bits and data bits interleaved. Upon execution of a memory write instruction, a processor may send a memory word to a check bit generator that generates the check bits before the code word is written to a memory unit. Upon a signal from the processor that a memory read is requested, the memory unit may send a stored code word to a syndrome bit generator to generate a syndrome vector. The syndrome vector may then be sent to a correction bit generator and an uncorrectable error detector. These units may send corrected bits and an uncorrectable error signal, respectively, to the processor.06-25-2009

William J. Gray, Peoria, AZ US

Patent application numberDescriptionPublished
20090157555BILL PAYMENT SYSTEM AND METHOD - Automated authorization and processing of an interim payment is disclosed. When a merchant requests payment prior to a recurring payment process being enabled, the system handles the payment request without customer intervention. The system requests and receives a transaction coordination code for an interim payment from a financial processor. The system passes the interim payment transaction coordination code to the merchant so the merchant may obtain an authorized payment.06-18-2009
20090327131DYNAMIC ACCOUNT AUTHENTICATION USING A MOBILE DEVICE - Providing dynamic authentication of a user requesting access to a system via a mobile device is disclosed. An account holder tailors a set of customized security challenges and responses. When a request for account authentication is received from a mobile device, the system conducts a multi-step user authentication process that includes dynamically selecting and prompting the user with the custom security challenges.12-31-2009
20100120408SERVICING ATTRIBUTES ON A MOBILE DEVICE - Enabling remote customer service and maintenance using a visual identifier is disclosed. In response to a user enrolling in a service capability associated with a mobile device, the process utilizes a visual identifier to associate the service capability with the customer account, the service and the mobile device. The system allocates a visual identifier for each service capability and enables customer service agents to identify the service capability and mobile device, verify the user and retrieve information for the service interaction.05-13-2010
20100161493METHODS, APPARATUS AND COMPUTER PROGRAM PRODUCTS FOR SECURELY ACCESSING ACCOUNT DATA - Customer data is securely downloaded to a browser toolbar by performing a check to determine whether a request for customer data includes a request for personal identifiable information requiring encryption by a public encryption key generated by the browser toolbar. The customer is authenticated based on a set of a user credential and an account specific access credential. The account specific access credential is associated with the account of the customer. Requested personal identifiable information is encrypted using the public encryption key generated by the browser toolbar. Encrypted personal identifiable information is transmitted to the browser toolbar.06-24-2010
20110060687SYSTEM, METHOD, AND COMPUTER PROGRAM PRODUCT FOR ISSUING AND USING DEBIT CARDS - A system, method, and computer program product are used to issue and track debit cards. A system comprises an enrolling system that verifies an enrollee, associates an enrollee's main and overdraft account, and issues a debit card, an authentication system that receives information regarding a requested transaction of a debit card and that receives information regarding the main and overdraft account associated with the debit card and accepts or rejects the requested transaction based thereon, and a settlement system that generates a periodic report of at least one of the transactions, the main account, and the overdraft account. The overdraft account can be a charge or credit account.03-10-2011

Patent applications by William J. Gray, Peoria, AZ US

Williams J. Gray, Peoria, AZ US

Patent application numberDescriptionPublished
20120129514SERVICING ATTRIBUTES ON A MOBILE DEVICE - Enabling remote customer service and maintenance using a visual identifier is disclosed. In response to a user enrolling in a service capability associated with a mobile device, the process utilizes a visual identifier to associate the service capability with the customer account, the service and the mobile device. The system allocates a visual identifier for each service capability and enables customer service agents to identify the service capability and mobile device, verify the user and retrieve information for the service interaction.05-24-2012