Inventors list |
Assignees list |
Classification tree browser |
Top 100 Inventors |
Top 100 Assignees |
Gong, Shanghai
Aimin Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20120283573 | DETECTION DEVICE FOR CHINESE MEDICAL INSPECTION DIAGNOSIS - The present invention is to provide a monitoring device for inspection diagnosis in traditional Chinese medicine, comprising: a housing, a light source and a shooting structure, the said light source and shooting structure are positioned in the housing, a photoconductive component is positioned in the said housing, the said photoconductive component comprising at least one photoconductive layer, the said light source is positioned inside the photoconductive layer or on the side cross section of the photoconductive layer, with the diffuse reflection of the photoconductive component the said light source forms a area light source. In the present invention, as the photoconductive component is adopted in light transmission, the point light is converted to area light so that a soft, stable and uniform illumination environment similar to the natural light comes into being in the monitoring device. | 11-08-2012 |
Bin Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110012613 | Failure Detection Method and Failure Detection Apparatus - The present invention discloses a failure detection method and a failure detection apparatus for detecting a defect in an electrical conductor. The failure detection method includes: providing at least two output terminals on the electrical conductor under test, the at least two output terminals having identical electric potentials; inputting a constant detection current sequentially to detection points arranged on the electrical conductor under test along a predetermined path; detecting an output current at one or more output terminals of the at least two output terminals; building a correspondence relationship between the detected one or more output currents at the one or more output terminals and positions of the detection points, based on information of the positions of the detection points and information of the detected one or more output currents at the one or more output terminals; and determining from the correspondence relationship whether the detection points have a defect. The failure detection method according to the invention can precisely locate defects; and uses a charged particle beam as the detection current source to avoid the size limitation of irradiation points, thereby satisfying the requirement for failure analysis in a small size. | 01-20-2011 |
| 20110062976 | Pad Structure and Test Method - The present invention discloses a pad structure and a method for testing a integrated circuit. The structure includes the first pads and the second pads, where the first pads are distributed over a peripheral portion of the integrated circuit and connected with lead-out wires of the integrated circuit, and the second pads are connected with a metal line at a circuit portion in the integrated circuit and are sized larger than the minimum characteristic dimension of the metal line and of the integrated circuit and smaller than the size of the first pads. The pad structure and method can position a test portion with improved efficiency. Correspondingly, a probe can be used to position the test portion with improved accuracy as well. | 03-17-2011 |
| 20110074459 | STRUCTURE AND METHOD FOR SEMICONDUCTOR TESTING - An embodiment of a test structure in accordance with the present invention comprises a pair of interdigitated comb portions of a metallization layer present in a recess of an inter-layer dielectric (ILD) formed over a polysilicon heater element. A third portion of the metallization layer comprises a serpentine metal line interposed between the comb portions. Application of force voltages, and detection of sense voltages, at various nodes of the metallization portions allows identification of the following: (1) electromigration of metal in the metallization portions; (2) extrusion of metal from one metallization portion to contact another; (3) breakdown voltage (V | 03-31-2011 |
Caiguo Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100210779 | Triethylamine Functionalized Elastomer in Barrier Applications - A halogenated elastomer partially functionalized with triethylamine, in a mixture with fiiier and a cure package, suitable for use as an air barrier in an innertube or tire innerliner, is disclosed. The halogenated elastomer can be a polymer comprising C | 08-19-2010 |
Demei Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20080205008 | Low Profile Flip Chip Power Module and Method of Making - A power module is proposed to package an electronic system having flip chip power MOSFET devices. The power module includes a front surface cover board and a multi-layer printed circuit laminate bonded thereto. Notably, the front surface of the printed circuit laminate includes recessed pockets each having printed circuit traces atop its floor. Inside the recessed pockets are power MOSFET and other circuit components bonded to the printed circuit traces. As the circuit components are encased inside the power module, it features a low profile, an increased mechanical robustness and EMI/RFI immunity. Additionally, some circuit components can be provided with a front-side bonding layer that is also bonded to the front surface cover board to realize a double-side bonding to the interior of the power module. Methods for making the low profile power module are also described. | 08-28-2008 |
| 20120167384 | Method of Making a Low Profile Flip Chip Power Module - A power module is proposed to package an electronic system having flip chip power MOSFET devices. The power module includes a front surface cover board and a multi-layer printed circuit laminate bonded thereto. Notably, the front surface of the printed circuit laminate includes recessed pockets each having printed circuit traces atop its floor. Inside the recessed pockets are power MOSFET and other circuit components bonded to the printed circuit traces. As the circuit components are encased inside the power module, it features a low profile, an increased mechanical robustness and EMI/RFI immunity. Additionally, some circuit components can be provided with a front-side bonding layer that is also bonded to the front surface cover board to realize a double-side bonding to the interior of the power module. Methods for making the low profile power module are also described. | 07-05-2012 |
Excimer Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20090009209 | Multiple Point Gate Oxide Integrity Test Method and System for the Manufacture of Semiconductor Integrated Circuits - A method for testing a semiconductor wafer using an in-line process control, e.g., within one or more manufacturing processes in a wafer fabrication facility and/or test/sort operation. The method includes transferring a semiconductor wafer to a test station. The method includes applying an operating voltage on a gate of a test pattern on a semiconductor wafer using one or more probing devices. The method includes measuring a first leakage current associated with the operating voltage. If the measured first current is higher than a first predetermined amount, the device is an initial failure. If the measured first current is below the first predetermined amount, the device is subjected to a second voltage. The method includes applying the second voltage on the gate of the test pattern on the semiconductor wafer and measuring a second leakage current associated with the second voltage. If the second measured leakage current is higher than a second predetermined amount, the device is an extrinsic failure. If the second measured leakage current is below the second predetermined amount, the device a good device. The method provides a way to monitor gate oxide integrity and/or process stability using extrinsic measurements according to a specific embodiment. The method includes determining a breakdown voltage associated with the second measured leakage value. In a preferred embodiment, the second measured leakage current is characterized as extrinsic information and the breakdown voltage is characterized as intrinsic information. | 01-08-2009 |
Frank Y. Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110224329 | METAL STABILIZERS FOR EPOXY RESINS AND DISPERSION PROCESS - A method comprising (a) mixing a stabilizer comprising a metal-containing compound, the metal-containing compound comprising a metal selected from the group consisting of Group 11-13 metals and combinations thereof, into a dispersant to provide a dispersion; and (b) adding the dispersion to a varnish, is disclosed. | 09-15-2011 |
| 20110257299 | METAL STABILIZERS FOR EPOXY RESINS - A composition comprising: a) an epoxy resin; b) a hardener; and c) a stabilizer comprising a metal-containing compound, the metal-containing compound comprising a metal selected from the group consisting of Group 11-13 metals and combinations thereof, wherein the composition is prepared from a halogen-containing compound is disclosed. | 10-20-2011 |
| 20110263754 | METALLIC COMPOUNDS IN NON-BROMINATED FLAME RETARDANT EPOXY RESINS - A composition comprising a) an epoxy resin; b) a hardener; and c) a stabilizer comprising a metal-containing compound, the metal-containing compound comprising a metal selected from the Group 11-13 metals and combinations thereof, and wherein said composition contains a non-halogen flame retardant is disclosed. | 10-27-2011 |
Jinlong Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20120083161 | Electrical Connector - An electrical connector for connecting with an electrical card comprises a plurality of signal terminal modules and at least one ground terminal. Each of the plurality of signal terminal modules having a pair of signal terminal and an insulation body. Each of the pair of signal terminals include a first contact portion, a first securing portion, and a first connection portion positioned between the first contact portion and the first securing portion. The insulation body is overmolded to each first connection portion of the pair of signal terminals. The ground terminal includes a pair of second contact portions, a second securing portion, and a second connection portion positioned between the pair of second contact portions and the second securing portion. The insulation body includes openings positioned to correspond to each of the pair of signal terminals, with a portion of each of the pair of signal terminals is exposed. | 04-05-2012 |
| 20120171889 | Electrical Connector - An electrical connector has at least two contact assemblies spaced apart from each other by a first distance to receive corresponding one of at least two plug conductors being spaced apart from each other by a second distance. Each of the at least two contact assemblies includes a pair of contact members for contacting one corresponding plug conductor, and a clamping member configured to clamp the pair of contact members to apply a holding force onto the pair of contact members and the corresponding plug conductor. The clamping member is inserted through the pair of contact members in a direction opposite to a mating direction, and the clamping member and the pair of contact members are adapted to swing in a direction substantially perpendicular to the mating direction in order to compensate for a difference between the first and second distances. | 07-05-2012 |
Jiong Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100079472 | METHOD AND SYSTEMS TO DISPLAY PLATFORM GRAPHICS DURING OPERATING SYSTEM INITIALIZATION - Methods and systems to display platform graphics during initialization of an computer system, including to interrupt initialization of an operating system and to update a video frame buffer with platform graphics data when the initialization of the operating system is interrupted, and to merge platform graphics data with graphics generated by operating system initialization logic. The methods and systems include virtualization methods and systems and system management mode methods and systems. | 04-01-2010 |
Maozhong Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20120063179 | SYSTEM AND METHOD FOR DAMPING LC CIRCUITS IN POWER CONVERSION SYSTEMS - A power conversion system comprises a power converter comprising a plurality of semiconductor power switches, an LC filter coupled between an output of the power converter and an electric grid, and a power conversion control system. The LC filter comprises an inductor coupled in series to the electric grid, and a capacitor. The LC filter and the grid result in an equivalent LC circuit comprising an impedance of the LC filter and an impedance of the electric grid. The power conversion control system comprises a damper and a converter controller. The damper receives an LC filter signal and an equivalent LC circuit impedance signal and generates a damping signal. The converter controller receives a current or voltage reference signal, a current or voltage command signal, and the damping signal to generate control signals for driving switching operations of the semiconductor power switches. | 03-15-2012 |
| 20120314467 | POWER CONVERSION SYSTEM AND METHOD - Embodiments of the invention relate to a power system for converting direct current (“DC”) power on a DC bus into alternating current (“AC”) power with a regulated voltage output and for feeding the AC power to an electrical system which may include a power utility or an electric grid, for example. A power conversion control system is used for controlling the power conversion and for maintaining the DC bus voltage (“DC voltage”) at a certain level. | 12-13-2012 |
| 20130027993 | POWER CONVERSION SYSTEM WITH TRANSIENT EVENT RIDE-THROUGH CAPABILITY AND METHOD THEREOF - An exemplary power conversion system is disclosed including a DC bus for receiving DC power; a line side converter electrically coupled to the DC bus for converting the DC power to AC power; and a voltage source controller to provide control signals to enable the line side converter to regulate the AC power. The voltage source controller comprises a signal generator to generate the control signals based at least in part on a power command signal and a power feedback signal. The voltage source controller further comprises a current limiter to, during a transient event, limit the control signals based at least in part on an electrical current threshold. The voltage source controller further comprises a voltage limiter to, during the transient event, limit the control signals based at least in part on a DC bus voltage feedback signal and a DC boundary voltage threshold. | 01-31-2013 |
| 20130027997 | MAXIMUM POWER POINT TRACKING FOR POWER CONVERSION SYSTEM AND METHOD THEREOF - An exemplary power conversion system comprises an MPPT unit, a DC bus, a power converter, and a converter controller. The MPPT unit receives a feedback current signal and a feedback voltage signal from a power source and generates an MPPT reference signal based at least in part on the feedback current and voltage signals. The DC bus receives DC power from the power source. The power converter converts the DC power on the DC bus to AC power. The converter controller receives the MPPT reference signal from the MPPT unit and an output power feedback signal measured at an output of the power converter; generates control signals for AC power regulation and maximum power extraction based at least in part on the MPPT reference signal and the output power feedback signal; and sends the control signals to the power converter. | 01-31-2013 |
| 20130076134 | Power Converter Islanding Detection - A power converter including a detection apparatus and method for detecting an islanding condition based on measurements of one or more currents and voltages within the power converter provided to a current regulator to generate a signal that is provided in a positive feedback loop and is indicative of an islanding condition. | 03-28-2013 |
| 20130077367 | SYSTEMS AND METHODS FOR USE IN GRID FAULT EVENT CONTROL - System, power modules, and methods for supplying an output voltage to an electric grid are provided. One example power module includes a switching device configured to supply an output from a power generator to an electric grid, a feedback unit configured to provide a feedback signal indicative of a deviation of a parameter associated with the electric grid, and a controller coupled to the feedback unit and the switching device. The controller is configured to adjust a reactive current of the output in response to at least one grid fault event to ride through the at least one grid fault event, to modify the deviation provided from the feedback unit, to control the switching device based on the modified deviation, and to detect an islanding condition based on the parameter associated with the electric grid. | 03-28-2013 |
Ming Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100322230 | ARRANGEMENT AND APPROACH FOR TIME SLOT INDEX SYNCHRONIZATION FOR WIRELESS COMMUNICATIONS - The time slot index for wireless signals is synchronized using an approach that facilitates rapid synchronization acquisition and tracking synchronization recovery. According to an example embodiment, a synchronization circuit (e.g., | 12-23-2010 |
| 20110002425 | CARRIER FREQUENCY OFFSET SYNCHRONIZER FOR OFDM RECEIVER AND METHOD - A method of synchronizing a receiver to a received orthogonal frequency division multiplexing (OFDM) signal. The receiver includes a carrier frequency offset synchronizer having a carrier frequency offset detector, a frequency-locked loop having a controller. A transmitted signal having a carrier frequency is received by the receiver. A carrier frequency offset is estimated by comparing the carrier frequency of the transmitted signal and a reference frequency of a locally generated signal of the receiver. A plurality of parameters of the frequency-locked loop is determined to adjust the reference frequency to reduce the carrier frequency offset. Accordingly, the frequency-locked loop achieves frequency tracking of the OFDM signal. | 01-06-2011 |
Nian Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20120196795 | NOVEL EXENDIN VARIANT AND CONJUGATE THEREOF - The invention provides a novel Exendin variant and the Exendin variant conjugate conjugating polymer thereon, the pharmaceutical composition comprising them and use of them for treating diseases such as reducing blood glucose, treating diabetes, especially Type II diabetes. The invention also provides the use of Exendin conjugate for lowering body weight. | 08-02-2012 |
Qingguo Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110273264 | LAMINATED SMD-TYPE THERMISTORS AND MANUFACTURING METHODS THEREOF - A laminated SMD-type thermistor has a conductive module, a left and a right conductive metal layer. The conductive module includes a core conductive module coated with an insulating layer on the upper and lower surface, and the left and right side. The core conductive module includes at least one conductive unit piled up in sequence, two conductive units are separated by an insulating material layer. The conductive unit includes an upper metal foil, a conductive polymer chip and a lower metal foil which are laminated in sequence from top to bottom. A left and right conductive metal layer are coated on the left and right part of the conductive module respectively, and penetrate the insulating layer partially, to connect with two metal foils of the conductive unit respectively. The laminated SMD-type thermistor can further comprise two plating resistant films coated on the upper and lower surface of the conductive module. | 11-10-2011 |
Qiying Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20130103724 | NETWORK AND METHOD FOR MANAGING MODELS - A method of managing models in a network includes receiving at a model manager a model of a controlled system in a first format from a first system and storing the model in a second format in the model manager. Storing includes several steps that allow for the transformation of the model into a different, version-free format so that the network can adapt to changes in the first format. | 04-25-2013 |
Shaocheng Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100287030 | SYSTEM AND METHOD FOR PROVIDING COMBINATION PACKAGE BEST OFFER - In various exemplary embodiments, a system and associated method to provide customized combination package best offers is disclosed. The method includes receiving a selection of a plurality of items from a potential buyer, the selection of the plurality of items creating a customized combination package. A determination is made as to whether the potential buyer is qualified to make the best offer. Available price history associated with the customized combination package is provided to a qualified buyer. A best offer from the qualified buyer is then received and provided to a seller selling the plurality of items. | 11-11-2010 |
Shu Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100306603 | Segmented and Overlapped skew tracking method for serdes frame interface Level 5 - A method and device for performing skew detection on data transmitted over a data channel and a high speed optical communication interface including the device are disclosed, wherein data of a reference frame over a reference channel is composed sequentially of a reference data segment with a length of Umax over each of data channels to be subject to skew detection. The method includes: S1) performing the following on one frame of data transmitted over one data channel in a period of one frame: a) dividing the frame of data into a plurality of data blocks according to the maximum allowable skew detection range Rmax; b) dividing each of the data blocks into a plurality of segments each with the length of Umax; c) serially comparing each of the segments in the respective data blocks with the corresponding reference data segment, respectively, to derive skew detection results of all the segments in the respective data blocks; and d) for each of the data blocks, selecting the skew detection result of one of all the segments in the data block as a skew detection result of the data block; and S2) selecting a skew detection result with the maximum skew from among the skew detection results of all the data blocks as a skew detection result of the frame of data. | 12-02-2010 |
Xiangyang Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110064163 | Methods and Apparatuses for Channel Estimation of OFDM Systems to Combat Multipath Fading - Methods for channel estimation for OFDM schemes are provided to combat multipath fading. Scattered pilot symbols are adaptively tracked by applying a weighted summation function over the received symbols to get a “snapshot” of the pilot symbols. Channel impulse response and frequency response can then be applied to the snapshot for channel estimation. The channel estimation is then used for interpolating one or more data symbols. Furthermore, the path information of the channel impulse response can help to optimize the OFDM window position. | 03-17-2011 |
Xiaofei Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20090091294 | Battery cell balancing systems using current regulators - According to one embodiment of the invention, there is provided a cell balancing circuit used for balancing a cell. The cell balancing circuit includes a bypass path coupled to the cell, a current regulator coupled to the bypass path, and a bleeding control switch. The current regulator is operable for producing a current and for controlling a conductance status of the bypass path. The bleeding control switch conducts the bypass path in response to the current produced by the current regulator. | 04-09-2009 |
| 20100033128 | Circuit and method for cell balancing - According to one embodiment of the invention, there is provided a cell balancing circuit used for balancing a plurality of cells comprising a first cell and a second cell adjacent to the first cell. The cell balancing circuit includes a first shunt path coupled to the first cell in parallel for enabling a shunt current of the first cell, a second shunt path coupled to the second cell in parallel for enabling a shunt current of the second cell. The cell balancing circuit further includes a controller which is coupled to the first shunt path and the second shunt path. The controller is operable for alternately conducting the first shunt path and the second shunt path if the first cell and the second cell are unbalanced. | 02-11-2010 |
Xiaofeng Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100060270 | Method and System for Inductive Proximity Sensing that Includes Mounting Effect Compensation - An inductive proximity sensor and related method for sensing a presence/position of a target, with mounting effect compensation, are disclosed. In at least one embodiment, the method includes providing a proximity sensor having first and second coils that are both at least indirectly in communication with control circuitry. The method also includes receiving respective first and second signals at least indirectly indicative of respective first and second electromagnetic field components respectively experienced by the first coil as influenced both by a target and a structure supporting the sensor and the second coil as influenced by the supporting structure. The method further includes determining by way of the circuitry a third signal based at least in part upon the first signal, as modified based at least in part upon the second signal, whereby the third signal is indicative of the presence or position of the target relative to the sensor. | 03-11-2010 |
Xiaofeng Sean Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20120242352 | INDUCTIVE PROXIMITY SENSOR - Present techniques provide an inductive proximity sensor having a multi-receiver coil assembly and an evaluator circuit configured to receive a differential signal from the multi-receiver coil assembly to determine the presence of a target. The multi-receiver coil assembly includes two receiver coils in a differential coil arrangement and a transmitter coil configured to emit an electromagnetic field and induce a voltage on each of the receiver coils. The voltage difference between the two receiver coils is transmitted as a differential signal to the evaluator circuit. Targets which approach the inductive proximity sensor disrupt the electromagnetic field and change the induced voltages on each of the receiver coils, thereby changing the differential signal. The evaluator circuit processes the differential signal to determine whether the changes indicate that a target is present. | 09-27-2012 |
Xun Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20120075018 | POWER AMPLIFIER AND TRANSMITTER - A power amplifier is provided, which includes a power dividing unit, a first power amplification tributary, a second power amplification tributary, and an impedance conversion unit. Input ends of the first power amplification tributary and the second power amplification tributary are coupled to two output ends of the power dividing unit respectively. An output end of the first power amplification tributary is coupled to an output end of the second power amplification tributary through the impedance conversion unit. Rated power of a peak power amplifier in the second power amplification tributary is greater than that of a main power amplifier in the first power amplification tributary. The beneficial effects of the present invention lie in that larger back-off exists at the peak of an efficiency curve of the power amplifier, and in the case that power is back-off, efficiency of the power amplifier is improved. | 03-29-2012 |
Yi Hua Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110262029 | System and method for detecting solder paste printing - A system and a method detect solder paste printing. The system includes a detecting device for detecting solder paste when a scraping blade pushes the solder paste to spread over a template to obtain information associated with the rolling speed of the solder paste, and a state-indicating device for generating a printing-state indication based on the information associated with the rolling speed of the solder paste. The method includes detecting the solder paste during rolling to obtain the information associated with the rolling speed of the solder paste, and generating a printing-state indication based on said information associated with the rolling speed of the solder paste. By detecting the solder paste during rolling to obtain the printing state, it is possible to monitor the printing state in real time, discover an abnormal condition in time, and reduce costs to the maximum extent. | 10-27-2011 |
| 20120041766 | VOICE-CONTROLLED NAVIGATION DEVICE AND METHOD - In a voice-controlled navigation device and method, a voice command is received, and divided into voice segments Vi (i=1˜n) by comparing with one or more keywords. A voice segment Vi (i=1˜n) is obtained in sequence to be compared with tree nodes in a search tree of place names. A weight value of each tree node is computed according to a comparison, to select one or more tree nodes whose weight values are greater than a predetermined value. Routes formed by all the selected tree nodes are obtained to select a route whose total weight value is the greatest. A navigation to a destination is given by indicating the selected route on an electronic map according to place names represented by the tree nodes of the selected route. | 02-16-2012 |
Yuhong Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20090032279 | User-manipulated door mechanism for selectively covering an electrical socket - A user-manipulated door mechanism is mounted on the faceplate of an electronic module for allowing user access to an electrical socket disposed inboard of a faceplate aperture. An inwardly extending rectangular shoulder formed along one edge of the door is rotatably mounted about an axis inboard of the faceplate, and is resiliently engaged by the free end of a cantilevered spring blade inboard of the faceplate. The spring blade engages a first face of the shoulder that is substantially parallel to the door when the door is in a closed position covering the socket, and a second face of the shoulder that is substantially perpendicular to the door when the door is in an open position uncovering the socket. | 02-05-2009 |
Yuping Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110284997 | Chip-Exposed Semiconductor Device and Its Packaging Method - A method of making a chip-exposed semiconductor package comprising the steps of: plating a plurality of electrode on a front face of each chi on a wafer; grinding a backside of the wafer and depositing a back metal then separating each chips; mounting the chips with the plating electrodes adhering onto a front face of a plurality of paddle of a leadframe; adhering a tape on the back metal and encapsulating with a molding compound; removing the tape and sawing through the leadframe and the molding compound to form a plurality of packaged semiconductor devices. | 11-24-2011 |
| 20110285025 | Wafer Level Chip Scale Package Method Using Clip Array - A method for wafer level chip scale package comprises providing a wafer with semiconductor chips formed thereon, forming a groove alongside each chip, providing a wafer size clip array with a plurality of clip contact areas each extending to a down set connecting bar, connecting the plurality of clip contact areas to a plurality of the electrodes disposed on a top surface of the chips with down set connecting bars disposed inside the grooves, encapsulating top of wafer in molding compound, thinning the bottom portion of the wafer and dicing the thin wafer into single chip packages. The chip has source and gate electrodes on a top surface connected to a first and second clip contact areas extending to a first a second down set connecting bars respectively, with the bottom surfaces of the down set connecting bars substantially coplanar to a drain electrode located at the chip bottom surface. | 11-24-2011 |
| 20120104580 | SUBSTRATELESS POWER DEVICE PACKAGES - A substrate-less composite power semiconductor device may include a thin substrate and a top metal layer located on a top surface of the substrate. A total thickness of the substrate and the epitaxial layer may be less than 25 microns. Solder bumps are formed on top of the top metal layer and molding compound surrounds the solder bumps and leaves the solder bumps at least partly exposed. | 05-03-2012 |
| 20120164793 | Power Semiconductor Device Package Method - Preparation methods of forming packaged semiconductor device, specifically for flip-chip vertical power device, are disclosed. In these methods, a vertical semiconductor chip is flip-chip attached to a lead frame and then encapsulated with plastic packing materials. Encapsulated chip is then thinned to a predetermined thickness. Contact terminals connecting the chip with external circuit are formed by etching at least a bottom portion of the lead frame connected. | 06-28-2012 |
| 20120175706 | Chip-Exposed Semiconductor Device - A method of making a chip-exposed semiconductor package comprising the steps of: plating a plurality of electrode on a front face of each chip on a wafer; grinding a backside of the wafer and depositing a back metal then separating each chips; mounting the chips with the plating electrodes adhering onto a front face of a plurality of paddle of a leadframe; adhering a tape on the back metal and encapsulating with a molding compound; removing the tape and sawing through the leadframe and the molding compound to form a plurality of packaged semiconductor devices. | 07-12-2012 |
| 20120267787 | Wafer Level Chip Scale Package Method Using Clip Array - A method for wafer level chip scale package comprises providing a wafer with semiconductor chips formed thereon, forming a groove alongside each chip, providing a wafer size clip array with a plurality of clip contact areas each extending to a down set connecting bar, connecting the plurality of clip contact areas to a plurality of the electrodes disposed on a top surface of the chips with down set connecting bars disposed inside the grooves, encapsulating top of wafer in molding compound, thinning the bottom portion of the wafer and dicing the thin wafer into single chip packages. The chip has source and gate electrodes on a top surface connected to a first and second clip contact areas extending to a first a second down set connecting bars respectively, with the bottom surfaces of the down set connecting bars substantially coplanar to a drain electrode located at the chip bottom surface. | 10-25-2012 |
Zhenbiao Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20130059573 | Multiple Party Communications for Mobile Terminals - A mobile station in a telecommunication network, comprising a radio access network and a core network, initiates a communication to multiple destination parties. The mobile station assembles and includes the multiple destination parties in a multiple destination party container and inserts this container in a communication initiating message. The mobile station transmits the message via the radio access network to an access node of the core network. The access node retrieves the multiple destination party container from the received message and initializes the communication to multiple destination parties via the core network. | 03-07-2013 |
Zhengjun Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100321584 | System and Method For Accumulative Stillness Analysis of Video Signals - A method and system for accumulating stillness characteristics is presented. The method and system generates field stillness characteristics for a current pixel of a current field. The field stillness characteristic is accumulated with an accumulated stillness characteristic that corresponds to a pixel location of the current pixel. The accumulated stillness characteristic includes stillness information regarding previous pixels of previous fields in the same pixel location as the current pixel. | 12-23-2010 |
Zhengwei Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20110317615 | System and Method for Adapting Code Rate - A system and method for adapting code rate are provided. A method for a first communication device to transmit a resource assignment to at least one communication device includes assigning at least one transmission resource to transmit the resource assignment, adapting a code rate of an encoded payload based on the at least one transmission resource and a threshold, thereby producing an adapted payload, and transmitting the adapted payload. | 12-29-2011 |
| 20120087318 | System and Method for Search Space Reconfiguration in a Communications System - A system and method for search space reconfiguration in a communications system are provided. A method for communications controller operations includes reconfiguring a first search space including a first set of resources into a second search space including a second set of resources, signaling second search space information to a communications device, and signaling a first set of other information to the communications device within an intermediate search space including resources common to both the first set of resources and the second set of resources. | 04-12-2012 |
| 20120188932 | PRE-CODING METHOD IN COOPERATIVE RELAY SYSTEM, COMMUNICATION APPARATUS, AND RELAY APPARATUS - The embodiments of the present invention disclose a pre-coding method in a cooperative relay system. The pre-coding method in the cooperative relay system includes: obtaining pre-coding matrixes of local optimal sub-channels to single links of respective relay stations; and obtaining a pre-coding matrix of a synthesized optimal sub-channel according to the pre-coding matrix of each local optimal sub-channel. The embodiments of the present invention also disclose a communication apparatus and a relay apparatus. The present invention is applicable to pre-coding between a transmitter and a relay station in a cooperative relay system. | 07-26-2012 |
| 20120275417 | METHOD, DEVICE, AND SYSTEM FOR SENDING SIGNAL - The present invention provides a signal sending method, device, and system. The method includes: A sender performs signal multiplexing processing on a first service data block in service data blocks to be sent and uplink control information, and performs channel interleaving processing on mixed data generated after the signal multiplexing processing, to generate a mixed data block; the sender performs signal spatial multiplexing processing on the mixed data block and remaining service data blocks in the service data blocks to be sent except the first service data block to generate a spatially multiplexed signal, and then sends the spatially multiplexed signal to a receiver through a PUSCH channel. The present invention solves the problem of signal transmission over the PUSCH channel after a MIMO technique is introduced in an LTE-A system. | 11-01-2012 |
Zhiqiang Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20130053488 | FLAME RETARDANT ENCAPSULANT COMPOSITION - The present invention provides a flame retardant encapsulant composition. A composition includes 40-80 wt. % of an encapsulant comprising 60 to 80 parts by weight of hydrocarbon oil suspended in a cross-linked polymer matrix; and a liquid flame retardant. At least a portion of the liquid flame retardant can be present in the form of a dispersed liquid phase suspended in a continuous oil-rich phase that swells the cross-linked polymer matrix. In some exemplary embodiments, the oil-rich phase comprises less than 15% of the liquid flame retardant dissolved in the oil-rich phase. | 02-28-2013 |
Zhiyong Gong, Shanghai CN
| Patent application number | Description | Published |
|---|---|---|
| 20100318943 | Unified Interface for Display and Modification of Data Arrays - In an embodiment, a method is provided for displaying data arrays in a graphical user interface. In this method, a first data array and a second data array are accessed. Here, the second data array is nested in the first data array. The first data array comprises first data elements and the second data array comprises second data elements. A hierarchical tree structure of the first and second data arrays is constructed where the first data array is ranked higher than the second data array in the hierarchical tree structure based on the nesting of the second data array in the first data array. An arrangement of the first and second data elements is displayed in the graphical user interface, where the arrangement is based on the hierarchical tree structure. | 12-16-2010 |
| 20120123989 | DASHBOARD EVALUATOR - A dashboard evaluator is disclosed. The dashboard evaluator evaluates a dashboard design for its effectiveness in providing the information. The dashboard evaluator determines a level of compliance with dashboard design principles. The design principles may be tailored to a specific purpose and/or user. | 05-17-2012 |