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Goh, Singapore
Aik Hee Daniel Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090123006 | MULTI-MODE SOUND REPRODUCTION SYSTEM AND A CORRESPONDING METHOD THEREOF - There is provided a multi-mode sound reproduction system for reproduction of both stereophonic signals and multi-channel audio signals. The system includes a first pair of speakers positioned on a left portion of a user, the user being at a pre-determined facing, the first pair of speakers comprising a first primary speaker which is stackable with a first secondary speaker; a second pair of speakers positioned on a right portion of the user, the user being at the pre-determined facing, the second pair of speakers comprising a second primary speaker which is stackable with a second secondary speaker. The system may preferably include an arrangement of electronic components for controlling output of audio signals from the first pair and the second pair of speakers. It is preferable that in a first mode with the first and second pair of speakers in an unstacked configuration, the signals do not pass through the arrangement of electronic components prior to output. It is also preferable that in a second mode with each of the first and second pair of speakers in a stacked configuration, the arrangement of electronic components allows either stereophonic signals or multi-channel audio signals to be separately processed and reproduced in the first pair and the second pair of speakers. A corresponding method is also disclosed. | 05-14-2009 |
| 20100217411 | METHODS AND AN APPARATUS FOR OPTIMIZING PLAYBACK OF MEDIA CONTENT FROM A DIGITAL HANDHELD DEVICE - There is provided an apparatus and methods for optimizing playback of media content from a digital handheld device. The apparatus may be functionally connected to the digital handheld device, and for allowing placement of the digital handheld device at a receptor. Correspondingly, the methods for optimizing playback of media content from a digital handheld device preferably entail a usage of the aforementioned apparatus. | 08-26-2010 |
| 20110218658 | SYSTEM FOR REPRODUCTION OF MEDIA CONTENT - There is provided a system for reproduction of media content. The system includes at least one sound reproduction apparatus being wirelessly connectable to at least one control apparatus via at least one data channel, the at least one control apparatus being connected to the at least one sound reproduction apparatus once the at least one control apparatus receives a first signal indicating a presence of the at least one sound reproduction apparatus; and the at least one control apparatus being wirelessly connectable to at least one data storage apparatus on a data network. Preferably, the at least one sound reproduction apparatus plays back audio signals of the media content which is either stored on the at least one control apparatus or received via the data network, and with the audio signals of the media content being received at a memory module of the at least one sound reproduction apparatus. The audio signals may be played back either in a streaming form or a stored-data playback form, the form depending on the audio signals stored in the memory module. | 09-08-2011 |
Ban Hok Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20080218231 | MULTIPLE OUTPUT TIME-TO-DIGITAL CONVERTER - A differential line compensation apparatus, semiconductor chip and system are disclosed. | 09-11-2008 |
| 20080290960 | APPARATUS OF IMPEDANCE MATCHING FOR BIDIRECTIONAL DATA LINE - An apparatus includes a bidirectional data line to couple to a device and an impedance to provide an impedance matching between the data line and the device. In some embodiments, when a direction of data flow in the data line is away from the device, the impedance is of a first impedance value, and when the direction of the data flow is toward the device, the impedance is of a second impedance value. In one embodiment, the second impedance value is substantially zero. | 11-27-2008 |
| 20100001764 | Configurable Differential Lines - Embodiments related to configurable differential lines are disclosed herein. | 01-07-2010 |
Beng-Heng Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20120112803 | PROCESS, TEMPERATURE, PART AND SETTING INDEPENDENT RESET PULSE ENCODING AND DECODING SCHEME - A method of generating a reset signal for an integrated circuit without a dedicated reset pin includes calibrating a first clock pulse from a clock signal, measuring a second clock pulse from the clock signal, measuring a third clock pulse from the clock signal, and generating an internal reset signal if the first clock pulse width is longer than a predetermined minimum clock pulse width, if the second clock pulse is within an expected first value range, and if the third clock pulse is within an expected second value range. | 05-10-2012 |
Boon-Cher Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110104702 | Methods for Predicting Tumor Response to Chemotherapy and Selection of Tumor Treatment - Methods of selecting a treatment for further treatment of a tumor that has been exposed to chemotherapy and methods of predicting response of a tumor to chemotherapy are disclosed. Some of the methods involve performing gene expression analysis on a sample obtained from a patient having a tumor that has been exposed to chemotherapy so as to obtain a chemotherapy gene expression data set and analysing the chemotherapy gene expression data set to predict response of the tumor to the chemotherapy to which the tumor has been exposed. | 05-05-2011 |
Carol Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100091424 | METHOD FOR REDUCING SIDEWALL ETCH RESIDUE - A method for fabricating a semiconductor device is provided. The method comprising forming a first layer over a substrate and a second layer over the first layer. A patterned masking layer is subsequently provided over the second layer and a patterned second layer with outwardly tapered sidewalls is formed by isotropically etching exposed portions of the second layer. A patterned first layer is the formed by etching the first layer in accordance with the patterned second layer. | 04-15-2010 |
Chee Wee Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100025603 | APPARATUS TO CONTROL A FLUID FLOW CHARACTERISTIC OF FLUID REGULATOR BYPASS VALVES - Apparatuses to control a fluid flow characteristic of fluid regulator bypass valves are described. An example apparatus includes an insert having a body sized to be inserted in a passage of a bypass valve. The body includes an opening to fluidly couple a bore of the body to an outer surface of the body. The opening being shaped to produce a predetermined flow characteristic in response to at least a portion of a restrictor of the bypass valve moving relative to the opening to vary a fluid flow through the opening and the bypass valve. | 02-04-2010 |
Cheh Ngee Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110286385 | Methods and Systems for Communications - There is provided a method and system for making a call from a first communications device at any location to a recipient with a second communications device by inputting a contact number of the recipient into the first communications device, selecting a communications mode on the first device, wherein at least one of the first communications device and the second communications device operate using at least one data channel, and wherein a caller makes the call in a manner similar to “dial-and-connect” phone calls. There is also provided a method and system for sending at least one message from a first communications device at any location to a recipient with a second communication device by inputting a contact number of the recipient into the first communications device when sending the at least one message, transmitting the contact number and the at least one message to a server through at least one data channel: storing the at least one message at the server; the server contacting the second communications device; and either the second communications device drawing the at least one message from the server through at least one data channel, or the server transmitting the at least one message to the second communications device, wherein the messenger sends the at least one message in a manner similar to “compose-and-send” messaging. | 11-24-2011 |
Chi Hock Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090023431 | Systems and Methods for Communicating with a Network Switch - Systems and methods for communicating with a network device are provided. In this regard, a representative system, among others, includes a network switch associated with a telecommunications device; and a wireless interface device that wirelessly communicates with the network switch, the wireless interface device being configured to obtain information associated with the network switch and display at least a portion of the information obtained on a display device. A representative method, among others, for communicating with a network switch includes establishing a wireless link between the network switch and a wireless interface device; obtaining information associated with the network switch by the wireless interface device via the wireless link; and displaying at least a portion of the information obtained on a display device of the wireless interface device. | 01-22-2009 |
| 20100095145 | SYSTEM FOR REDUCING POWER CONSUMPTION IN AN ELECTRONIC CHIP - A system for reducing power consumption in an electronic device comprising at least one electronic chip comprises a plurality of local access network (LAN) ports, a transceiver coupled between the LAN ports and the electronic chip, a PLA device, and a central processing unit (CPU). The CPU is configured to power off the electronic chip in response to a period of inactivity on the LAN ports and power on the electronic chip in response to a signal from the PLA device. | 04-15-2010 |
| 20120096296 | SYSTEM FOR REDUCING POWER CONSUMPTION IN AN ELECTRONIC CHIP - A system for reducing power consumption in an electronic device comprising at least one electronic chip comprises a plurality of local access network (LAN) ports, a transceiver coupled between the LAN ports and the electronic chip, a PLA device, and a central processing unit (CPU). The CPU is configured to power off the electronic chip in response to a period of inactivity on the LAN ports and power on the electronic chip in response to a signal from the PLA device. | 04-19-2012 |
Chin Joo Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100261947 | VIVO STIMULATION OF CELLULAR MATERIAL - The present invention relates to the in vivo stimulation of cellular material. In particular, the present invention relates to a method for stimulating cells and tissue in vivo comprising the step of applying to said cells and tissue an electrobiomimetic stimulus, wherein the growth characteristics of said cells and tissue are enhanced as compared to cells and tissue not receiving said stimulus. | 10-14-2010 |
Chin Siong Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110054220 | POLYETHER POLYOLS, POLYESTER POLYOLS AND POLYURETHANES OF LOW RESIDUAL ALDEHYDE CONTENT - The present invention describes a process for preventing the formation of aldehydic contaminants in polyether polyols, polyester polyols or polyurethanes which comprises incorporating into said polyether polyols, polyester polyols or polyurethanes an effective amount of | 03-03-2011 |
Chuan Iau Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100131764 | SYSTEM AND METHOD FOR SECURED DATA TRANSFER OVER A NETWORK FROM A MOBILE DEVICE - A secured data transfer system ( | 05-27-2010 |
Ee-Lin Gina Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110210203 | GALLEY UNIT - A multi-functional galley unit suitable for aircraft is disclosed. The galley unit includes two display compartments for food and other items (such as glasses) positioned above a bench top. Each display compartment comprises a main section in the form of a rear cabinet and a front door that can be swung between a closed orientation for storing items and an opened orientation in which the items are displayed and passengers can select and remove items from the compartments as desired. When the doors are in the closed position, cabin crew have full access to the bench top to assist in the preparation and serving of meals. | 09-01-2011 |
Eng Choo Priscilla Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100152690 | Leakage-signaling absorbent article - An absorbent article for preventing leakage is provided, the article including an absorbent assembly having an absorbent assembly perimeter, and a leakage warning element disposed adjacent a portion of the perimeter, wherein the leakage warning element includes a dimension change member adapted to dimensionally change upon liquid contact to produce a transition in the absorbent article between an activated state and an un-activated state, thereby producing a physical sensation indicating a fullness level of the absorbent assembly. The absorbent article also provides an absorbent assembly having an absorbent assembly perimeter and a leakage warning element including a stored energy device and a dimension change member, the dimension change member disposed along a portion of the perimeter, wherein the dimension change member is adapted to break upon liquid contact to produce a transition in the leakage warning element from an un-activated state to an activated state. | 06-17-2010 |
Eng-Siong Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090185062 | SYSTEM AND METHOD OF SCANNING AN ARRAY OF SENSORS - Aspects of the invention relate to a method and apparatus for scanning an array of sensors. More particularly, the invention is directed towards scanning an array of sensors to accurately determine actuated sensors on a contact-sensitive surface. In one embodiment, three sets of sensing lines can be incorporated into the sensing area for ghost-free detection of up to two keys. Further in other embodiments, n sets of sensing lines can be incorporated into the sensing area for ghost free detection of up to n−1 keys. | 07-23-2009 |
Eu Gene Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090077333 | DOUBLE DEGRADED ARRAY PROTECTION IN AN INTEGRATED NETWORK ATTACHED STORAGE DEVICE - In one embodiment, the invention provides a method for accessing a physical storage-device array comprising a plurality of storage devices. The method includes (1) obtaining at least one parameter from a profile selected from two or more profiles concurrently defining two or more virtual arrays, each profile defining (i) a different virtual array associated with a corresponding set of storage devices and (ii) a parameter set of one or more parameters used for accessing the virtual array; and (2) generating an instruction, based on the at least one parameter, for accessing, or disallowing access to, information in the virtual array defined by the selected profile, wherein a parameter in each the parameter set defined by each profile indicates whether two or more storage devices in the corresponding virtual array are degraded. | 03-19-2009 |
| 20090172464 | METHOD AND APPARATUS FOR REPAIRING UNCORRECTABLE DRIVE ERRORS IN AN INTEGRATED NETWORK ATTACHED STORAGE DEVICE - In one embodiment, the invention provides a method for repairing a defective storage device in a physical storage-device array having a plurality of storage devices. The method comprises the steps of identifying a disk error associated with the defective storage device; effecting an error recovery pause based on the disk error; processing one or more outstanding data storage or retrieval requests; and generating a new data storage request instructing the physical disk device array having the defective storage device to store valid data associated with the data storage or retrieval request corresponding to the disk device error, whereby the defective storage device is repaired. | 07-02-2009 |
Eyleen Lay Keow Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110002944 | Compositions and Methods to Promote Neural Cell Growth - The instant invention provides methods and compositions for promoting neural cell growth by inhibiting myelin associated glycoprotein (MAG)-induced inhibition of axonal regeneration. The invention relates to methods for identifying agents that inhibit MAG-induced inhibition of neural cell growth. Methods for inhibiting myelin associated glycoprotein (MAG)-induced inhibition of neural cell growth in a patient, methods for treating or preventing a MAG-induced disease or disorder of the CNS or PNS, comprising the step of administering at least one of the compositions according to this invention are provided. The invention includes kits comprising one or more agents identified according to the invention. | 01-06-2011 |
Ghim Siong Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110052813 | FUNCTIONALISED GRAPHENE OXIDE - A functionalised graphene oxide and a method of making a functionalised graphene oxide comprising: (i) oxidizing graphite to form graphite oxide wherein the graphene sheets which make up the graphite independently of each other have a basal plane fraction of carbon atoms in the sp | 03-03-2011 |
Hack Meng Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090261165 | ADVANCED MATERIAL TRACKING SYSTEM (AMTS) - A method for tracking and reporting material movements and responding to material movements. Tracked-components are assigned a component identifier which can be associated with a location. The identifier is associated with a first location, and in response to a movement trigger, the location associated with the identifier is updated to a second location. A component can be comprised of multiple sub-components, each of which itself is a tracked component. When the location of the component is updated, the location of each sub-component is similarly updated. Each update of the location of a component can trigger reports or other actions within the system. | 10-22-2009 |
Hanlin Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110282897 | METHOD AND SYSTEM FOR MAINTAINING A DATABASE OF REFERENCE IMAGES - A method and system for maintaining a database of reference images, the database including a plurality of sets of images, each set associated with one location or object. The method comprises the steps of identifying local features of each set of images; determining distances between each local feature of each set and the local features of all other sets; identifying discriminative features of each set of images by removing local features based on the determined distances; and storing the discriminative features of each set of images. | 11-17-2011 |
Hin Hwa Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090032975 | Semiconductor Device and Method of Providing Common Voltage Bus and Wire Bondable Redistribution - A semiconductor wafer contains a plurality of semiconductor die. The wafer has contact pads formed over its surface. A passivation layer is formed over the wafer. A stress buffer layer is formed over the passivation layer. The stress buffer layer is patterned to expose the contact pads. A metal layer is deposited over the stress buffer layer. The metal layer is a common voltage bus for the semiconductor device in electrical contact with the contact pads. An adhesion layer, barrier layer, and seed layer is formed over the wafer in electrical contact with the contact pads. The metal layer is mounted to the seed layer. Solder bumps or other interconnect structures are formed over the metal layer. A second passivation layer is formed over the metal layer. In an alternate embodiment, a wirebondable layer can be deposited over the metal layer and wirebonds connected to the metal layer. | 02-05-2009 |
| 20100308443 | Semiconductor Device and Method of Forming an Interconnect Structure with TSV Using Encapsulant for Structural Support - A semiconductor device has a conductive via formed through in a first side of the substrate. A first interconnect structure is formed over the first side of the substrate. A semiconductor die or component is mounted to the first interconnect structure. An encapsulant is deposited over the first interconnect structure and semiconductor die or component. A portion of a second side of the substrate is removed to reduce its thickness and expose the TSV. A second interconnect structure is formed over the second side of the substrate. The encapsulant provides structural support while removing the portion of the second side of the substrate. The second interconnect structure is electrically connected to the conductive via. The second interconnect structure can include a redistribution layer to extend the conductivity of the conductive via. The semiconductor device is mounted to a printed circuit board through the second interconnect structure. | 12-09-2010 |
| 20110012258 | Semiconductor Device and Method of Laser-Marking Laminate Layer Formed Over EWLB With Tape Applied to Opposite Surface - A semiconductor device has a semiconductor die with a plurality of bumps formed on contact pads disposed over its active surface. An encapsulant is formed over the semiconductor die. An interconnect structure is formed over the semiconductor die and encapsulant. The semiconductor die is mounted to a translucent tape with the bumps embedded in the translucent tape. The translucent tape has layers of polyolefin, acrylic, and polyethylene terephthalate. A back surface of the semiconductor die undergoes backgrinding to reduce die thickness. The tape undergoes UV curing. A laminate layer is formed over the back surface of the semiconductor die. The laminate layer undergoes oven curing. The laminate layer is laser-marked while the tape remains applied to the bumps. The tape is removed after laser-marking the laminate layer. Alternately, the tape can be removed prior to laser-marking. The tape reduces die warpage during laser-marking. | 01-20-2011 |
| 20110108970 | SEMICONDUCTOR FLIP CHIP PACKAGE HAVING SUBSTANTIALLY NON-COLLAPSIBLE SPACER AND METHOD OF MANUFACTURE THEREOF - A flip chip lead frame package includes a die and a lead frame having a die paddle and leads, and has a spacer to maintain a separation between the die and the die paddle. Also, methods for making the package are disclosed. | 05-12-2011 |
| 20110210436 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ENCAPSULATION AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a base substrate; attaching a base integrated circuit on the base substrate; attaching a base barrier on the base substrate adjacent a base perimeter thereof; mounting a stack substrate over the base substrate, the stack substrate having a stack substrate aperture with the stack substrate having an inter-substrate connector thereon; and dispensing a connector underfill through the stack substrate aperture encapsulating the inter-substrate connector, overflow of the connector underfill prevented by the base barrier. | 09-01-2011 |
| 20120013004 | Semiconductor Device Having an Interconnect Structure with TSV Using Encapsulant for Structural Support - A semiconductor device includes a substrate and a via extending through the substrate. A first insulating layer is disposed on sidewalls of the via. An electrically conductive material is disposed in the via over the first insulating layer to form a TSV. A first interconnect structure is disposed over a first side of the substrate. A semiconductor die or a component is mounted to the first interconnect structure. An encapsulant is disposed over the first interconnect structure and semiconductor die or component. A second interconnect structure is disposed over the second side of the substrate. The second interconnect structure is electrically connected to the TSV. The second interconnect structure includes a second insulating layer disposed over the second surface of the substrate and TSV, and a first conductive layer disposed over the TSV and in contact with the TSV through the second insulating layer. | 01-19-2012 |
| 20120061854 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH PACKAGE-ON-PACKAGE AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a bottom substrate; mounting a bottom integrated circuit over the bottom substrate; mounting a top substrate over a side of the bottom integrated circuit opposite the bottom substrate; connecting a top interconnect between the bottom substrate and the top substrate; and forming an underfill layer between the bottom substrate and the top substrate, the underfill layer encapsulating the top interconnect outside a perimeter of the bottom integrated circuit. | 03-15-2012 |
| 20120068328 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ACTIVE SURFACE HEAT REMOVAL AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing an interconnect structure having a structure bottom side, a structure top side, and a cavity, the structure bottom side electrically connected to the structure top side; mounting an integrated circuit entirely within the cavity, the integrated circuit having an active side coplanar with the structure top side; forming an encapsulation partially covering the interconnect structure and the integrated circuit, the encapsulation having an encapsulation top side coplanar with the structure top side and the active side; forming a top re-passivation layer over the structure top side and the encapsulation; and mounting a heat sink over the top re-passivation layer for removing heat from the active side. | 03-22-2012 |
| 20120074560 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing a carrier; mounting an integrated circuit device having component connectors directly on the carrier; placing a restraint structure over the integrated circuit device for controlling warpage of the integrated circuit device during bonding of the component connectors to the carrier causing some of the component connectors to separate from the carrier; and bonding all of the component connectors to the carrier. | 03-29-2012 |
| 20120074588 | INTEGRATED CIRCUIT PACKAGING SYSTEM WITH WARPAGE CONTROL AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier. | 03-29-2012 |
| 20120112340 | Semiconductor Device and Method of Forming Insulating Layer Disposed Over The Semiconductor Die For Stress Relief - A semiconductor device has a semiconductor die and conductive layer formed over a surface of the semiconductor die. A first channel can be formed in the semiconductor die. An encapsulant is deposited over the semiconductor die. A second channel can be formed in the encapsulant. A first insulating layer is formed over the semiconductor die and first conductive layer and into the first channel. The first insulating layer extends into the second channel. The first insulating layer has characteristics of tensile strength greater than 150 MPa, elongation between 35-150%, and thickness of 2-30 micrometers. A second insulating layer can be formed over the semiconductor die prior to forming the first insulating layer. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected to the first conductive layer. The first insulating layer provides stress relief during formation of the interconnect structure. | 05-10-2012 |
Hui Lin Serena Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100229000 | SOFTWARE COPYRIGHT PROTECTION AND LICENSING SYSTEM USING RFID - The present invention provides a software copyright protection and licensing system ( | 09-09-2010 |
Hup-Peng Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100053097 | CAPACITIVE TOUCH SENSOR SYSTEM - A method of matrix sensing using delay-based capacitance sensing, including using X-axis lines as active lines for capacitance measurements and using Y-axis lines as a disturbance to identify the location of a touch in a key matrix is disclosed. A sensing signal is applied to the X-axis lines, and a disturbance signal is applied to the Y-axis lines. If a location is touched, cross-capacitance is reduced, which is measured by sweeping data along the X-axis lines. | 03-04-2010 |
| 20120056821 | METHOD TO PARAMETERIZE AND RECOGNIZE CIRCULAR GESTURES ON TOUCH SENSITIVE SURFACES - A method to parameterize and recognize circular gestures on touch sensitive surfaces includes dividing the touch sensitive surface into four quadrants, detecting a transition from a first quadrant into a second quadrant, time-stamping and tracking each detected quadrant transition, and computing the time between quadrant transitions so that the circular speed and direction of the circular gestures on the touch sensitive surface can be detected. The detected direction can be either a clockwise or a counter-clockwise direction. | 03-08-2012 |
Hwee Lun Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110318560 | FILM MADE FROM HETEROGENOUS ETHYLENE/ALPHA-OLEFIN INTERPOLYMER - A multilayer film is disclosed, comprising at least two layers, wherein a first layer comprises a first interpolymer of ethylene and at least one alpha-olefin, characterized wherein the first interpolymer has a density of less than 0.925 g/cm3, and an average M | 12-29-2011 |
Jason Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100254557 | SOUND REPRODUCTION APPARATUS FOR VARYING SOUND TRANSMISSION AND A CORRESPONDING METHOD THEREOF - There is provided an apparatus for sound reproduction which is able to vary transmission of sound. The apparatus includes a plurality of speaker casings, with each of the plurality of speaker casings including at least one speaker driver; and a plurality of bases for each of the plurality of speaker casings, with a top portion of each base being for securable placement of a foot of one of the plurality of speaker casings, and a bottom face of each base being for securable attachment to the bottom face of another of the plurality of bases. In a first configuration of the apparatus, the plurality of speaker casings is securely placed on the top portion of each of the plurality of bases, and independently rests on the bottom face of each base. In a second configuration of the apparatus, the plurality of speaker casings is securely placed on the top portion of each of the plurality of bases, and is attached to one another at the bottom face of each base. A corresponding method of using a sound reproduction apparatus for varying sound transmission is also provided. | 10-07-2010 |
Jasper Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090179307 | INTEGRATED CIRCUIT SYSTEM EMPLOYING FEED-FORWARD CONTROL - An integrated circuit system that includes: providing a substrate and a material layer; measuring a parameter of the material layer; and correlating the thickness of an anti-reflective layer to the measured parameter of the material layer for critical dimension control. | 07-16-2009 |
| 20090258445 | MULTI-VARIABLE REGRESSION FOR METROLOGY - A method for assessing metrology tool accuracy is described. Multi-variable regression is used to define the accuracy of a metrology tool such that the interaction between different measurement parameters is taken into account. A metrology tool under test (MTUT) and a reference metrology tool (RMT) are used to measure a set of test profiles. The MTUT measures the test profiles to generate a MTUT data set for a first measurement parameter. The RMT measures the test profiles to generate RMT data sets for the first measurement parameter, and at least a second measurement parameter. Multi-variable regression is then performed to generate a best-fit plane for the data sets. The coefficient of determination (R | 10-15-2009 |
Jimmy Lay Kuan Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090326996 | LOT HANDLING DURING MANUFACTURING - A system for determining a list of potential lots for consolidation is presented. The system includes a module having a database and an input for receiving an event occurrence. The database may include a set of consolidation rules. The module, upon receiving the event occurrence, retrieves the consolidation rules and initiates a consolidation analysis to determine the list of potential lots for consolidation based on the consolidation rules. | 12-31-2009 |
Kay Lin Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100098691 | COMBINATION OF BENZIMIDAZOLE ANTI-CANCER AGENT AND A SECOND ANTI-CANCER AGENT - The present invention relates to a pharmaceutical composition for the treatment of cancer as well as methods of treatment of cancer that are based on the finding that certain benzimidazole based anti-cancer agents can be used in combination with a second anti-cancer agent to achieve desirable therapeutic outcomes. More specifically the present invention relates to a pharmaceutical composition including a benzimidazole based anti-cancer agent and a second anti-cancer agent. The invention also relates to methods of treatment of cancer including administration of a benzimidazole based anti-cancer agent and a second anti-cancer agent to a patient in need thereof. | 04-22-2010 |
Kay Soon Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090308911 | WIRE BONDING CAPILLARY TOOL HAVING MULTIPLE OUTER STEPS - A bonding tool for bonding a fine wire to a substrate, said bonding tool comprising an at least substantially cylindrical portion having a concentric capillary therein through which the fine wire runs; a working tip portion formed at an end of the cylindrical portion being tapered towards the tip thereof, said working tip portion having an annular chamfer at the tip thereof; wherein the concentric capillary opens into the annular chamfer of the working tip, and wherein the diameter of the cylindrical portion decreases consecutively at a plurality of discrete intervals along the length of the cylindrical portion towards the working tip portion. | 12-17-2009 |
Kim-Yong Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100148347 | CHIP SCALE PACKAGE STRUCTURE WITH CAN ATTACHMENT - A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test. | 06-17-2010 |
| 20100148363 | STEP CAVITY FOR ENHANCED DROP TEST PERFORMANCE IN BALL GRID ARRAY PACKAGE - A ball grid array (BGA) package includes a substrate layer having first and second sides. A semiconductor chip is attached to the first side of the substrate layer by a dielectric adhesive layer. A plurality of solder balls are attached to the second side of the substrate layer. The solder balls may be set out by rows and columns. A plurality of wires electrically connect the semiconductor chip to the solder balls. A layer of encapsulating compound is deposited over the semiconductor chip. A step cavity of a selected depth and shape is formed in the layer of encapsulating compound at or near the edge or periphery of the layer of encapsulating compound. The step cavity is separated from the solder balls by the substrate layer but spans over a plurality of selected solder balls. | 06-17-2010 |
| 20110156230 | MULTI-STACKED SEMICONDUCTOR DICE SCALE PACKAGE STRUCTURE AND METHOD OF MANUFACTURING SAME - A multi-stack semiconductor dice assembly has enhanced board-level reliability and integrated electrical functionalities over a common package foot-print. The multi-stack semiconductor dice assembly includes a bottom die having a stepped upper surface. The stepped upper surface includes a base region and a stepped region, which is raised relative to the base region. The base region includes a plurality of attachment structures that are sized and shaped to receive electrically conductive balls. An upper die is stacked above the bottom die. The upper die includes a plurality of attachment structures that are sized and shaped to receive electrically conductive balls and are arranged to align with the attachment structures of the bottom die. Electrically conductive balls are attached to the attachment structures of the bottom die and the attachment structures of the upper die. | 06-30-2011 |
| 20110156240 | RELIABLE LARGE DIE FAN-OUT WAFER LEVEL PACKAGE AND METHOD OF MANUFACTURE - A fan-out wafer level package includes a semiconductor die with contact pads positioned on a top surface. A fan-in redistribution layer positioned over the die includes contact pads in electrical communication with the first contact pads of the die. A buffer layer positioned over the fan-in layer includes a plurality of vias, in electrical contact with the contact pads of the fan-in layer. A fan-in redistribution layer is positioned over the buffer layer and includes contact pads on a surface opposite the buffer layer, in electrical communication with the vias. The semiconductor die, fan-in layer, and buffer layer are encapsulated in a molding com-pound layer. Solder contacts, for electrically connecting the semiconductor device to a electronic circuit board, are positioned on contact pads of the fan-out layer. The buffer layer has a substantial thickness, to reduce and distribute shear stresses resulting from thermal mismatch of coefficients of thermal expansion of the semiconductor die and a circuit board. | 06-30-2011 |
| 20110156250 | FLIP-CHIP FAN-OUT WAFER LEVEL PACKAGE FOR PACKAGE-ON-PACKAGE APPLICATIONS, AND METHOD OF MANUFACTURE - A flip-chip fan-out wafer level package for package-on-package applications includes a semiconductor die with solder bumps on an upper surface in a flip chip configuration. The die is inverted, with an upper surface facing an upper side of a redistribution layer, with the solder bumps in electrical contact with respective chip contact pads of the redistribution layer. The redistribution layer includes conductive traces that place each of the solder bumps in electrical contact with one or both of one of a plurality of upper redistribution contact pads and one of a plurality of lower redistribution contact pads. Each of the plurality of upper redistribution contact pads has an upper solder ball in electrical contact therewith. The die and the upper solder balls are at least partially encapsulated in a layer of mold compound positioned on the upper surface of the redistribution layer, and whose lateral dimensions are defined by the lateral dimensions of the redistribution layer. The layer of mold compound has a back-ground surface at which a portion of each of the upper solder balls is exposed, for electrical contact with an upper package. Each of the lower redistribution contact pads has a lower solder ball a coupled thereto. | 06-30-2011 |
| 20110157452 | FAN-OUT WAFER LEVEL PACKAGE FOR AN OPTICAL SENSOR AND METHOD OF MANUFACTURE THEREOF - An optical sensor package has a transparent substrate with a redistribution layer formed on a face thereof, which includes a window and a plurality of electrically conductive traces. A semiconductor substrate, including an optical sensor and a plurality of contact terminals on a face thereof, is positioned on the transparent substrate in a face-to-face arrangement, with the optical sensor directly opposite the window, and with each of the contact terminals electrically coupled to a respective one of the electrically conductive terminals. The transparent substrate has larger overall dimensions than the semiconductor substrate, so that one or more edges of the transparent substrate extend beyond the corresponding edges of the semiconductor substrate. A plurality of solder balls are positioned on the face of the transparent substrate, each in electrical contact with a respective one of the electrically conductive terminals. The solder balls and the semiconductor substrate are at least partially encapsulated in an encapsulating layer formed on the face of the transparent substrate, which has been planarized to expose upper portions of the solder balls, as contact pads of the optical sensor package. | 06-30-2011 |
| 20110157853 | FAN-OUT WAFER LEVEL PACKAGE WITH POLYMERIC LAYER FOR HIGH RELIABILITY - A polymeric layer encompassing the solder elements of a ball grid array in an electronics package. The polymeric layer reinforces the solder bond at the solder ball-component interface by encasing the elements of the ball grid array in a rigid polymer layer that is adhered to the package structure. Stress applied to the package through the ball grid array is transmitted to the package structure through the polymeric layer, bypassing the solder joint and improving mechanical and electrical circuit reliability. In one embodiment of a method for making the polymeric layer, solder elements bonded to external pads on a structure of the package are submerged in a fluidic form of the polymeric layer. The fluidic form is solidified and then a portion of the resulting polymeric layer is removed to make the solder elements accessible for mounting the package to a printed circuit board or other external circuit. | 06-30-2011 |
| 20120028397 | ULTRA-THIN QUAD FLAT NO-LEAD (QFN) PACKAGE - An ultra-thin Quad Flat No-Lead (QFN) semiconductor chip package having a leadframe with lead terminals formed by recesses from both the top and bottom surfaces and substantially aligned contact areas formed on either the top or bottom surfaces. A die is electrically connected to the plurality of lead terminals and a molding compound encapsulates the leadframe and die together so as to form the ultra-thin QFN package. Accordingly, the substantially aligned contact areas are exposed on both the top and bottom surfaces of the package. The present disclosure also provides an ultra-thin Optical Quad Flat No-Lead (OQFN) semiconductor chip package, a stacked semiconductor module comprising at least two QFN semiconductor chip packages, and a method for manufacturing an ultra-thin Quad Flat No-Lead (QFN) semiconductor packages. | 02-02-2012 |
Kwong Huang Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110261887 | METHODS AND DEVICES FOR ESTIMATING MOTION IN A PLURALITY OF FRAMES - In various embodiments, a method for estimating motion in a plurality of frames is provided, the method including determining a first set of motion vectors with respect to a first frame and a second frame, the second frame being in succession with the first frame along a time direction, determining a second set of motion vectors with respect to a predicted frame and the second frame, the predicted frame being in succession with the first frame along the time direction; wherein some motion vectors of the second set of motion vectors are interpolated from motion vectors of the first set of motion vectors; and determining a third set of motion vectors based on the first set of motion vectors and the second set of motion vectors. | 10-27-2011 |
| 20120014451 | Image Encoding Methods, Image Decoding Methods, Image Encoding Apparatuses, and Image Decoding Apparatuses - In an embodiment, an image encoding method is provided. The image encoding method may include a first partial encoding step, wherein first partially encoded image data is generated based on first input data after the first input data is available; a second partial encoding step, wherein second partially encoded image data is generated based on second input data after the second input data is available, before the first input data is available; and an encoded image data generating step, wherein encoded image data is generated based on the first partially encoded image data and the second partially encoded image data. | 01-19-2012 |
| 20120063695 | METHODS FOR ENCODING A DIGITAL PICTURE, ENCODERS, AND COMPUTER PROGRAM PRODUCTS - In one embodiment, a method for encoding a digital picture of a sequence of digital pictures is provided, the digital picture comprising a plurality of pixels, wherein the plurality of pixels is associated at least partially with a first group of pixels and the plurality of pixels or a plurality of pixels of another digital picture is associated at least partially with at least one second group of pixels. The method comprises determining, for the second group of pixels, a second group of pixels coding mode, determining, for the first group of pixels, based on the second group of pixels coding mode, a first group of pixels coding mode, and encoding the digital picture using the first group of pixels coding mode for the first group of pixels. | 03-15-2012 |
Luona Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090250764 | STRESSED DIELECTRIC LAYER WITH STABLE STRESS - An integrated circuit is provided having a substrate and a transistor in an active region of the substrate. The substrate also has an isolation region having a dielectric material. In one embodiment, a pre-metal dielectric layer is disposed over the substrate and the transistor. At least one of the isolation region or the pre-metal dielectric layer includes a O | 10-08-2009 |
| 20090289284 | High shrinkage stress silicon nitride (SiN) layer for NFET improvement - A method (and semiconductor device) of forming a high shrinkage stressed silicon nitride layer for use as a contact etch stop layer (CESL) or capping layer in a stress management technique (SMT) provides increased tensile stress to a channel of an nFET device to enhance carrier mobility. A spin-on polysilazane-based dielectric material is applied to a semiconductor substrate and baked to form a film layer. The film layer is cured to remove hydrogen from the film which causes shrinkage in the film when it recrystallizes into silicon nitride. The resulting silicon nitride stressed layer introduces an increased level of tensile stress to the transistor channel region. | 11-26-2009 |
| 20090302391 | STRESS LINER FOR STRESS ENGINEERING - A stress liner having first and second stress type is provided over a first type and a second type transistor to improve reliability and performance without incurring area penalties or layout deficiencies. | 12-10-2009 |
| 20090315121 | STABLE STRESS DIELECTRIC LAYER - An integrated circuit is provided having a substrate and a transistor in an active region of the substrate. The substrate also has an isolation region having a dielectric material. In one embodiment, a pre-metal dielectric (PMD) layer is disposed over the substrate and the transistor. At least one of the isolation region or the PMD layer includes O | 12-24-2009 |
| 20110316085 | INTEGRATED CIRCUIT INCLUDING A STRESSED DIELECTRIC LAYER WITH STABLE STRESS - An integrated circuit is provided having a substrate and a transistor in an active region of the substrate. The substrate also has an isolation region having a dielectric material. In one embodiment, a pre-metal dielectric layer is disposed over the substrate and the transistor. At least one of the isolation region or the pre-metal dielectric layer includes a O | 12-29-2011 |
Peng Chew Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090232588 | Fastening Mechanism - A fastening mechanism for connecting posts or other objects together is described. The mechanism consists of a housing ( | 09-17-2009 |
Phuay-Yee Goh, Singapore SG
Pong Chai Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100015997 | POSITION DETERMINATION AND MOVEMENT DETERMINATION BY MOBILE TERMINAL - A method for detecting motion of a mobile device, the method comprising: from a central micro-processor of the mobile device detecting data of the polling ( | 01-21-2010 |
| 20100144367 | METHOD FOR LOCATION DETERMINATION AND A MOBILE DEVICE - A method and mobile device for location determination using sequential pattern recognition are disclosed. The method comprises determining a specific sequence of identifiers of a plurality of base transceiver stations that control cells through which a mobile device has passed when travelling along a path. The specific sequence of identifiers of a plurality of base transceiver stations are compared with a look-up table stored in a database. The look-up table comprises all possible sequence of identifiers of base transceiver stations and a location for each of the sequence of identifiers of base transceiver stations. The location of the path is determined from the comparison. | 06-10-2010 |
Priscilla Eng Choo Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090204092 | BODY ADHERING ABSORBENT ARTICLE - In a body adhering absorbent article, an absorbent structure is configured for disposition adjacent a female wearer's vaginal region to absorb bodily fluids discharged by the wearer. A shell supports the absorbent structure at the vaginal region and has an adhesive on a body-facing surface thereof for adhering the shell directly to the wearer. A placement aid is disposed on at least one of the absorbent structure and the shell to facilitate placement on the wearer. Securement components may be provided for securing the article in a folded configuration during wear and/or to the wearer's undergarment. Detachment components may also be provided to facilitate detachment of the article from the wearer. | 08-13-2009 |
| 20100152692 | Article with fluid-activated barriers - An absorbent article has a longitudinal direction, a transverse direction, a first major surface which forms a body-facing surface of the absorbent article, and a second major surface disposed distally from the first major surface which forms a garment-facing surface of the absorbent article. The article includes an absorbent core positioned between the first major surface and the second major surface. The article also includes at least one barrier structure having an inward-facing side and an outward-facing side, and at least one liquid shrinkable string. The at least one barrier structure is disposed on the first major surface, and the inward-facing side of the at least one barrier structure is attached to the absorbent article. In addition, a first portion of the at least one liquid shrinkable string is attached to the at least one barrier structure. | 06-17-2010 |
Sharon Puay Ngee Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090171418 | Apparatus for Non-Invasive Stimulation of an Animal - An apparatus for performing non-invasive stimulation of an animal's body, the apparatus comprising: a connector body having a conductor and a pair of stimulators electrically coupled to said conductor, the pair of stimulators being disposed on the connector body to allow the cutaneous surface of the animals body to be engaged therebetween. In use, a power source is electrically coupled to said conductor to transmit an electric current to the pair of stimulators to perform non-invasive stimulation on the animals body as current passes therethrough. | 07-02-2009 |
Siow Pheng Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090017666 | Electrical Connector Socket With Latch Mechanism - An electrical connector for receiving a daughter card having a plurality of conductive surfaces is described. The electrical connector has a socket with an elongated slot for receiving the daughter card. The slot has electrical terminals for engaging the plurality of conductive surfaces on the daughter card and for electrically connecting the daughter card to the connector. A latch at each end of the elongated slot secures the daughter card to the connector. The latch includes a pair of inwardly directed opposing securing hooks and a pair of unlocking members. | 01-15-2009 |
Soo Muay Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090181551 | INTEGRATED CIRCUIT SYSTEM EMPLOYING MULTIPLE EXPOSURE DUMMY PATTERNING TECHNOLOGY - An integrated circuit system that includes: providing a substrate coated with a photoresist material; exposing the photoresist material to an energy source through a first mask to form a first substrate feature and a second substrate feature therein; and exposing the photoresist material to the energy source through a second mask to transform the second substrate feature into another one of the first substrate feature therein. | 07-16-2009 |
| 20090309192 | INTEGRATED CIRCUIT SYSTEM WITH SUB-GEOMETRY REMOVAL AND METHOD OF MANUFACTURE THEREOF - A method of manufacture of an integrated circuit system includes: forming reticle data; detecting a sub-geometry, a singularity, or a combination thereof in the reticle data; applying a unit cell, a patch cell, or a combination thereof for removing the sub-geometry, the singularity, or the combination thereof from the reticle data; and fabricating an integrated circuit from the reticle data. | 12-17-2009 |
Suat Hong Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100080795 | BIODEGRADABLE THERMOGELLING POLYMER - There is provided a polymer comprising blocks of at least one polyethylene glycol) block, at least one poly(propylene glycol) block and at least one poly(hydroxybutyrate) block. Also provided is a method of making the polymer and a method of using the polymer. | 04-01-2010 |
Swee Ming Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100065100 | Photovoltaic Cell Circuit - A photovoltaic cell circuit ( | 03-18-2010 |
| 20100065107 | PHOTOVOLTAIC TILE - A photovoltaic tile | 03-18-2010 |
| 20100068030 | Wind Energy System - A wind energy system | 03-18-2010 |
| 20100068924 | ELECTRICAL CONNECTION SYSTEM - An electrical connection system | 03-18-2010 |
| 20100068926 | Base Tile - A base tile | 03-18-2010 |
| 20100078058 | SOLAR ELECTRIC PANEL - A solar panel | 04-01-2010 |
| 20110162290 | Photovoltaic Cell Support Assembly - A photovoltaic cell support assembly ( | 07-07-2011 |
| 20110162693 | Connection System for a Solar Electric Power Conversion System - A connection system | 07-07-2011 |
Teck Chai Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20080219673 | Optical Transceiver with Reduced Height - A transceiver having a light source die, a photodetector die and a substrate is disclosed. The substrate has a first well in which the light source die is mounted and a second well in which the photodetector die is mounted. The substrate has a reflective surface which blocks light leaving the light source from reaching the photodetector unless the light is reflected by an object external to the transceiver. The reflecting surface of the second well in the substrate is shaped to concentrate light received from outside the transceiver onto the photodetector, and in one aspect of the invention it comprises a non-imaging optical element. The light source is powered by applying a potential between first and second contacts on the light source die. A signal is generated between first and second contacts on the photodetector die in response to illumination of the photodetector die. | 09-11-2008 |
Teck Leng Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20090171418 | Apparatus for Non-Invasive Stimulation of an Animal - An apparatus for performing non-invasive stimulation of an animal's body, the apparatus comprising: a connector body having a conductor and a pair of stimulators electrically coupled to said conductor, the pair of stimulators being disposed on the connector body to allow the cutaneous surface of the animals body to be engaged therebetween. In use, a power source is electrically coupled to said conductor to transmit an electric current to the pair of stimulators to perform non-invasive stimulation on the animals body as current passes therethrough. | 07-02-2009 |
Tieh Cheng Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110188673 | APPARATUS FOR ENABLING KARAOKE - There is provided an apparatus for enabling karaoke. The apparatus includes a casing for the apparatus; a microphone array incorporated within the casing, the microphone array being concealed from a user by the casing; a controller coupled to the microphone array to at least process audio signals from the user input at the microphone array; a data storage device coupled to the controller, the data storage device being for storing pre-recorded songs used for karaoke, and for storing songs as sung by the user; and an image capturing device coupled to the controller, the image capturing device being for capturing images of the user while the user is singing, with the captured images of the user being stored on the data storage device. | 08-04-2011 |
Yee Boon Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20080320008 | Video Recording Device - The invention refers to a method for updating of content information related to an audio/visual storage medium wherein content information is being stored on the storage medium after generating the content information. The updated content information is stored in a user data area of the data stream stored on the storage medium. | 12-25-2008 |
Yit Wooi Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100298123 | PROCESS OF MAKING METAL CHALCOGENIDE PARTICLES - There is disclosed a process of making metal chalcogenide particles. The process comprises the steps of reacting a metal salt solution with a precipitant solution under conditions to form metal chalcogenide particles and by-product thereof, coating the metal chalcogenide particles with a surfactant; and separating the surfactant coated chalcogenide particles from the by-product to obtain metal chalcogenide particles substantially free of by-product. | 11-25-2010 |
Young Koon Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20100148042 | SENSOR - A sensor for angle measurement of a joint is disclosed. The sensor comprises a code strip, a linear encoder configured to detect relative movement between the linear encoder and the code strip, and a microcontroller configured to compute angular rotation of the joint from linear displacement obtained by the relative movement. The relative movement corresponds to rotation of the joint. A corresponding method and system are also disclosed. | 06-17-2010 |
Zenton Goh, Singapore SG
| Patent application number | Description | Published |
|---|---|---|
| 20110148602 | METHOD AND A SYSTEM FOR DETERMINING THE LOCATION OF A SUBJECT, AND A RADIO FREQUENCY IDENTIFICATION TAG ASSEMBLY - According to one embodiment of the present invention, a method for determining the location of a subject is provided. The method includes receiving, by a first set of receivers out of a plurality of receivers, a first signal from a radio frequency identification tag being assigned to the subject, wherein the radio frequency identification tag has assigned a radio frequency identification tag identity; receiving, by a second set of receivers out of a plurality of receivers, a second signal from the radio frequency identification tag, the second signal being different from the first signal, wherein the second set of receivers is different from the first set of receivers; computing a location score based on an information about the first signal, wherein the information about the first signal is included in the first signal and on the first set of receivers, and further based on an information about the second signal, wherein the information about the second signal is included in the second signal and on the second set of receivers; and determining the location of the subject based on the location score. A system for determining the location of a subject is also provided. A radio frequency identification tag assembly is also provided. | 06-23-2011 |