Patent application number | Description | Published |
20120275211 | Reconfigurable Crossbar Memory Array - A two-dimensional array of switching devices comprises a plurality of crossbar tiles. Each crossbar tile has a plurality of row wire segments intersecting a plurality of column wire segments, and a plurality of switching devices each formed at an intersection of a row wire segment and a column wire segment. The array has a plurality of lateral latches disposed in a plane of the switching devices. Each lateral latch is linked to a first wire segment of a first crossbar tile and a second wire segment of a second crossbar tile opposing the first wire segment. The lateral latch is operable to close or open to form or break an electric connection between the first and second wire segments. | 11-01-2012 |
20130023106 | DEVICE HAVING MEMRISTIVE MEMORY | 01-24-2013 |
20130099872 | CHAOTIC OSCILLATOR-BASED RANDOM NUMBER GENERATION - Chaotic oscillator-based random number generation is described. In an example, a circuit includes a negative differential resistance (NDR) device to receive an alternating current (AC) bias. The circuit further includes a capacitance in parallel with the NDR device, the capacitance having a value such that, in response to a direct current (DC) bias applied to the NDR device and the capacitance, a voltage across the capacitance oscillates with a chaotic period. The circuit further includes a random number generator to generate random numbers using samples of the voltage across the capacitance. | 04-25-2013 |
20130106462 | Field-programmable analog array with memristors | 05-02-2013 |
20130106480 | METAL-INSULATOR TRANSITION LATCH | 05-02-2013 |
20130234103 | NANOSCALE SWITCHING DEVICE WITH AN AMORPHOUS SWITCHING MATERIAL - Nanoscale switching devices are disclosed. The devices have a first electrode of a nanoscale width; a second electrode of a nanoscale width; and a layer of an active region disposed between and in electrical contact with the first and second electrodes. The active region contains a switching material capable of carrying a significant amount of defects which can trap and de-trap electrons under electrical bias. The switching material is in an amorphous state. A nanoscale crossbar array containing a plurality of the devices and a method for making the devices are also disclosed. | 09-12-2013 |
20130242637 | Memelectronic Device - A memelectronic device may have a first and a second electrode spaced apart by a plurality of materials. A first material may have a memory characteristic exhibited by the first material maintaining a magnitude of an electrically controlled physical property after discontinuing an electrical stimulus on the first material. A second material may have an auxiliary characteristic. | 09-19-2013 |
20140003139 | MEMORY DEVICES WITH IN-BIT CURRENT LIMITERS | 01-02-2014 |
20140027705 | MEMRISTOR CELL STRUCTURES FOR HIGH DENSITY ARRAYS - A memristor array includes a lower layer of crossbars, upper layer of crossbars intersecting the lower layer of crossbars, memristor cells interposed between intersecting crossbars, and pores separating adjacent memristor cells. A method forming a memristor array is also provided. | 01-30-2014 |
20140029327 | BIPOLAR RESISTIVE SWITCH HEAT MITIGATION - A heat mitigated bipolar resistive switch includes a BRS matrix sandwiched between first and second electrodes and a heat mitigator. The BRS matrix is to support bipolar switching of a conduction channel formed between the first and second electrodes through BRS matrix. The heat mitigator is to reduce heat in the BRS matrix generated during bipolar switching. The heat mitigator includes one or both of a parallel-connected NDR element to limit current flowing in the BRS matrix and a high thermal conductivity material to conduct the generated heat away from the BRS matrix above a predetermined elevated temperature. | 01-30-2014 |
20140029328 | Storing Data in a Non-volatile Latch - Storing data in a non-volatile latch may include applying a bias voltage to a memristor pair in electrical communication with at least one logic gate and applying a gate voltage to a transmission gate to allow an input voltage to be applied to the at least one logic gate where the input voltage is greater than the bias voltage and the input voltage determines a resistance state of the memristor pair. | 01-30-2014 |
20140091270 | LOW ENERGY MEMRISTORS WITH ENGINEERED SWITCHING CHANNEL MATERIALS - Low energy memristors with engineered switching channel materials include: a first electrode; a second electrode; and a switching layer positioned between the first electrode and the second electrode, wherein the switching layer includes a first phase comprising an insulating matrix in which is dispersed a second phase comprising an electrically conducting compound material for forming a switching channel. | 04-03-2014 |
20140112059 | HIGH-RELIABILITY HIGH-SPEED MEMRISTOR - A memristor has a first electrode, a second electrode parallel to the first electrode, and a switching layer disposing between the first and second electrodes. The switching layer contains a conduction channel and a reservoir zone. The conduction channel has a Fermi glass material with a variable concentration of mobile ions. The reservoir zone is laterally disposed relative to the conduction channel, and functions as a source/sink of mobile ions for the conduction channel In the switching operation, under the cooperative driving force of both electric field and thermal effects, the mobile ions are moved into or out of the laterally disposed reservoir zone to vary the concentration of the mobile ions in the conduction channel to change the conductivity of the Fermi glass material. | 04-24-2014 |
20140158973 | NITRIDE-BASED MEMRISTORS - A nitride-based memristor memristor includes: a first electrode comprising a first nitride material; a second electrode comprising a second nitride material; and active region positioned between the first electrode and the second electrode. The active region includes an electrically semiconducting or nominally insulating and weak ionic switching nitride phase. A method for fabricating the nitride-based memristor is also provided. | 06-12-2014 |
20140166957 | HYBRID CIRCUIT OF NITRIDE-BASED TRANSISTOR AND MEMRISTOR - A hybrid circuit comprises a nitride-based transistor portion and a memristor portion. The transistor includes a source and a drain and a gate for controlling conductance of a channel region between the source and the drain. The memristor includes a first electrode and a second electrode separated by an active switching region. The source or drain of the transistor forms one of the electrodes of the memristor. | 06-19-2014 |
20140346426 | Memristor with Channel Region in Thermal Equilibrium with Containing Region - A memristor with a channel region in thermal equilibrium with a containing region. The channel region has a variable concentration of mobile ions. The containing region, formed of stoichiometric crystalline material, contains and is in thermal equilibrium with the channel region. | 11-27-2014 |
20150041751 | CUSTOMIZABLE NONLINEAR ELECTRICAL DEVICES - In one example, a customizable nonlinear electrical device includes a first conductive layer, a second conductive layer, and a thin film metal-oxide layer sandwiched between the first conductive layer and the second conductive layer to form a first rectifying interface between the metal-oxide layer and the first conductive layer and a second rectifying interface between the metal-oxide layer and the second conductive layer. The metal-oxide layer includes an electrically conductive mixture of co-existing metal and metal oxides. A method forming a nonlinear electrical device is also provided. | 02-12-2015 |