Patent application number | Description | Published |
20100049459 | High Dynamic Range Charge Measurements - A charge amplifier for use in radiation sensing includes an amplifier, at least one switch, and at least one capacitor. The switch selectively couples the input of the switch to one of at least two voltages. The capacitor is electrically coupled in series between the input of the amplifier and the input of the switch. The capacitor is electrically coupled to the input of the amplifier without a switch coupled therebetween. A method of measuring charge in radiation sensing includes selectively diverting charge from an input of an amplifier to an input of at least one capacitor by selectively coupling an output of the at least one capacitor to one of at least two voltages. The input of the at least one capacitor is operatively coupled to the input of the amplifier without a switch coupled therebetween. The method also includes calculating a total charge based on a sum of the amplified charge and the diverted charge. | 02-25-2010 |
20100051818 | Method and Apparatus for the Measurement of Signals from Radiation Sensors - The preferred embodiments of the present invention include a device for measuring an ionizing event in a radiation sensor. The device can include a charge amplifier and a timing shaper. The charge amplifier receives a cathode signal and is configured to output an amplified cathode signal. The timing shaper is operatively connected to the charge amplifier to receive the amplified cathode signal. The timing shaper is configured to generate a first pulse in response to a beginning of the ionizing event and a second pulse in response to an end of the ionizing event. The first and second pulses are associated with a depth of interaction of the ionizing event and are generated in response to a slope of the amplified cathode signal changing. | 03-04-2010 |
20120121050 | Method and Apparatus for Analog Pulse Pile-Up Rejection - A method and apparatus for pulse pile-up rejection are disclosed. The apparatus comprises a delay value application constituent configured to receive a threshold-crossing time value, and provide an adjustable value according to a delay value and the threshold-crossing time value; and a comparison constituent configured to receive a peak-occurrence time value and the adjustable value, compare the peak-occurrence time value with the adjustable value, indicate pulse acceptance if the peak-occurrence time value is less than or equal to the adjustable value, and indicate pulse rejection if the peak-occurrence time value is greater than the adjustable value. | 05-17-2012 |
20120293351 | Method and Apparatus for Low Power Analog-to-Digital Conversion - A method and apparatus for analog-to-digital conversion. An Analog-to-Digital Converter (ADC) includes M ADC | 11-22-2012 |
20140084961 | Method and Apparatus for Analog Pulse Pile-Up Rejection - A method and apparatus for pulse pile-up rejection are disclosed. The apparatus comprises a delay value application constituent configured to receive a threshold-crossing time value, and provide an adjustable value according to a delay value and the threshold-crossing time value; and a comparison constituent configured to receive a peak-occurrence time value and the adjustable value, compare the peak-occurrence time value with the adjustable value, indicate pulse acceptance if the peak-occurrence time value is less than or equal to the adjustable value, and indicate pulse rejection if the peak-occurrence time value is greater than the adjustable value. | 03-27-2014 |
20140184319 | SHAPER DESIGN IN CMOS FOR HIGH DYNAMIC RANGE - An analog filter is presented that comprises a chain of filter stages, a feedback resistor for providing a negative feedback, and a feedback capacitor for providing a positive feedback. Each filter stage has an input node and an output node. The output node of a filter stage is connected to the input node of an immediately succeeding filter stage through a resistor. The feedback resistor has a first end connected to the output node of the last filter stage along the chain of filter stages, and a second end connected to the input node of a first preceding filter stage. The feedback capacitor has a first end connected to the output node of one of the chain of filter stages, and a second end connected to the input node of a second preceding filter stage. | 07-03-2014 |
20140217297 | Array of Virtual Frisch-Grid Detectors with Common Cathode and Reduced Length of Shielding Electrodes - A radiation detector system is disclosed that effectively solves the electron trapping problem by optimizing shielding of the individual virtual Frisch-grid detectors in an array configuration. | 08-07-2014 |
20140231657 | RADIATION DETECTOR DEVICE FOR REJECTING AND EXCLUDING INCOMPLETE CHARGE COLLECTION EVENTS - A radiation detector device is provided that is capable of distinguishing between full charge collection (FCC) events and incomplete charge collection (ICC) events based upon a correlation value comparison algorithm that compares correlation values calculated for individually sensed radiation detection events with a calibrated FCC event correlation function. The calibrated FCC event correlation function serves as a reference curve utilized by a correlation value comparison algorithm to determine whether a sensed radiation detection event fits the profile of the FCC event correlation function within the noise tolerances of the radiation detector device. If the radiation detection event is determined to be an ICC event, then the spectrum for the ICC event is rejected and excluded from inclusion in the radiation detector device spectral analyses. The radiation detector device also can calculate a performance factor to determine the efficacy of distinguishing between FCC and ICC events. | 08-21-2014 |
20150061729 | Method and Apparatus for Sub-Hysteresis Discrimination - Embodiments of comparator circuits are disclosed. A comparator circuit may include a differential input circuit, an output circuit, a positive feedback circuit operably coupled between the differential input circuit and the output circuit, and a hysteresis control circuit operably coupled with the positive feedback circuit. The hysteresis control circuit includes a switching device and a transistor. The comparator circuit provides sub-hysteresis discrimination and high speed discrimination. | 03-05-2015 |