Patent application number | Description | Published |
20090089612 | SYSTEM AND METHOD OF REDUNDANTLY STORING AND RETRIEVING DATA WITH COOPERATING STORAGE DEVICES - A system and method for data storage in an array. A system includes a client coupled to a storage subsystem. The storage subsystem comprises data storage locations addressable as rows and columns in an array. Each column comprises a separate storage device. Each row includes redundant data. For a given row, a coordinating storage device receives data from the client, coordinates computation and storage of redundant data, and forwards data to other storage devices. In response to receiving data targeted for storage in a given storage location, a non-volatile, temporary storage device that is associated with the separate storage device that includes the given storage location buffers the received data. The coordinating storage device conveys a write completion message to the client in response to detecting that the data has been buffered in the non-volatile, temporary storage devices. At least two storage devices are coordinating storage devices in separate rows. | 04-02-2009 |
20090154003 | Systems and Methods for Using an On-the-fly CBD Estimate to Adjust Fly-Height - Various embodiments of the present invention provide systems and methods for using channel bit density estimates to adjust fly-height. For example, various embodiments of the present invention provide methods for adaptively adjusting fly-height. Such methods include providing a storage medium that includes information corresponding to a process data set, and a read/write head assembly that is disposed a variable distance from the storage medium. The process data set is accessed from the storage medium. A first channel bit density estimate is adaptively calculated based at least in part on the process data set and a second channel bit density estimate that was previously calculated. The variable distance is modified based at least in part on the first channel bit density estimate. A third channel bit density is adaptively calculated based at least in part on the process data set and a fourth channel bit density estimate that was previously calculated. The variable distance is modified based at least in part on the third channel bit density estimate. | 06-18-2009 |
20090161245 | Frequency Domain Approach for Efficient Computation of Fixed-point Equalization Targets - Various embodiments of the present invention provide systems and methods for equalizing an input signal. For example, various embodiments of the present invention provide a method for performing equalization in a storage device. Such methods include providing an equalizer circuit that is governed by a target value, and a filter circuit that is governed by a filter coefficient. An initial value is provided to the equalizer circuit as the target value, and an overall target based at least in part on the initial value and the filter coefficient is calculated. An updated value is calculated based on the overall target, and the updated value is provided to the equalizer circuit as the target value. | 06-25-2009 |
20090235116 | Systems and Methods for Regenerating Data from a Defective Medium - Various embodiments of the present invention provide systems and methods for data regeneration. For example, a system for data regeneration is disclosed that includes a data input derived from the medium. A data detector and a data recovery system receive the data input. The data detector provides a first soft output, and the data recovery system provides a second soft output. The first soft output and the second soft output are provided to a multiplexer. A media defect detector performs a media defect detection process, and provides a defect flag that indicates whether the data input is derived form a defective portion of the medium. The defect flag is provided to the multiplexer where it is used to select whether the first soft output or the second soft output is provides as an extrinsic output. | 09-17-2009 |
20090268848 | Systems and Methods for Filter Based Media Defect Detection - Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data receiving system is disclosed that includes a data signal provided from a medium that may include a defective portion. An absolute value circuit receives the data signal and provides an output corresponding to an absolute value of the data signal. The output corresponding to the absolute value of the data signal is input to a filter that filters it and provides a filtered output. In some cases, the filter is a digital filter operable to integrate the absolute value of the data signal. A comparator receives the output from the filter and compares it with a threshold value. The result of the comparison indicates a defect status of the medium. | 10-29-2009 |
20100053787 | Systems and Methods for On-The-Fly Write Pre-compensation Estimation - Various embodiments of the present invention provide systems and methods for write pre-compensation. For example, various embodiments of the present invention provide systems for on-the-fly estimation of write pre-compensation values. Such systems include a magnetic storage medium, a read/write head assembly disposed in relation to the magnetic storage medium, and an analog to digital converter that receives an analog signal from the read/write head assembly corresponding to a data set stored on the magnetic storage medium and provides a series of digital samples corresponding to the data set. The storage devices further include a read data processing circuit that receives the same series of digital samples and provides a user data output, and a pre-compensation value calculation circuit that receives the series of digital samples and provides an updated write pre-compensation value. | 03-04-2010 |
20100053793 | Systems and Methods for Adaptive Write Pre-Compensation - Various embodiments of the present invention provide systems and methods for write pre-compensation. For example, various embodiments of the present invention provide methods for modifying magnetic information transfer. The methods include retrieving magnetically represented data from a storage medium, and converting the magnetically represented data to a series of data samples. A preceding pattern and a transition status is identified in the series of data samples, and an equalized channel response is computed based on an estimated NLTS value. An error value is computed that corresponds to a difference between the estimated NLTS value and an actual NLTS value, and a pre-compensation value is computed based at least in part on the error value. | 03-04-2010 |
20100088357 | Systems and Methods for Memory Efficient Signal and Noise Estimation - Various embodiments of the present invention provide systems and methods for estimating signal and noise powers in a received signal set. For example, one embodiment of the present invention provides a method for determining signal power and noise power. The method uses a storage medium that includes a N | 04-08-2010 |
20100157458 | Systems and Methods for Dibit Correction - Various embodiments of the present invention provide systems and methods for providing a corrected dibit signal. As an example, various embodiments of the present invention provide dibit correction circuits. Such dibit correction circuits include a dibit sample buffer, a maximum sample detector circuit, a side sample detector circuit, and a dibit correction circuit. The dibit sample buffer includes a plurality of samples of an uncorrected dibit signal. The maximum sample detector circuit identifies a maximum sample of the plurality of samples of the uncorrected dibit signal, and the side sample detector circuit identifies a first side sample prior to the maximum sample on the uncorrected dibit signal and a second side sample following the maximum sample on the uncorrected dibit signal. The dibit correction circuit applies a correction factor calculated based at least in part on the maximum sample, the first side sample and the second side sample to at least a subset of the plurality of samples of the uncorrected dibit signals to yield a plurality of corrected dibit signals. | 06-24-2010 |
20100157464 | Systems and Methods for Adaptive MRA Compensation - Various embodiments of the present invention provide systems and methods for reducing head distortion. For example, various embodiments of the present invention provide storage devices that include a storage medium, a read/write head assembly, and an adaptive distortion modification circuit. The storage medium includes information that may be sensed by the read/write head assembly that is disposed in relation to the storage medium. The adaptive distortion modification circuit receives the information sensed by the read/write head assembly and adaptively estimates and implements a distortion compensation factor in the analog domain. In some instances of the aforementioned embodiments, the read/write head assembly includes a magneto resistive head. In such instances, the distortion compensation factor is designed to compensate for non-linear distortion introduced by the magneto resistive head. | 06-24-2010 |
20100177419 | AGC Loop with Weighted Zero Forcing and LMS Error Sources and Methods for Using Such - Various embodiments of the present invention provide systems and methods for gain control. For example, some embodiments of the present invention provide variable gain control circuits. Such circuits include a zero forcing loop generating a zero forcing feedback and a least mean square loop generating a least mean square feedback. An error quantization circuit generates a hybrid feedback based upon a threshold condition using the zero forcing feedback and the least mean square feedback. A variable gain amplifier is at least in part controlled by a derivative of the hybrid feedback. | 07-15-2010 |
20100177430 | Systems and Methods for Fly-Height Control Using Servo Address Mark Data - Various embodiments of the present invention provide systems and methods for determining fly-height adjustments. For example, various embodiments of the present invention provide storage devices that include a storage medium, a read/write head assembly disposed in relation to the storage medium ( | 07-15-2010 |
20100182718 | Systems and Methods for Adaptive CBD Estimation in a Storage Device - Various embodiments of the present invention provide systems and methods for adaptive channel bit density estimation. For example, various embodiments of the present invention provide methods for adaptively estimating channel bit density. Such methods include providing a storage medium ( | 07-22-2010 |
20100265608 | Systems and Methods for Storage Channel Testing - Various embodiments of the present invention provide systems and methods for validating elements of storage devices. A an example, various embodiments of the present invention provide semiconductor devices that include a write path circuit, a read path circuit and a validation circuit. The write path circuit is operable to receive a data input and to convert the data input into write data suitable for storage to a storage medium. The read path circuit is operable to receive read data and to convert the read data into a data output. The validation circuit is operable to: receive the write data, augment the write data with a first noise sequence to yield a first augmented data series; and augment a derivative of the first augmented data series with a second noise sequence to yield the read data. | 10-21-2010 |
20100271724 | Systems and Methods for Nyquist Tone Harmonic Measurements - Various embodiments of the present invention provide systems and methods for determining changes in fly-height. For example, various embodiments of the present invention provide storage devices that include a storage medium, an offset frequency, a read/write head assembly, and a harmonic fly-height change detection circuit. The storage medium includes a periodic data pattern that repeats at a data frequency. The read/write head assembly disposed in relation to the storage medium such that it senses the periodic data pattern and provides a sensed periodic data pattern. The harmonic fly-height change detection circuit samples the sensed periodic data pattern at an aggregate frequency to yield a first set of samples and a second set of samples. The aggregate frequency is the data frequency adjusted by the offset frequency. The harmonic fly-height change detection circuit calculates a first magnitude of the first set of samples and a second magnitude of the second set of samples. | 10-28-2010 |
20100287420 | Systems and Methods for Adaptive Equalization in Recording Channels - Various embodiments of the present invention provide systems and methods for performing adaptive equalization. For example, various embodiments of the present invention provide methods for adaptive equalization that include providing a data processing system with an equalizer circuit ( | 11-11-2010 |
20110043938 | Systems and Methods for Fly-Height Control Using Servo Data - Various embodiments of the present invention provide systems and methods for determining changes in fly-height. For example, various embodiments of the present invention provide storage devices that include a storage medium having servo data thereon. A read/write head assembly is disposed in relation to the storage medium. A servo based fly-height adjustment circuit receives the servo data via the read/write head assembly, and calculates a first harmonics ratio based on the received data and compares the first harmonics ratio with a second harmonics ratio to determine an error in the distance between the read/write head assembly and the storage medium. | 02-24-2011 |
20110063747 | Systems and Methods for Timing and Gain Acquisition - Various embodiments of the present invention provide systems and methods for acquiring timing and/or gain information. For example, various embodiments of the present invention provide data processing circuits that include a sample splitting circuit, a first averaging circuit, a second averaging circuit and a parameter calculation circuit. The sample splitting circuit receives a data input that includes a series of samples that repeat periodically over at least a first phase and a second phase. The sample splitting circuit divides the series of samples into at least a first sub-stream corresponding to the first phase and a second sub-stream corresponding to the second phase. The first averaging circuit averages values from the first sub-stream to yield a first average, and the second averaging circuit averages values from the second sub-stream to yield a second average. The parameter calculation circuit calculates a parameter value based at least in part on the first average and the second average. | 03-17-2011 |
20110164669 | Systems and Methods for Determining Noise Components in a Signal Set - Various embodiments of the present invention provide systems and methods for estimating noise components in a received signal set. For example, one embodiment of the present invention provides a noise estimation circuit that includes a data detector circuit and a noise component calculation circuit. The data detector circuit receives a series of data samples and provides a detected output, and the noise component calculation circuit provides an electronics noise power output and a media noise power output each calculated based at least in part on the detected output and the series of data samples. | 07-07-2011 |
20110199699 | FREQUENCY-BASED APPROACH FOR DETECTION AND CLASSIFICATION OF HARD-DISC DEFECT REGIONS - In a hard-disc drive read channel, frequency-based measures are generated at two different data frequencies (e.g., 2T and DC) by applying a transform, such as a discrete Fourier transform (DFT), to signal values, such as ADC or equalizer output values, corresponding to, e.g., a 2T data pattern stored on the hard disc. The frequency-based measures are used to detect defect regions on the hard disc and/or to classify defect regions as being due to either thermal asperity (TA) or drop-out media defect (MD). | 08-18-2011 |
20110205653 | Systems and Methods for Data Recovery - Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is described that include a media defect detector and an anchor fixing circuit. The media defect detector is operable to identify a media defect, and the anchor fixing circuit is operable to identify a location relative to the media defect. The location is reproducible. | 08-25-2011 |
20110209026 | Systems and Methods for Data Recovery Using Enhanced Sync Mark Location - Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a first set of data samples corresponding to a region of interest. The pattern comparison circuit is operable to compare a subset of the first set of data samples with a subset of a second set of data samples corresponding to the region of interest. The pattern comparison circuit is operable to yield a match value corresponding to a degree of similarity between the first set of data samples with the subset of a second set of data samples. The threshold comparison circuit is operable to indicate an anchor point based at least in part on the magnitude of the match value relative to a threshold value. | 08-25-2011 |
20110235490 | AMPLITUDE-BASED APPROACH FOR DETECTION AND CLASSIFICATION OF HARD-DISC DEFECT REGIONS - In a hard-disc drive, a defect region on the hard disc is classified as corresponding to either thermal asperity (TA) or media defect (MD) by generating two statistical measures. A first measure (e.g., ∝ | 09-29-2011 |
20110249361 | FLY-HEIGHT CONTROL USING ASYNCHRONOUS SAMPLING - In one embodiment, a hard-disk drive system performs fly-height control using a read-back mode and a loop-back mode. The read-back mode measures first and second harmonics pre-recorded on the medium and divides the first measurement by the second to obtain a read-back mode harmonic ratio. The loop-back mode measures the same first and second harmonics; however, the harmonics are provided by a write precompensation circuit rather than the medium. Further, the loop-back mode measurements are performed using asynchronous sampling to address aliasing and quantization errors. The first measurement is divided by the second to generate a loop-back harmonic ratio. In logarithm domain, the loop-back ratio is subtracted from the read-back mode ratio to remove environment-induced variations in the read path electronic circuits. The resulting harmonic ratio is subtracted from an initial harmonic ratio determined, for example, during manufacturing, to determine how much the harmonic ratio has changed. | 10-13-2011 |
20120026623 | DIBIT EXTRACTION FOR ESTIMATION OF CHANNEL PARAMETERS - In one embodiment, a storage-device-implemented method for estimating one or more channel parameters of a storage device including a read channel and a storage medium with a bit sequence stored on the storage medium. The method includes: (a) the storage device reading at least a portion of the bit sequence from the storage medium to generate a bit response; (b) the storage device convolving the bit response to compute an impulse response of the read channel; and (c) the storage device estimating one or more channel parameters based on the computed impulse response. | 02-02-2012 |
20120033316 | Systems and Methods for Format Efficient Calibration for Servo Data Based Harmonics Calculation - Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a method for calculating harmonics is disclosed that includes: providing a data processing circuit; receiving a first data set derived from a data source during a servo data processing period; performing a first harmonics calculation using the first data set to yield a first harmonics ratio; receiving a second data set derived from a source other than the previously mentioned data source during a user data processing period; performing a second harmonics calculation using the second data set to yield a second harmonics ratio; and calculating a ratio of the first harmonics ratio to the second harmonics ratio. | 02-09-2012 |
20120033323 | Systems and Methods for Servo Data Based Harmonics Calculation - Various embodiments of the present invention provide systems and methods for servo data based harmonics calculation. For example, a circuit for determining harmonics is disclosed that includes an analog to digital conversion circuit that provides a series of digital samples corresponding to a pattern within a servo data region of a storage medium, and a harmonic calculation circuit. The harmonic calculation circuit is operable to calculate a first harmonic value for the series of digital samples, calculate a second harmonic value for the series of digital samples, and calculate a ratio of the first harmonic value to the second harmonic value. | 02-09-2012 |
20120038998 | Systems and Methods for Phase Offset Based Spectral Aliasing Compensation - Various embodiments of the present invention provide systems and methods for phase offset based spectral aliasing compensation. For example, a circuit for spectral aliasing reduction is disclosed that includes a phase shift circuit operable to phase shift an analog input signal and to provide a phase shifted analog signal; a first analog to digital converter circuit operable to provide a first series of digital samples corresponding to the analog input signal at a sampling frequency; a second analog to digital converter circuit operable to provide a second series of digital samples corresponding to the phase shifted analog signal at the sampling frequency; and an averaging circuit operable to average the first series of digital samples with the second series of digital samples to yield an average output. | 02-16-2012 |
20120056612 | Systems and Methods for Phase Compensated Harmonic Sensing in Fly Height Control - Various embodiments of the present invention provide systems and methods for phase compensated harmonic sensing. For example, a circuit for harmonics calculation is disclosed that includes a phase difference estimation circuit and a phase offset compensation circuit. The harmonic calculation circuit is operable to calculate a first harmonic based on a periodic data pattern and a second harmonic based on the periodic data pattern. The phase difference estimation circuit operable to calculate a phase difference between the first harmonic and the second harmonic. The phase offset compensation circuit operable to align the second harmonic with the first harmonic to yield an aligned harmonic. | 03-08-2012 |
20120063022 | Systems and Methods for Inter-track Interference Compensation - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. | 03-15-2012 |
20120063023 | Systems and Methods for Block-wise Inter-track Interference Compensation - Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set. | 03-15-2012 |
20120063024 | Systems and Methods for Handling Sector Gaps in Inter-track Interference Compensation - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes an inter-track interference determination circuit operable to calculate an inter-track interference from a previous track data set based at least in part on the previous track data set and a current track data set. The previous track data set includes a gap. A portion of the data in the previous track data set corresponds to a previous track on a storage medium, and the data in the previous track data set corresponding to the gap corresponds to a track preceding a previous track. | 03-15-2012 |
20120063284 | Systems and Methods for Track to Track Phase Alignment - Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set. | 03-15-2012 |
20120068752 | Systems and Methods for Low Latency Noise Cancellation - Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing circuit is discussed that includes a data detector circuit, a detector mimicking circuit, and an error calculation circuit. The data detector circuit is operable to perform a data detection process on a first signal derived from a data input to yield a detected output. The data mimicking circuit is operable to process a second signal derived from the data input to yield a mimicked output. The error calculation circuit is operable to calculate a difference between the second signal and a third signal derived from the mimicked output to yield a feedback signal. The feedback signal is operable to modify the data input during a subsequent period. | 03-22-2012 |
20130021187 | Systems and Methods for ADC Based Timing and Gain Control - Various embodiments of the present invention provide circuits, systems and methods for data processing. For example, a data processing circuit is discussed that includes: an analog to digital converter circuit, a target response circuit, and a timing circuit. The analog to digital converter circuit is operable to receive a data input and to provide corresponding digital samples synchronous to a sampling phase. The sampling phase corresponds to a phase feedback. The target response circuit is operable to provide an expected output corresponding to a known input. The timing circuit is operable to generate the phase feedback based at least in part on values derived from the expected output. | 01-24-2013 |
20130021689 | STORAGE MEDIA INTER-TRACK INTERFERENCE CANCELLATION - Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, which decodes the ITT cancelled data and provides the decoded ITI cancelled data as output of the read channel. | 01-24-2013 |
20130021690 | Systems and Methods for User Data Based Fly Height Calculation - Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit. | 01-24-2013 |
20130070362 | ENERGY-BASED INTER-TRACK INTERFERENCE CANCELLATION - Described embodiments cancel inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads one or more sectors in the desired track and generates one or more groups of sample values corresponding to each of the sectors. An ITI canceller estimates an ITI response and an ITI signal for each sample value corresponding to (i) a next adjacent track and (ii) a previous adjacent track. If the estimated ITI response of the previous adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the previous adjacent track from each associated sample value of the desired track. If the estimated ITI response of the next adjacent track reaches a predetermined threshold, the ITI canceller subtracts the estimated ITI signal corresponding to the next adjacent track from each associated sample value of the desired track. | 03-21-2013 |
20130223199 | STORAGE MEDIA INTER-TRACK INTERFERENCE CANCELLATION - Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. An iterative decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of the adjacent track and subtracts the estimated ITI of the adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the iterative decoder, which decodes the ITI cancelled data and provides the decoded ITI cancelled data as output data of the read channel. | 08-29-2013 |
20130286498 | INTER-TRACK INTERFERENCE MITIGATION IN MAGNETIC RECORDING SYSTEMS USING AVERAGED VALUES - Hardware-based methods and apparatus are provided for inter-track interference mitigation in magnetic recording systems using averaged values. Inter-track interference (ITI) is mitigated in a magnetic recording system by obtaining ITI cancellation data; and providing the ITI cancellation data for ITI mitigation, wherein the ITI mitigation is performed in combination with an averaging procedure for one or more of ITI mitigation of averaged data and averaging of ITI mitigated data. The sector is optionally decoded using the ITI mitigated samples. Samples for one or more side track sectors can also be averaged. The averaged side track samples can be provided as ITI cancellation data for ITI mitigation. The averaging procedure optionally applies a scaling factor to each read value. | 10-31-2013 |
20140149796 | Systems and Methods for Controlled Data Processor Operational Marginalization - Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability. | 05-29-2014 |
20140153126 | Systems and Methods for Old Data Inter-track Interference Compensation - Systems and methods for data processing, and more particularly to estimating or calculating interference between tracks on a storage medium. | 06-05-2014 |
20140233130 | Systems and Methods for Determining Noise Components in a Signal Set - Various embodiments of the present invention provide systems and methods for estimating noise components in a received signal set. For example, one embodiment of the present invention provides a noise estimation circuit that includes a data detector circuit and a noise component calculation circuit. The data detector circuit receives a series of data samples and provides a detected output, and the noise component calculation circuit provides an electronics noise power output and a media noise power output each calculated based at least in part on the detected output and the series of data samples. | 08-21-2014 |
20140247514 | Systems and Methods for ADC Sample Based Inter-track Interference Compensation - Various embodiments of the present invention provide systems and methods for mitigating inter-track interference using pre-equalized data samples. | 09-04-2014 |
20140250352 | Systems and Methods for Signal Reduction Based Data Processor Marginalization - Systems, methods, devices, circuits for data processing, and more particularly to data processing including operational marginalization capability, and/or operational improvement capability. | 09-04-2014 |
20140286385 | Systems and Methods for Multi-Dimensional Signal Equalization - Embodiments are related to systems and methods for data processing, and more particularly to systems and methods for equalizing a data signal. | 09-25-2014 |
20150015984 | Storage Media Inter-Track interference Cancellation - Described embodiments provide a method of cancelling inter-track interference (ITI) from one or more sectors read from a desired track of a storage medium. A read channel reads sectors in a desired track of the storage medium. A decoder of the read channel decodes the read sectors, and if the read sectors are incorrectly recovered from the storage medium, selected sectors of a first adjacent track and a second adjacent track are read. An ITI canceller of the read channel estimates ITI in the read sectors of the desired track corresponding to the selected sectors of each adjacent track and subtracts the estimated ITI of each adjacent track from the data for the sectors of the desired track, providing updated sector data. The ITI cancelled data is replayed to the decoder, Which decodes the ITT cancelled data and provides the decoded ITI cancelled data as output of the read channel. | 01-15-2015 |
20150029608 | Array-Reader Based Magnetic Recording Systems With Frequency Division Multiplexing - A magnetic recording system includes an array of analog inputs operable to receive analog signals retrieved from a magnetic storage medium, a modulator operable to combine the analog signals to yield a frequency division multiplexed signal, a demodulator operable to yield a plurality of demodulated signals from the frequency division multiplexed signal corresponding to each channel of the array, and a joint equalizer operable to filter the plurality of demodulated signals to yield an equalized output. | 01-29-2015 |
20150062730 | Array-Reader Based Magnetic Recording Systems With Quadrature Amplitude Modulation - A magnetic recording system includes an array of analog inputs operable to receive analog signals retrieved from a magnetic storage medium, a quadrature amplitude modulator operable to combine the analog signals to yield a quadrature amplitude modulated signal, a quadrature amplitude demodulator operable to yield a plurality of demodulated signals from the quadrature amplitude modulated signal corresponding to each channel of the array, and a joint equalizer operable to filter the plurality of demodulated signals to yield an equalized output. | 03-05-2015 |
20150070796 | Array-Reader Based Magnetic Recording Systems With Mixed Synchronization - A magnetic recording system includes an array of analog inputs operable to receive an array of analog signals retrieved from a magnetic storage medium, where one of the array of analog signals corresponds with a reference channel, a timing recovery circuit operable to generate a clock signal based on the analog signal for the reference channel, a number of analog to digital converters each operable to sample one of the array of analog signals based on the clock signal to yield a number of digital channels, and a joint equalizer operable to filter the digital channels to yield an equalized output. | 03-12-2015 |