Patent application number | Description | Published |
20100167681 | INTERFERENCE-ROBUST RECEIVER FOR A WIRELESS COMMUNICATION SYSTEM - An interference-robust receiver includes an RF signal processor, a frequency conversion interface and an analog signal processor. The RF signal processor provides an RF signal. The frequency conversion interface includes a passive mixer for generating an intermediate frequency signal by down-converting an in-band part of the RF signal to a passband of a filter and down-converting an out-of-band part of the RF signal to a stopband of the filter. The filter can thus filter the intermediate frequency signal with the passband and the stopband. | 07-01-2010 |
20100279641 | RECEIVER FOR WIRELESS COMMUNICATION SYSTEM - One exemplary receiver for a wireless communication system includes a plurality of signal processing components arranged to generate a receiver output according to a radio frequency (RF) signal. The signal processing components include amplifiers having a class-AB biased amplifier included therein. The signal processing components are disposed in a chip, and the class-AB biased amplifier is an amplifier which processes a signal corresponding to the RF signal before any other amplifier included in the chip. Another exemplary receiver for a wireless communication system includes an RF signal processor and a frequency conversion interface. The RF signal processor is to generate an RF signal, and has a class-AB biased amplifier arranged to apply amplification upon the RF signal. The frequency conversion interface is coupled to the RF signal processor, and used for receiving the RF signal generated from the RF signal processor and generating a down-converted result of the RF signal. | 11-04-2010 |
20110287729 | WIRELESS COMMUNICATION RECEIVER HAVING ONE SIGNAL PROCESSING CIRCUIT WHOSE OPERATION MODE IS ADJUSTED BY MONITORING SIGNAL LEVEL OF SPECIFIC SIGNAL OF PRECEDING SIGNAL PROCESSING CIRCUIT AND RELATED WIRELESS COMMUNICATION METHOD - A wireless communication receiver includes a first signal processing circuit, a second signal processing circuit, and a detecting circuit. The first signal processing circuit generates a first processed signal by processing a received radio frequency (RF) signal. The second signal processing circuit is coupled to the first signal processing circuit. The detecting circuit monitors a specific signal of the first signal processing circuit and generates at least a control signal to the second signal processing circuit in response to a signal level of the monitored specific signal. The control signal controls the second signal processing circuit to switch from a first operation mode to a second operation mode. | 11-24-2011 |
20120056767 | SIGNAL PROCESSING APPARATUS WITH SIGMA-DELTA MODULATING BLOCK COLLABORATING WITH NOTCH FILTERING BLOCK AND RELATED SIGNAL PROCESSING METHOD THEREOF - One signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is arranged to perform a notch filtering operation upon the signal output for generating a filtered signal output. Another signal processing apparatus includes a sigma-delta modulating block and a notch filtering block. The sigma-delta modulating block is arranged to perform a sigma-delta modulation upon a signal input and accordingly generate a signal output. The notch filtering block is enabled for performing a notch filtering operation upon the signal output when the signal processing apparatus operates in a first operational mode, and the notch filtering block is disabled when the signal processing apparatus operates in a second operational mode. | 03-08-2012 |
20120295556 | SIGNAL TRANSCEIVER - A signal transceiver includes a first power amplifier coupled to a chip output port of a chip; an impedance transforming circuit; a switching circuit arranged to selectively couple the chip output port to a first port of the impedance transforming circuit; and a receiving amplifier coupled to a second port of the impedance transforming circuit. | 11-22-2012 |
20130142274 | SLICED TRANSMITTER FRONT-END - An embodiment of the invention provides a sliced transmitter front-end (TX FE). The sliced TX FE includes first TX FE slices and a second TX FE slice that are connected in parallel. As a whole the first TX FE slices contributes a high-gain section to a superimposed gain range of the sliced TX FE. The second TX FE slice has a gain range that constitutes a low-gain section of the superimposed gain range of the sliced TX FE. A minimum gain of the gain range of the second TX FE slice is smaller than a minimum gain of the high-gain section. | 06-06-2013 |
20130187718 | AMPLIFIER CIRCUIT AND METHOD FOR IMPROVING THE DYNAMIC RANGE THEREOF - The invention provides an amplifier circuit. In one embodiment, the amplifier circuit includes a first class-AB amplifier and a second class-AB amplifier. The first class-AB amplifier amplifies an input signal to generate the first output signal. The second class-AB amplifier amplifies the first output signal to generate a final output signal on an output node. When the power of the input signal is greater than a threshold level, the second class-AB amplifier is in a turned-off state during a turned-on duration period of the first class-AB amplifier, and the first class-AB amplifier is in a turned-off state during a turned-on duration period of the second-class AB amplifier. | 07-25-2013 |
20130188755 | RECEIVER - A receiver includes a low noise amplifier (LNA), a passive mixer, a passive filter, a baseband processing block and a voltage controller. The LNA receives and amplifies a radio frequency (RF) signal. The passive mixer is coupled to the LNA without any AC coupling capacitance therebetween, and generates an intermediate frequency signal by down-converting the RF signal. The passive filter filters the intermediate frequency signal. The baseband processing block includes a transimpedance amplifier (TIA) and processes the filtered intermediate frequency signal. The voltage controller keeps a first node and a second node of a signal path to be around a common DC voltage, wherein the first node is located between an output terminal of the LNA and an input terminal of the passive mixer, and the second node is located between an output terminal of the passive mixer and an output terminal of the TIA. | 07-25-2013 |
20140035096 | METHOD FOR CONTROLLING ELECTRICAL PROPERTY OF PASSIVE DEVICE DURING FABRICATION OF INTEGRATED COMPONENT AND RELATED INTEGRATED COMPONENT - A method for controlling an electrical property of a passive device during a fabrication of an integrated component includes providing a substrate, manufacturing the passive device on the substrate, measuring the electrical property of the passive device to obtain a measuring result, determining at least one layout pattern corresponding to at least one later manufacturing process by the measuring result for adjusting the electrical property of the passive device, and continuing the rest of the fabrication including the at least one later manufacturing process of the integrated component. | 02-06-2014 |
20140295774 | WIRELESS TRANSCEIVER AND METHOD OF CONTROLLING THE WIRELESS TRANSCEIVER - A transceiver includes: a first transforming network arranged for using a first input impedance to receive a first modulated signal and using a first output impedance to output a first transformed signal during a transmitting mode of a first communication standard, and for using the first input impedance to receive a second modulated signal and using a second output impedance to output a second transformed signal during the transmitting mode of a second communication standard; a second transforming network arranged for using a second input impedance to receive the second transformed signal and using a third output impedance to output a first RF signal to a connecting port of the transceiver during the transmitting mode of the second communication standard; a power amplifier, arranged to generate a second RF signal; and a switching circuit for selectively coupling the second transformed signal to the second transforming network. | 10-02-2014 |
20140308899 | MULTI-STANDARDS TRANSCEIVER - A multi-standards transceiver includes: a first synthesizer arranged to generate a first oscillating signal; a second synthesizer arranged to generate a second oscillating signal; a first transceiver; a second transceiver; and a multiplexer coupled to the first synthesizer and the second synthesizer; wherein when the multi-standards transceiver operates under a first frequency mode, the first transceiver is arranged to use the first oscillating signal to modulate a first analog signal and the multiplexer is arranged to output the second oscillating signal to the second transceiver so that the second transceiver uses the second oscillating signal to modulate a second analog signal. | 10-16-2014 |
20140335810 | RECEIVER FOR WIRELESS COMMUNICATION SYSTEM - One exemplary receiver for a wireless communication system includes signal processing components arranged to generate a receiver output according to a radio frequency (RF) signal. The signal processing components include amplifiers having a class-AB biased amplifier included therein. The signal processing components are disposed in a chip, and the class-AB biased amplifier is an amplifier which processes a signal corresponding to the RF signal before any other amplifier included in the chip. The class-AB biased amplifier has a first amplifier block, a bias circuit and a second amplifier block. The first amplifier block is arranged to receive an input at the input port and generating a first output. The bias circuit is arranged to bias the first amplifier block for a class-AB operation. The second amplifier block is arranged to generate an output at the output port according to the first output. | 11-13-2014 |