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Gautham

Gautham Chinya, Hillsboro, OR US

Patent application numberDescriptionPublished
20080256330Programming environment for heterogeneous processor resource integration - Compiling a source code program for a heterogeneous multi-core processor having a first instruction sequencer, having a first instruction set architecture, an accelerator to the first instruction sequencer, wherein the accelerator comprises a heterogeneous resource with respect to the first instruction sequencer having a second instruction set architecture, the source code program having specified therein a region of source code for the first instruction set architecture of the processor and a region of source code for the second instruction set architecture of the processor.10-16-2008
20100042765Dynamically Migrating Channels - In one embodiment, the present invention includes a method of determining a relative priority between a first agent and a second agent, and assigning the first agent to a first channel and the second agent to a second channel according to the relative priority. Depending on the currently programmed status of the channels, information stored in at least one of the channels may be dynamically migrated to another channel based on the assignments. Other embodiments are described and claimed.02-18-2010
20110258632Dynamically Migrating Channels - In one embodiment, the present invention includes a method of determining a relative priority between a first agent and a second agent, and assigning the first agent to a first channel and the second agent to a second channel according to the relative priority. Depending on the currently programmed status of the channels, information stored in at least one of the channels may be dynamically migrated to another channel based on the assignments. Other embodiments are described and claimed.10-20-2011
20110314480Apparatus, System, And Method For Persistent User-Level Thread - Embodiments of the invention provide a method of creating, based on an operating-system-scheduled thread running on an operating-system-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an operating-system-sequestered sequencer independently of context switch activities on the operating-system-scheduled thread. The operating-system-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional operating-system-visible sequencer to provide operating system services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof.12-22-2011

Patent applications by Gautham Chinya, Hillsboro, OR US

Gautham Krishnaiah, Ellicott City, MD US

Patent application numberDescriptionPublished
20110101554Compression Processes for Graphene Sheets - Processes for preparing or handling graphene sheets wherein low bulk density graphene sheets are compressed. The graphene sheets may be produced by a thermal treatment such as exfoliation of precursor or reduction or annealing of previously existing graphene sheets and conveyed in a closed system to a compression apparatus.05-05-2011

Gautham Pamu, Round Rock, TX US

Patent application numberDescriptionPublished
20080301504Method and Apparatus to Anticipate Memory Exhaustion in an Open Services Gateway Initiative Environment - A computer implemented method, computer program product, and data processing system for predicting a future status of a memory leak. A first set of data including memory consumption data is received at a software bundle. The software bundle is operating in an open services gateway initiative environment. Responsive to a determination that a memory leak exists, the first set of data is analyzed to predict a future status of the memory leak. The future status is stored, as stored data, in a storage device.12-04-2008
20090070685METHOD AND SYSTEM FOR RAPID ACCESS TO FREQUENTLY USED OR SEARCHED OBJECTS - A method and system to rapidly access frequently used objects and/or items is provided. More particularly, the method and system is designed to rapidly access frequently used or search objects and/or items using a placeholders (e.g., Memory Indicators) in a graphical user interface a method of retrieving items is provided. The method includes detecting one or more selected items from a list of items; creating placeholders representing each of the selected one or more items in a graphical user interface; and continuously updating the placeholders in the graphical user interface upon detecting of newly selected items in the list of items. The placeholders are configured to eliminate subsequent searches for the one or more items in the list.03-12-2009
20090132704Federated Transaction Path and Service Level Agreement Monitoring Across Service Oriented Application Partner Domains - Computer implemented method, system and computer usable program code for monitoring a transaction that crosses an enterprise boundary in a composite application. A computer implemented method for monitoring a transaction that crosses an enterprise boundary in a composite application includes a provider enterprise of the transaction receiving a request to provide monitoring data regarding the transaction to a requester enterprise of the transaction. The received request includes a correlation token identifying the monitoring data to be provided and the requester enterprise as being authorized to receive the monitoring data. The transaction monitoring data is then provided to the requester enterprise. The provided transaction monitoring data may be analyzed by the requester enterprise to provide analysis results regarding transaction delivery performance.05-21-2009
20100030599METHOD AND APPARATUS FOR INTEGRATING HEALTH CARE PAYERS AND PROVIDER SYSTEMS WITH HEALTH CARE TRANSACTION SYSTEMS USING A SINGLE HIPAA EDI RESPONSE GENERATION COMPONENT - A method, system, and computer program product for integrating Health Care Payers and Providers with a health care transaction system. The health care transaction (HCT) utility solves the problem of integration between these two parties by providing the developer with an application that is capable of automatically generating an Electronic Data Interchange (EDI) response message to a request. The HCT utility mainly consists of a servlet (associated with the Hypertext Transfer Protocol (HTTP) or other data communication protocol) that forwards an EDI request from a sending party to applications that may act as either a payer or provider. These applications may automatically process and respond to request EDI messages sent from other applications using an EDI processor application. The HCT utility provides the advantage of providing an infrastructure for testing healthcare transactions. Furthermore, the infrastructure enables testing of a variety of transactions from multiple sources. Additionally, clearinghouse testing may now be automated.02-04-2010
20100250605Method and Apparatus for Social Trust Networks on Messaging Platforms - A social trust network is implemented in combination with a communication network capable of monitoring one or more parameters of communications. The social trust network includes a database containing trust data and possibly profiles of respective entities can be searched to return identities of entities such as subject matter experts with whom a user such as a decision-maker may wish to communicate; which communication may be facilitated by communication contact information corresponding to entities returned by the search. A plurality of trust metrics are computed from the trust data and search results are ordered based on a weighted sum of trust metrics, possibly including ratings of entities, where the relative weights may be manipulated at the will of the user. The monitored parameters of such communications are represented in data stored as trust data in a database which is thus adaptively developed through use of the social trust network.09-30-2010

Patent applications by Gautham Pamu, Round Rock, TX US

Gautham Thambidorai, Sunnyvale, CA US

Patent application numberDescriptionPublished
20120023073Efficient Indexing of Documents with Similar Content - A set of documents may be stored and indexed as a compressed sequence of tokens. A set of documents are grouped into clusters. Sequences of tokens representing the clusters of documents are encoded to elide some repeating instances of tokens. A compressed sequence of tokens is generated from the compressed cluster sequences of tokens. Queries on the compressed sequence are performed by identifying cluster sequences within the compressed sequence that are likely to have documents that satisfy the query and then identifying, within these identified clusters, the documents that actually satisfies the query.01-26-2012

Gautham Varadamsetty, Zurich CH

Patent application numberDescriptionPublished
20110224100DESIGNED ARMADILLO REPEAT PROTEINS - The invention relates to collections of target-specific designed binding proteins based on armadillo repeat proteins, and to a method of generating them. Designed armadillo repeat proteins are based on consensus sequences of single armadillo repeat units. These repeat proteins can be used as scaffolds for peptide recognition. Such a scaffold provides a binding mode that is in principle the same for every small recognizable unit, e.g. an amino acid or dipeptide, allowing a precise and modular recognition of a peptide in extended conformation. The method allows to generate a series of modules recognizing these simple units, and to combine such building blocks to create a binding site for any desired peptide target without performing additional selections.09-15-2011

Gautham Viswanadam, Singapore SG

Patent application numberDescriptionPublished
20100144093Integrated Circuit Device and Method of Manufacturing Thereof - A method of manufacturing an integrated circuit (IC) device is disclosed. A wafer including multiple dies is processed to form solder bumps at the bond pad locations. A conductive substrate is patterned for routing traces and connection pads and partially etched. Routers are formed to electrically route a connection pad to the interior of its corresponding routing terminals. The etched connection pads corresponds to the plurality of bond pad locations of the IC chip. The bumped IC chip is aligned and attached to the conductive substrate through the connection pads and solder bumps. The attached IC chip and the first side of the conductive substrate are then encapsulated. Un-processed conductive material is then removed from a second side of the substrate, opposite the first side, to expose the routers and routing terminals. Contacts are formed on the second side of the substrate that electrically connect with the routers in the interior of the connection pads to thereby electrically connect with the connection terminals on the first side of the IC chip. The packaged IC are then separated along the separation lines to produce individualized dies. An IC device including a separated die is also disclosed.06-10-2010
20110065215WAFER LEVEL INTEGRATION MODULE WITH INTERCONNECTS - A method and apparatus for manufacturing an integrated circuit (IC) device (03-17-2011
20110278569WAFER LEVEL INTEGRATION MODULE WITH INTERCONNECTS - A wafer level integration module and method for forming are disclosed. A construction includes semiconductor functional device fabrication carried out after interconnect structures are processed on a bare wafer. Interconnect structures are formed in a first side of the wafer. An insulation layer is deposited on the first side of the wafer to insulate walls of the interconnect structures. A conductive layer is deposited on the insulation layer filling the interconnect structures so as to contact the insulation layer on the walls of the interconnect structures. The conductive layer forms interconnection contacts on the first side of the wafer and interconnection vias extending into the wafer. The first conductive layer including the interconnection contacts is exposed on the first side of the wafer and a semiconductor functional device is formed on the first side of the wafer. The semiconductor functional device is interconnected with the interconnection contacts during the fabricating. At least portions of the conductive layer associated with the interconnection vias are exposed from the second side of the wafer.11-17-2011
20110318852WAFER LEVEL INTEGRATION MODULE HAVING CONTROLLED RESISTIVITY INTERCONNECTS - A wafer level integration module and method for fabricating are disclosed according to a construction whereby semiconductor functional device fabrication is carried out only after interconnect structures are processed on a bare wafer. The fabrication and processing include forming interconnect structures in a first side of a wafer. An insulation layer is deposited on the first side of the wafer. A conductive layer is deposited on the insulation layer so as to fill the interconnect structures and contact the insulation layer on the walls thereof. The conductive layer on the interconnect structures forms interconnection contacts on the first side of the wafer and interconnection vias extending into the wafer. The conductive layer including the interconnection contacts is exposed on the first side of the wafer. A semiconductor functional device is fabricated on the first side of the wafer and interconnected with the interconnection contacts during the fabricating. Portions of the first conductive layer associated with the interconnection vias are exposed from the second side of the wafer. A portion of the first conductive layer can be selectively removed to form interconnection via redistribution connection structures that can be filled with a low resistivity material to form low resistivity redistribution interconnect with the semiconductor functional device through the first conductive layer.12-29-2011