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Gani

Adiwinata Gani, Jakarta ID

Patent application numberDescriptionPublished
20110160555Universal Models for Predicting Glucose Concentration in Humans - An embodiment of the invention provides a system for predicting future glucose levels in an individual including a glucose measuring device for generating glucose signals representing glucose levels obtained from the individual at fixed time intervals and an analyzer. The analyzer uses a glucose prediction function that is portable between individuals irrespective of health of the individuals. The glucose prediction function includes model coefficients that are invariant between the individuals. The glucose prediction function outputs the future glucose levels by weighing the previous glucose signals obtained from the individual by the model coefficients.06-30-2011

Arnon Gani, Rehovot IL

Patent application numberDescriptionPublished
20100085405DEGASSING INK IN DIGITAL PRINTERS - A method of degassing ink in a printer having an ink storage tank containing a body of ink having an ink surface is described. The method comprises causing the body of ink to move in the storage tank, so as to increase the surface area of the ink surface in comparison with a flat ink surface that an equivalent stationary body of ink would have in the storage tank, and extracting gas from the ink body.04-08-2010

Arnon Gani, Yavne IL

Patent application numberDescriptionPublished
20080259110Method of Printing on Large Format Flexible Substrate and Printing Apparatus - Disclosed is a method of multi pass inkjet printing on wide format flexible substrates where errors in flexible substrate positions are corrected by adapting the geometry and position of the next printed swath to the geometry of the adjacent earlier printed image swath.10-23-2008

Aslam Gani, Sharjah AE

Patent application numberDescriptionPublished
20110137750INTERNET CURRENCY AND A SYSTEM AND METHOD FOR ONLINE INTERNET CURRENCY TRANSACTIONS - The various embodiments herein provide a system and a method for online internet currency transactions. The system and method includes a Central Internet Bank (CIB) created at World Wide Web (WWW) level. A network is provided in electronic communication with the CIB. A plurality of account holding entities are registered with the CIB. A plurality of online service providers is associated with each account holding entity. An Internet Credit Rating Agency (ICRA) is associated with the account holding entities. The CIB issues and holds Binary Credit Bits (BCB) of the account holding entities and authenticates online transactions between at least two account holding entities in real time and authenticates online transactions between at least one account holding entity and at least one online service provider in real time.06-09-2011

David Gani, Singapore SG

Patent application numberDescriptionPublished
20110261550USE OF CONDUCTIVE PAINT AS A METHOD OF ELECTROMAGNETIC INTERFERENCE SHIELDING ON SEMICONDUCTOR DEVICES - A conductive paint electromagnetic interference (EMI) shield for an electronic module or device. The conductive paint is composed of metal particles suspended in a fluidic carrier. In one embodiment, the conductive paint is sprayed onto exterior surfaces of an electronic module or device from a spray gun. The sprayed conductive paint is cured to remove the fluidic carrier, leaving a metal film coated to the outside of the module or device. In one embodiment used with electronic packages in array form, grooves are cut into an encapsulation material of a module so that the shield protection includes sidewalls of the package. In another embodiment used with camera modules, masking is used to selectively shield portions of the module. In a further embodiment, the shield is electrically connected to a ground conductor of a circuit of the electronic module.10-27-2011

Matthew Joseph Gani, Seattle, WA US

Patent application numberDescriptionPublished
20110295335DEVICE AND IMPLANTATION SYSTEM FOR ELECTRICAL STIMULATION OF BIOLOGICAL SYSTEMS - The present specification discloses devices and methodologies for the treatment of nocturnal GERD. Individuals with nocturnal GERD may be treated by implanting a stimulation device within the patient's lower esophageal sphincter and applying electrical stimulation to the patient's lower esophageal sphincter, in accordance with certain predefined protocols. The presently disclosed devices have a simplified design because they do not require sensing systems capable of sensing when a person is engaged in a wet swallow and have improved energy storage requirements.12-01-2011
20110295336DEVICE AND IMPLANTATION SYSTEM FOR ELECTRICAL STIMULATION OF BIOLOGICAL SYSTEMS - The present specification discloses devices and methodologies for the treatment of diurnal GERD. Individuals with GERD may be treated by implanting a stimulation device within the patient's lower esophageal sphincter and applying electrical stimulation to the patient's lower esophageal sphincter, in accordance with certain predefined protocols. The presently disclosed devices have a simplified design because they do not require sensing systems capable of sensing when a person is engaged in a wet swallow and have improved energy storage requirements.12-01-2011

Mohamed M. Gani, Bedford GB

Patent application numberDescriptionPublished
20080248494Test Methods and Devices - A method and test device for differentiating between states of an analyte that can exist in different forms, such as follicle stimulating hormone (FSH). The method or test device uses two contemporaneous assays, the first of which does not differentiate between the two analyte states and the second of which does, and the assay results are compared. A novel pair of anti-FSH monoclonal antibodies that can be used together in a sandwich-format assay to differentiate pre-menopausal and post-menopausal FSH samples is disclosed.10-09-2008

Mohamed Mutwahar Gani, Bedford GB

Patent application numberDescriptionPublished
20090181852Assays - Assays can determine multiple analytes in a sample, such as a biological marker and a drug-related compound.07-16-2009

Nicolas Gani, San Jose, CA US

Patent application numberDescriptionPublished
20080286978ETCHING AND PASSIVATING FOR HIGH ASPECT RATIO FEATURES - An etch method includes etching a masked substrate to form a recess with a first sidewall in the substrate. A thin surface layer of the substrate on the first sidewall is then converted into a passivation layer. The masked substrate is etched again to deepen the recess in the substrate. A surface layer of the substrate on the second sidewall of the recess is then converted into a passivation layer. In one embodiment, upon removal of the passivation layers from both sidewalls, the first and second sidewalls of the high aspect ratio recess are aligned to within 10 Å of each other to provide a high aspect ratio recess having a vertical profile.11-20-2008
20090017633ALTERNATIVE METHOD FOR ADVANCED CMOS LOGIC GATE ETCH APPLICATIONS - Methods for etching, such as for fabricating a CMOS logic gate are provided herein. In some embodiments, a method of etching includes (a) providing a substrate having a first stack and a second stack disposed thereupon, the first stack comprising a high-k dielectric layer, a metal layer formed over the high-k dielectric layer, and a first polysilicon layer formed over the metal layer, the second stack comprising a second polysilicon layer, wherein the first and second stacks are substantially equal in thickness; (b) simultaneously etching a first feature in the first polysilicon layer and a second feature in the second polysilicon layer until the metal layer in the first stack is exposed; (c) simultaneously etching the metal layer and second polysilicon layer to extend the respective first and second features into the first and second stacks; and (d) etching the high-k dielectric layer.01-15-2009
20090170333SHALLOW TRENCH ISOLATION ETCH PROCESS - Methods for fabricating one or more shallow trench isolation (STI) structures are provided herein. In some embodiments, a method for fabricating one or more shallow trench isolation (STI) structures may include providing a substrate having a patterned mask layer disposed thereon to define one or more STI structures. The substrate may be etched using a plasma formed from a process gas mixture to form one or more STI structures on the substrate, wherein the process gas mixture comprises a fluorine-containing gas and either a fluorocarbon-containing gas or a hydrofluorocarbon-containing gas.07-02-2009
20090221149MULTIPLE PORT GAS INJECTION SYSTEM UTILIZED IN A SEMICONDUCTOR PROCESSING SYSTEM - An apparatus having a multiple gas injection port system for providing a high uniform etching rate across the substrate is provided. In one embodiment, the apparatus includes a nozzle in the semiconductor processing apparatus having a hollow cylindrical body having a first outer diameter defining a hollow cylindrical sleeve and a second outer diameter defining a tip, a longitudinal passage formed longitudinally through the body of the hollow cylindrical sleeve and at least partially extending to the tip, and a lateral passage formed in the tip coupled to the longitudinal passage, the lateral passage extending outward from the longitudinal passage having an opening formed on an outer surface of the tip.09-03-2009
20090221150ETCH RATE AND CRITICAL DIMENSION UNIFORMITY BY SELECTION OF FOCUS RING MATERIAL - A method and apparatus are provided for plasma etching a substrate in a processing chamber. A focus ring assembly circumscribes a substrate support, providing uniform processing conditions near the edge of the substrate. The focus ring assembly comprises two rings, a first ring and a second ring, the first ring comprising quartz, and the second ring comprising monocrystalline silicon, silicon carbide, silicon nitride, silicon oxycarbide, silicon oxynitride, or combinations thereof. The second ring is disposed above the first ring near the edge of the substrate, and creates a uniform electric field and gas composition above the edge of the substrate that results in uniform etching across the substrate surface.09-03-2009
20100210112METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING A LANTHANUM-FAMILY-BASED OXIDE LAYER - Methods for fabricating a semiconductor device having a lanthanum-family-based oxide layer are described. A gate stack having a lanthanum-family-based oxide layer is provided above a substrate. At least a portion of the lanthanum-family-based oxide layer is modified to form a lanthanum-family-based halide portion. The lanthanum-family-based halide portion is removed with a water vapor treatment.08-19-2010

Patent applications by Nicolas Gani, San Jose, CA US

Tanveer Ahmed Gani, Bothell, WA US

Patent application numberDescriptionPublished
20100185669EFFICIENT INCREMENTAL PARSING OF CONTEXT SENSITIVE PROGRAMMING LANGUAGES - Many integrated development environments provide “intelligent feedback” to developers. Current “intelligent feedback” techniques may not work well with source code files comprising context sensitive programming languages because edits to one place in the code may change the meaning of arbitrary other places in the code, thus requiring additional full semantic parses to maintain correctness of the system. As provided herein, context-free “name” parsing may be performed to support entity candidate recursive semantic parsing in determining the meaning of the entity. A name parse may be performed to build and/or update a name table and a range table comprising names of entities and their positions within a source code file. Upon receiving a request to determine the meaning of a selected entity within the source code file, the tables may be queried to determine entity names and locations that are to be semantically parsed to determine a selected entity meaning.07-22-2010