Patent application number | Description | Published |
20080253087 | THERMAL MANAGEMENT SYSTEM FOR AN ELECTRONIC DEVICE - A configurable multiple inlet thermal management device, such as an air-mover or passive heat sink, for electronic devices. The thermal management device is arranged on a computing device or on a component of a computing device or similar, such as an expansion module or alike, so that incoming air flow decreases the temperature of the heat producing components. In order to provide best possible air flow the air-mover comprises blade design that pressurizes the air flow from at least one side of the air-mover component. The air-mover includes removable covers for providing the openings required for intake air from the desired direction and for providing a fan wind. Depending on the application the openings may be permanently opened or closed. The intake air flow is then directed in form of fan wind towards the heat producing elements. | 10-16-2008 |
20090140417 | Holistic Thermal Management System for a Semiconductor Chip - Various semiconductor chip thermal management systems and methods are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a semiconductor chip to a substrate and coupling a diamond heat spreader that has a thermoelectric cooler to the semiconductor chip. A vapor chamber is coupled to the diamond heat spreader. | 06-04-2009 |
20100014251 | Multidimensional Thermal Management Device for an Integrated Circuit Chip - The present invention generally relates to a multidimensional thermal management device for an integrated circuit chip, and more particularly, to thermal management devices with a synthetic jet ejector adapted to operate along a hollow fin and a fin with cross-flow heat exchanger tubes. A thermal management device | 01-21-2010 |
20100030500 | Regulation of Power Consumption for Application-Specific Integrated Circuits - Provided are systems, methods, and computer program products for regulating power consumption in application-specific integrated circuits (ASICs)—such as, for example, a graphics processing unit. In such a method, a value of a leakage current of an ASIC is received from computer-readable information contained in the ASIC. One or more operational parameters of the ASIC—such as, for example, a supply voltage to the ASIC, a engine speed of the ASIC, and/or a fan speed of a fan used to cool the ASIC—are adjusted based on the value of the leakage current of the ASIC. Optionally, the one or more operational parameters may also be adjusted based on a type of application running on the ASIC. In addition, a supply voltage to the ASIC may (optionally) be shut off if the temperature of the ASIC exceeds a threshold. | 02-04-2010 |
20100103619 | Interchangeable Heat Exchanger for a Circuit Board - Various circuit board fluid cooling systems and methods of using the same are disclosed. In one aspect, a method of manufacturing is provided that includes coupling a first member to a circuit board where the first member has a first opening with a first internal footprint. A heat exchanger is removably coupled to the first member to transfer heat from at least one component of the circuit board. The heat exchanger has an external footprint adapted so that at least a portion of the heat exchanger fits in the first opening. A plate is coupled to the circuit board to transfer heat from at least one component of the circuit board. A fluid supply line and a fluid return line are coupled to the heat exchanger such that one of the fluid supply line and the fluid return line is thermal contact with the plate to transfer heat therefrom. | 04-29-2010 |
20100230805 | MULTI-DIE SEMICONDUCTOR PACKAGE WITH HEAT SPREADER - A semiconductor device includes first and second stacked semiconductor dies on a substrate. A lid having a plurality of fins extending downwardly into the cavity is mounted on the substrate to encapsulate the semiconductor dies. At least some of the fins are longer than other ones of said fins. The lid is attached to the substrate, with the longer fins extending downwardly above a region of the substrate not occupied by the first die. The shorter fins extend downwardly above a region of said first die not covered by said second die. A thermal interface material fills the remainder of the cavity and is in thermal communication with both dies, the substrate and the fins. The lid may be molded from metal. The lid may be bonded to the topmost die, using a thermal bonding material that may be liquid metal, or the like. | 09-16-2010 |
20100237496 | Thermal Interface Material with Support Structure - Various semiconductor chip thermal interface material methods and apparatus are disclosed. In one aspect, a method of establishing thermal contact between a first semiconductor chip and a heat spreader is provided. The method includes placing a thermal interface material layer containing a support structure on the first semiconductor chip. The heat spreader is positioned proximate the thermal interface material layer. The thermal interface material layer is reflowed to establish thermal contact with both the first semiconductor chip and the heat spreader. | 09-23-2010 |
20100314093 | VARIABLE HEAT EXCHANGER - Various apparatus and methods for thermally managing a heat generating device. In one aspect, a method of thermally managing a heat generating device is provided that includes placing a heat exchanger in thermal communication with the heat generating device. The heat exchanger has an interior space. A membrane is in the interior space between a first chamber and a second chamber. The membrane has a gas impermeable portion and at least one gas permeable portion to enable vapor bubbles in the second chamber to pass through the membrane at the at least one gas permeable portion and into the first chamber. A liquid is moved through the second chamber. | 12-16-2010 |
20100327431 | Semiconductor Chip Thermal Interface Structures - Various thermal interface structures and methods are disclosed. In one aspect, a method of manufacturing is provided. The method includes providing plural carbon nanotubes in a thermal interface structure. The thermal interface structure is soldered to a side of a semiconductor chip. In another aspect, an apparatus is provided. The apparatus includes a thermal interface structure that has plural carbon nanotubes. A semiconductor chip is soldered to the thermal interface structure. | 12-30-2010 |
20100328887 | Heat Sink for a Circuit Device - Various heat sinks, method of use and manufacture thereof are disclosed. In one aspect, a method of providing thermal management for a circuit device is provided. The method includes placing a heat sink in thermal contact with the circuit device wherein the heat sink includes a base member in thermal contact with the circuit device, a first shell coupled to the base member that includes a first inclined internal surface, a lower end and first plurality of orifices at the lower end to enable a fluid to transit the first shell, and at least one additional shell coupled to the base member and nested within the first shell. The at least one additional shell includes a second inclined internal surface and a second plurality of orifices to enable the fluid to transit the at least one additional shell. The fluid is moved through the first shell and the at least one additional shell. | 12-30-2010 |
20110245981 | COMPUTING CENTER POWER AND COOLING CONTROL APPARATUS AND METHOD - Various computing center control and cooling apparatus and methods are disclosed. In one aspect, a method of controlling plural processors of a computing system is provided. The method includes monitoring activity levels of the plural processors over a time interval to determine plural activity level scores. The plural activity level scores are compared with predetermined processor activity level scores corresponding to preselected processor operating modes to determine a recommended operating mode for each of the plural processors. Each of the plural processors is instructed to operate in one of the recommended operating modes. | 10-06-2011 |
20120043539 | SEMICONDUCTOR CHIP WITH THERMAL INTERFACE TAPE - A method of manufacturing is provided that includes applying a thermal interface tape to a side of a semiconductor wafer that includes at least one semiconductor chip. The thermal interface material tape is positioned on the at least one semiconductor chip. The at least one semiconductor chip is singulated from the semiconductor wafer with at least a portion of the thermal interface tape still attached to the semiconductor chip. | 02-23-2012 |
20120043668 | STACKED SEMICONDUCTOR CHIPS WITH THERMAL MANAGEMENT - A method of assembling a semiconductor chip device is provided that includes placing an interposer on a first semiconductor chip. The interposer includes a first surface seated on the first semiconductor chip and a second surface adapted to thermally contact a heat spreader. The second surface includes a first aperture. A second semiconductor chip is placed in the first aperture. | 02-23-2012 |
20120043669 | STACKED SEMICONDUCTOR CHIP DEVICE WITH THERMAL MANAGEMENT CIRCUIT BOARD - A method of assembling a semiconductor chip device is provided that includes providing a circuit board including a surface with an aperture. A portion of a first heat spreader is positioned in the aperture. A stack is positioned on the first heat spreader. The stack includes a first semiconductor chip positioned on the first heat spreader and a substrate that has a first side coupled to the first semiconductor chip. | 02-23-2012 |
20120061821 | SEMICONDUCTOR CHIP WITH REDUNDANT THRU-SILICON-VIAS - A semiconductor chip with conductive vias and a method of manufacturing the same are disclosed. The method includes forming a first plurality of conductive vias in a layer of a first semiconductor chip. The first plurality of conductive vias includes first ends and second ends. A first conductor pad is formed in ohmic contact with the first ends of the first plurality of conductive vias. | 03-15-2012 |
20120061852 | SEMICONDUCTOR CHIP DEVICE WITH POLYMERIC FILLER TRENCH - A method of manufacturing is provided that includes providing a semiconductor chip with an insulating layer. The insulating layer includes a trench. A second semiconductor chip is stacked on the first semiconductor chip to leave a gap. A polymeric filler is placed in the gap wherein a portion of the polymeric filler is drawn into the trench. | 03-15-2012 |
20120074579 | SEMICONDUCTOR CHIP WITH REINFORCING THROUGH-SILICON-VIAS - A method of manufacturing includes connecting a first end of a first through-silicon-via to a first die seal proximate a first side of a first semiconductor chip. A second end of the first thu-silicon-via is connected to a second die seal proximate a second side of the first semiconductor chip opposite the first side. | 03-29-2012 |
20120075807 | STACKED SEMICONDUCTOR CHIP DEVICE WITH THERMAL MANAGEMENT - A method of manufacturing is provided that includes placing a thermal management device in thermal contact with a first semiconductor chip of a semiconductor chip device. The semiconductor chip device includes a first substrate coupled to the first semiconductor chip. The first substrate has a first aperture. At least one of the first semiconductor chip and the thermal management device is at least partially positioned in the first aperture. | 03-29-2012 |
20120098119 | SEMICONDUCTOR CHIP DEVICE WITH LIQUID THERMAL INTERFACE MATERIAL - A method of manufacturing is provided that includes providing a semiconductor chip device that has a circuit board and a first semiconductor chip coupled thereto. A lid is placed on the circuit board. The lid includes an opening and an internal cavity. A liquid thermal interface material is placed in the internal cavity for thermal contact with the first semiconductor chip and the circuit board. | 04-26-2012 |
20120205791 | SEMICONDUCTOR CHIP WITH REINFORCING THROUGH-SILICON-VIAS - A method of manufacturing includes connecting a first end of a first through-silicon-via to a first die seal proximate a first side of a first semiconductor chip. A second end of the first thu-silicon-via is connected to a second die seal proximate a second side of the first semiconductor chip opposite the first side. | 08-16-2012 |
20120278029 | Transient Thermal Modeling of Multisource Power Devices - Embodiments of systems and methods for improved measurement of transient thermal responses in electronic systems are described herein. Embodiments of the disclosure use the known thermal transfer function of an electronic system to generate an equivalent resistor-capacitor (RC) network having a dynamic response that is identical to a given power excitation as the actual electronic system would have to that power excitation. Using the analogy between thermal and electrical systems, a Foster RC network is constructed, comprising a plurality of RC stages in which resistors and capacitors are connected in parallel. Subsequently, the analog thermal RC network is converted into an infinite impulse response (IIR) digital filter, whose coefficients can be obtained the Z-transform of the analog thermal RC network. This IIR digital filter establishes the recursive relationship between temperature output at the current time step and measured power input at the previous time step. Using this IIR digital filter, temperature response subject to arbitrary time-dependent power can be calculated in very small amount of time compared with prior art methods. | 11-01-2012 |
20130141866 | PORTABLE COMPUTING DEVICE WITH THERMAL MANAGEMENT - Various computing devices and methods of thermally managing the same are disclosed. In one aspect, a method of thermally managing a computing device is provided where the computing device includes a housing that has a wall adapted to contact a body part of a user, a circuit board in the housing, and a semiconductor chip coupled to the circuit board. The method includes placing a first heat spreader in thermal contact with the semiconductor chip and the circuit board but separated from the wall by a gap. | 06-06-2013 |
20130147028 | HEAT SPREADER FOR MULTIPLE CHIP SYSTEMS - Various heat spreaders and methods of making and using the same are disclosed. In one aspect, a method of manufacturing is provided that includes forming a heat spreader that has a surface adapted to establish thermal contact with a first semiconductor chip and a second semiconductor chip on a substrate. The surface includes a first portion adapted to thermally contact a solder-based thermal interface material and a second portion having an opening adapted to hold an organic thermal interface material. | 06-13-2013 |
20130161814 | SEMICONDUCTOR CHIP WITH OFFSET PADS - A semiconductor chip device includes a first semiconductor chip adapted to be stacked with a second semiconductor chip wherein the second semiconductor chip includes a side and first and second conductor structures projecting from the side. The first semiconductor chip includes a first edge, a first conductor pad, a first conductor pillar positioned on but laterally offset from the first conductor pad toward the first edge and that has a first lateral dimension and is adapted to couple to one of the first and second conductor structures, a second conductor pad positioned nearer the first edge than the first conductor pad, and a second conductor pillar positioned on but laterally offset from the second conductor pad and that has a second lateral dimension larger than the first lateral dimension and is adapted to couple to the other of the first and second conductor structures. | 06-27-2013 |
20140103506 | SEMICONDUCTOR CHIP DEVICE WITH POLYMERIC FILLER TRENCH - A method of manufacturing is provided that includes providing a semiconductor chip with an insulating layer. The insulating layer includes a trench. A second semiconductor chip is stacked on the first semiconductor chip to leave a gap. A polymeric filler is placed in the gap wherein a portion of the polymeric filler is drawn into the trench. | 04-17-2014 |