Patent application number | Description | Published |
20090302405 | METHOD FOR FORMING SLOT VIA BITLINE FOR MRAM DEVICES - A magnetic random access memory (MRAM) device includes a magnetic tunnel junction (MTJ) stack formed over a lower wiring level, a hardmask formed on the MTJ stack, and an upper wiring level formed over the hardmask. The upper wiring level includes a slot via bitline formed therein, the slot via bitline in contact with the hardmask and in contact with an etch stop layer partially surrounding sidewalls of the hardmask. | 12-10-2009 |
20110104827 | Template-Registered DiBlock Copolymer Mask for MRAM Device Formation - A method for fabricating a magnetoresistive random access memory (MRAM) includes forming a mask over a magnetic layer; forming a template on the mask; applying a diblock copolymer to the template; curing the diblock copolymer to form a first plurality of uniform shapes registered to the template; etching the mask to form a second plurality of uniform shapes; and etching the magnetic layer to form a third plurality of uniform shapes, the third plurality of uniform shapes comprising a plurality of magnetic tunnel junctions (MTJs). A diblock copolymer mask for fabricating a magnetoresistive random access memory (MRAM) includes a magnetic layer; a mask formed on the magnetic layer; a template formed on the mask; and a diblock copolymer mask comprising a plurality of uniform shapes formed on and registered to the template. | 05-05-2011 |
20110163455 | Tunnel Junction Via - A method for forming a tunnel junction (TJ) circuit, the method includes forming a bottom wiring layer; forming a plurality of TJs contacting the bottom wiring layer; forming a plurality of tunnel junction vias (TJVs) simultaneously with the formation of the plurality of TJs, the TJVs contacting the bottom wiring layer; and forming a top wiring layer contacting the plurality of TJs and the plurality of TJVs. A circuit comprising a plurality of tunnel junctions (TJs) includes a bottom wiring layer contacting the plurality of TJs, the bottom wiring layer further contacting a plurality of tunnel junction vias (TJVs), wherein the plurality of TJs and the plurality of TJVs comprise the same material; and a top wiring layer contacting the plurality of TJs and the plurality of TJVs. | 07-07-2011 |
20110194341 | SPIN-TORQUE BASED MEMORY DEVICE WITH READ AND WRITE CURRENT PATHS MODULATED WITH A NON-LINEAR SHUNT RESISTOR - A spin-torque based memory device includes a write portion including a fixed ferromagnetic spin-polarizing layer, a spin-transport layer having a spin accumulation region formed above the fixed ferromagnetic spin-polarizing layer. The memory device further includes a read portion in electrical contact with the spin-transport layer. The read portion includes a free layer magnet, a read non-magnetic layer, and a reference layer. The memory device further includes a metal contact region formed overlying the read portion and a nonlinear resistor formed between an upper surface of the spin transport layer and the metal contact region and modulating write and read current paths depending on an applied voltage, thereby creating different current paths for write and read processes. | 08-11-2011 |
20120133050 | TUNNEL JUNCTION VIA - A memory device comprising a plurality of tunnel junctions (TJs) includes a bottom wiring layer; a top wiring layer; a plurality of TJs contacting the bottom wiring layer and the top wiring layer; and a plurality of tunnel junction vias (TJVs) contacting the bottom wiring layer and the top wiring layer, wherein the plurality of TJVs each have a lower resistance the each of the plurality of TJs, wherein the plurality of TJVs comprise at least one concave surface, and wherein the at least one concave surface of the plurality of TJVs is configured to trap etched material during formation of the TJVs so as to reduce the resistance of the plurality of TJVs. | 05-31-2012 |
20120141748 | Template-Registered DiBlock Copolymer Mask for MRAM Device Formation - A device comprising a diblock copolymer mask for fabricating a magnetoresistive random access memory (MRAM) includes a magnetic layer; a mask formed on the magnetic layer; a template formed on the mask; and the diblock copolymer mask, the diblock copolymer mask comprising a first plurality of uniform shapes formed on and registered to the template. | 06-07-2012 |
20120288964 | SPIN-TORQUE BASED MEMORY DEVICE WITH READ AND WRITE CURRENT PATHS MODULATED WITH A NON-LINEAR SHUNT RESISTOR - A fabrication method includes forming a spin-polarizing layer, a spin transport layer on the spin polarizing layer on a substrate, a free layer magnet on the spin transport layer, a non-magnetic layer on the spin polarizing layer, a reference layer on the non-magnetic layer, and a hard mask layer on the reference layer, etching the hard mask layer and forming a read portion including the reference layer, the nonmagnetic layer and the free layer magnet, forming a nonlinear resistor layer on surfaces of the spin transport layer, the spacers, and the hard mask layer, etching the nonlinear resistor layer, the spin transport layer, and the spin polarizing layer and forming a write portion including the spin transport layer and the spin polarizing layer, forming an interlevel dielectric layer, forming a trench, exposing an upper surface of the reference layer of the read and write portions. | 11-15-2012 |