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Furuta, Kanagawa
Akihiro Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100279661 | PORTABLE ELECTRONIC DEVICE - A portable electronic device for receiving an incoming call from an external network, includes an incoming call indication unit configured to indicate the incoming call, an illuminance measurement unit configured to measure illuminance of a peripherally of the portable electronic device, an acceleration detection unit configured to detect an acceleration of the portable electronic device, and a status determination unit configured to determine a status of the portable electronic device in accordance with the acceleration detected by the acceleration detection unit and the illuminance measured by the illuminance measurement unit. When the status determination unit determines that the acceleration detected by the acceleration detection unit is greater than a threshold value and a change in the illuminance measured by the illuminance measurement unit is greater than a predetermined value, the status determination unit controls the incoming call indication unit to change an output indicating the incoming call. | 11-04-2010 |
Atsushi Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100264964 | Pll circuit - There is provided a PLL circuit including a first loop filter and a second loop filter, which includes a current signal generation circuit that includes a first output driver that generates a first current signal to be output to the first loop filter and a second output driver that generates a second current signal to be output to the second loop filter, and a control circuit that selects which of the first output driver and the second output driver is to be activated. | 10-21-2010 |
Hiroki Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20110104358 | TASTE-IMPROVING AGENTS AND TEA DRINKS CONTAINING THEREOF - The present invention provides an agent for improving taste of tea drinks, comprising at least one glyceroglycolipid, preferably monogalactosyl diacylglycerol or digalactosyl diacylglycerol, as an active ingredient. The agent of the present invention is for use to enhance kokumi, to mask astringent taste, and to prevent precipitates. The agent of the present invention is effective especially in improving tea drinks containing ground tea leaves. The present invention also provides a method for producing tea drinks containing ground tea leaves and at least 1.0 μg/ml of glyceroglycolipids and having an absorbency of 0.25 or below at 680 nm, and tea drinks containing glyceroglycolipid, which method comprises grinding tea leaves into an average particle size of 1-100 μm (preferably 1-50 μm, more preferably 1-20 μm), and mixing the resulting ground tea leaves with neutral (pH 5-7, preferably 5.5-7, especially preferably 6-7) water to elute the glyceroglycolipids into the water. | 05-05-2011 |
Koichiro Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20090319754 | Reconfigurable device - A reconfigurable device comprises a plurality of processing elements, a main memory unit that stores plural pieces of circuit configuration information, a cache unit that caches circuit configuration information forwarded to at least one of the processing elements from the main memory unit, and a cache control unit that controls forwarding of circuit configuration information from the cache unit to the processing element. The cache control unit selects circuit configuration information which must be forwarded to each processing element. When the selected circuit configuration information is not stored in the cache unit, the cache control unit reads out the circuit configuration information from the main memory unit, stores the read-out circuit configuration information in the cache unit, and sends forward the circuit configuration information to the processing element from the cache unit. | 12-24-2009 |
| 20100083209 | BEHAVIORAL SYNTHESIS APPARATUS, BEHAVIORAL SYNTHESIS METHOD, AND COMPUTER READABLE RECORDING MEDIUM - A behavioral synthesis apparatus includes a acquisition unit, a scheduling unit and a generation unit. The acquisition unit acquires a behavioral level description describing an operation of a semiconductor integrated circuit. The scheduling unit separates the acquired behavioral level description into N stage descriptions, and makes a schedule in such a way that input/output operations and computations among the N stage descriptions are pipelined. The generation unit generates a register transfer level description based on the N stage descriptions and a result of scheduling performed by the scheduling unit in such a way as to form stage circuits respectively corresponding to the N stage descriptions and a state control circuit which controls possible 2N−1 stage control states of the semiconductor integrated circuit. The generation unit generates the register transfer level description in such a way as to inhibit the operation of a stage circuit which need not be operated. | 04-01-2010 |
Manabu Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20110215846 | PHASE LOCKED LOOP CIRCUIT AND CONTROL METHOD THEREOF - A phase locked loop circuit according to the present invention includes a selector that selects an input clock, a 1/m frequency divider that divides a frequency of the input clock, a 1/n frequency divider that divides a frequency of a feedback clock, a phase difference detector, a first voltage controlled oscillator that includes a first voltage holding circuit, a second voltage controlled oscillator that includes a second voltage holding circuit, and a selection circuit that outputs any output of the first and second voltage controlled oscillators as an output clock and outputs any output of the first and second voltage controlled oscillators as a feedback clock. The input clock is switched when the voltage controlled oscillator in a holding mode generates the output clock and the voltage controlled oscillator in a normal mode generates the feedback clock. | 09-08-2011 |
Masanori Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100054034 | READ CIRCUIT AND READ METHOD - In a read circuit, a write circuit writes a data to be stored and/or a test data to the memory cell. A control circuit controls the write circuit to write the test data to the memory cell in a first phase, and to write the test data which is same as the first phase to the memory cell in a second phase. An integrator integrates voltages at one terminal of the memory cell during the first phase to obtain a first integrated voltage, and integrates voltages at one terminal of the memory cell during the second phase to obtain a second integrated voltage. A buffer stores the first integrated voltage. A comparator compares the first integrated voltage from the buffer with the second integrated voltage from the integrator to obtain the data. | 03-04-2010 |
Shingo Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100207801 | A/D CONVERSION CIRCUIT AND A/D CONVERSION METHOD - An A/D (analog-to-digital) conversion circuit includes an input signal selecting circuit configured to output voltage signals of different signal levels in response to control signals in an adjustment mode before A/D conversion of an analog signal in a practical mode; an A/D converter configured to perform A/D conversion on the voltage signals in response to an adjustment sampling clock signal in the adjustment mode to output adjustment conversion values; and a sampling timing adjusting circuit configured to delay a reference sampling clock signal based on a delay value selected in response to a selection signal in the adjustment mode to output the adjustment sampling clock signal to the A/D converter. An operation circuit is configured to set the adjustment mode, output the control signals to the input signal selecting circuit, and the selection signal to the sampling timing adjusting circuit, such that the adjustment conversion values are obtained at each of different delay values, determine an optimal parameter from parameters corresponding to the obtained adjustment conversion values, and set the practical mode to output the selection signal corresponding to the optimal parameter to the sampling timing adjusting circuit. | 08-19-2010 |
Shoji Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20090118433 | PROCESS FOR PRODUCING A POLYFLUOROALKYL (METH)ACRYLATE - A process for producing a polyfluoroalkyl (meth)acrylate, which comprises isolating, from a reaction mixture containing a polyfluoroalkyl (meth)acrylate obtained by reacting a polyfluoroalkyl iodide of the formula C | 05-07-2009 |
Takashi Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20100048249 | Display Holder, Portable Electronic Apparatus, and Assembling Method of Display Holder - A display holder for holding a display device includes a frame portion having a holding wall which covers and holds a peripheral edge of the display device to be held and which is formed with an opening which exposes a display surface, and a claw receiving portion for being locked to a fixed portion; and a back surface holding portion which is formed continuously from at least a portion of the frame portion to hold the back side of the display device. The frame portion and the back surface holding portion are integrally made of an elastic material. | 02-25-2010 |
Takayuki Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20090002069 | VARIABLE CIRCUIT, COMMUNICATION APPARATUS, MOBILE COMMUNICATION APPARATUS AND COMMUNICATION SYSTEM - A variable circuit that has a device that changes the mechanical state thereof and has a characteristic that is changed by a change of the mechanical state of the device, the variable circuit including: a controlling section | 01-01-2009 |
Toshiyuki Furuta, Kanagawa JP
| Patent application number | Description | Published |
|---|---|---|
| 20090190168 | DOCUMENT PROCESSING SYSTEM - A document processing system is disclosed that is capable of processing both fixed-format and unfixed-format hand written paper documents. The document processing system includes an encoding unit that encodes a sheet ID for identifying a hand written first document on a sheet to generate a coded sheet ID; a decoding unit that decodes the coded sheet ID; a document-sheet ID association unit that associates the sheet ID with a document ID assigned to a computerized second document; a printing unit that acquires the sheet ID and prints the coded sheet ID on the first document; a sheet ID management unit that manages the sheet ID; an information acquisition unit that acquires the sheet ID decoded by the decoding unit, and hand-written data from the first document on which the coded sheet ID is printed; and a process-sheet ID association unit that associates the sheet ID with a process ID of a process for processing the hand-written data acquired by the information acquisition unit. | 07-30-2009 |