| Patent application number | Description | Published |
| 20080305215 | LAYERED CEREAL BARS CONTAINING INULIN AND THEIR METHODS OF MANUFACTURE - A layered cereal bar with at least two cereal layers having identifiable RTE cereal pieces and at least one visible filling layer in between the two cereal layers is described. In one embodiment, the cereal bar is a non-cooked cereal bar having a total nutrient level equal to or greater than the nutrient level of a single serving of RTE cereal with milk. In one embodiment, the cereal layer is comprised of a cereal composition containing RTE cereal, high-protein rice pieces and TVP in a ratio of about 2:1:1. The cereal layer further comprises a binder to hold the cereal composition together. In one embodiment, the filling layer is a confectionery center high in milk content, but with a relatively low water activity. In another embodiment, a method for manufacturing a layered cereal bar having a visible filling layer is described. The steps include mixing a binder with a cereal composition having identifiable cereal pieces to form an amorphous mass, compressing the amorphous mass into a first layer and a second layer, applying a filling layer on the first layer, combining the first layer and filling layer with the second layer, and pressing the first layer, filling layer and second layer together to form pressed layers, wherein the pressed layers are cut into individual cereal bars having identifiable cereal pieces. In another embodiment, an apparatus for manufacturing a layered cereal bar is described. The apparatus includes beltless compressing rollers that operate in series to combine a mixture comprising the cereal composition and binder. | 12-11-2008 |
| 20100104693 | HIGH FIBER SHELF STABLE TOASTER PASTRIES AND METHODS OF PREPARATION - Icing coated shelf stable high fiber toaster pastry product or packaged consumer food articles are provided as well as their methods of preparation comprising high levels of a soluble fiber ingredient partitioned between the shell, filling and the icing. The present articles comprise an homogeneous baked chemically leavened soluble fiber fortified pastry dough planar shell forming an interior. The fiber fortified dough includes whole grain wheat flour; salt, chemical leavening, shortening, and ≈1-15% added solid powdered polydextrose and in amounts sufficient to provide a total fiber content of the dough of at least 5%. At least a portion of the chemical leavening is provided by ammonium carbonate and in amounts sufficient to provide the dough with a specific baked volume of 1.5 cc/g or greater. The filling includes a liquid soluble fiber ingredient such as polydextrose. The articles are equivalent to conventional toaster pastries in eating qualities notwithstanding their high levels of total fiber. | 04-29-2010 |
| 20110183045 | CEREAL BARS CONTAINING INULIN AND THEIR METHODS OF MANUFACTURE - A cereal bar comprising identifiable ready-to-eat (RTE) cereal pieces; and a carbohydrate binder combined with the cereal pieces, wherein the carbohydrate binder contains inulin is provided. In one embodiment, the cereal bar comprises added protein. A method of making a cereal bar is also provided. | 07-28-2011 |
| Patent application number | Description | Published |
| 20080259821 | DYNAMIC PACKET TRAINING - A packet control mechanism for a computer data system that dynamically adjusts packet training depending on the utilization load on the processor. The dynamic adjustment of packet training can be to enable and disable packet training, or adjust the number of packets in the packet train. In preferred embodiments, the computer data system includes a processor utilization mechanism that indicates a load on a processor. When the packet control mechanism determines the load on the processor is above a threshold limit, the packet control mechanism reduces the processor load by compressing the packets into the packet train. The compressing of the packets is stopped or reduced when the processor load is below a threshold in order to increase the data throughput on the network interface. | 10-23-2008 |
| 20080259822 | DYNAMIC PACKET TRAINING - A packet control mechanism for a computer data system that dynamically adjusts packet training depending on the utilization load on the processor. The dynamic adjustment of packet training can be to enable and disable packet training, or adjust the number of packets in the packet train. In preferred embodiments, the computer data system includes a processor utilization mechanism that indicates a load on a processor. When the packet control mechanism determines the load on the processor is above a threshold limit, the packet control mechanism reduces the processor load by compressing the packets into the packet train. The compressing of the packets is stopped or reduced when the processor load is below a threshold in order to increase the data throughput on the network interface. | 10-23-2008 |
| 20080263226 | DYNAMIC PACKET TRAINING - A packet control mechanism for a computer data system that dynamically adjusts packet training depending on the utilization load on the processor. The dynamic adjustment of packet training can be to enable and disable packet training, or adjust the number of packets in the packet train. In preferred embodiments, the computer data system includes a processor utilization mechanism that indicates a load on a processor. When the packet control mechanism determines the load on the processor is above a threshold limit, the packet control mechanism reduces the processor load by compressing the packets into the packet train. The compressing of the packets is stopped or reduced when the processor load is below a threshold in order to increase the data throughput on the network interface. | 10-23-2008 |
| 20090138448 | PROCESSING DATABASE QUERIES BY RETURNING RESULTS OF A FIRST QUERY TO SUBSEQUENT QUERIES - Multiple database queries are satisfied with the same data in a manner that assures the data is current and without having to interrogate the database for each query. In a first embodiment, all queries that are received during the processing of a first query after interrogation of the database has begun for the first query are evaluated to determine whether the result set returned for the first query will satisfy the queries received during processing of the first query. If so, the result set returned for the first query is used to generate result sets for the subsequent compatible queries received during the processing of the first query. In a second embodiment, queries are delayed and grouped, and a new query is then processed for each group that returns a result set that satisfies all of the queries in the group. In both cases, the result set for one query is used to generate a result set for a different query. | 05-28-2009 |
| 20100229177 | Reducing Remote Memory Accesses to Shared Data in a Multi-Nodal Computer System - Disclosed is an apparatus, method, and program product for identifying and grouping threads that have interdependent data access needs. The preferred embodiment of the present invention utilizes two different constructs to accomplish this grouping. A Memory Affinity Group (MAG) is disclosed. The MAG construct enables multiple threads to be associated with the same node without any foreknowledge of which threads will be involved in the association, and without any control over the particular node with which they are associated. A Logical Node construct is also disclosed. The Logical Node construct enables multiple threads to be associated with the same specified node without any foreknowledge of which threads will be involved in the association. While logical nodes do not explicitly identify the underlying physical nodes comprising the system, they provide a means of associating particular threads with the same node and other threads with other node(s). | 09-09-2010 |
| Patent application number | Description | Published |
| 20090096472 | Replaceable Probe Apparatus for Probing Semiconductor Wafer - A probe apparatus is provided with a plurality of probe tiles, an interchangeable plate for receiving the probe tiles, a floating plate being disposed between the respective probe tile and a receiving hole on the interchangeable plate, and a control mechanism providing multi-dimensional freedom of motions to control a position of the probe tile relative to the respective receiving hole of the interchangeable plate. A method of controlling the floating plate is also provided by inserting a pair of joysticks into two respective adjustment holes disposed on the floating plate and moving the pair of joysticks to provide translational motions (X-Y) and rotational (theta) motion of the floating plate, and turning the pair of jack screws clockwise and counter-clockwise to provide a translational motion (Z) and two rotational (pitch and roll) motions of the floating plate. | 04-16-2009 |
| 20090153166 | Apparatus and Method for Terminating Probe Apparatus of Semiconductor Wafer - A probe apparatus and method of terminating a probe that probes a semiconductor device with a signal cable from a tester side by side at a proximal end of the probe and a distal end of the signal cable. In one embodiment, the probe apparatus includes: a chassis; a dielectric block mounted in the chassis for retaining the probe, the probe extending on the chassis from a proximal end of the probe to the dielectric block, extending through the dielectric block, and projecting from the dielectric block towards the semiconductor device at a distal end of the probe; and a terminating apparatus, mounted in the chassis, for terminating the proximal end of the probe with a distal end of the signal cable side by side. | 06-18-2009 |
| 20090295416 | REPLACEABLE PROBE APPARATUS FOR PROBING SEMICONDUCTOR WAFER - A probe apparatus for probing a device on a semiconductor wafer to be tested by a testing equipment is provided. The probe apparatus includes a replaceable probe tile removably mounted in a probing location on a base plate. The probe tile is configured into a self-contained assembly which includes a chassis body containing a plurality of probes for probing devices on a wafer, a dielectric block for supporting the probes, and a wireguide for guiding a plurality of cables from the testing equipment into the chassis body. A wafer station having replaceable base plates and replaceable probe tiles are also provided. | 12-03-2009 |
| 20100203758 | REPLACEABLE PROBE APPARATUS FOR PROBING SEMICONDUCTOR WAFER - A probe apparatus is provided with a plurality of probe tiles, an interchangeable plate for receiving the probe tiles, a floating plate being disposed between the respective probe tile and a receiving hole on the interchangeable plate, and a control mechanism providing multi-dimensional freedom of motions to control a position of the probe tile relative to the respective receiving hole of the interchangeable plate. A method of controlling the floating plate is also provided by inserting a pair of joysticks into two respective adjustment holes disposed on the floating plate and moving the pair of joysticks to provide translational motions (X-Y) and rotational (theta) motion of the floating plate, and turning the pair of jack screws clockwise and counter-clockwise to provide a translational motion (Z) and two rotational (pitch and roll) motions of the floating plate. | 08-12-2010 |
| 20100259288 | APPARATUS AND METHOD FOR TERMINATING PROBE APPARATUS OF SEMICONDUCTOR WAFER - A probe apparatus and method of terminating a probe that probes a semiconductor device with a signal cable from a tester side by side at a proximal end of the probe and a distal end of the signal cable. In one embodiment, the probe apparatus includes: a chassis; a dielectric block mounted in the chassis for retaining the probe, the probe extending on the chassis from a proximal end of the probe to the dielectric block, extending through the dielectric block, and projecting from the dielectric block towards the semiconductor device at a distal end of the probe; and a terminating apparatus, mounted in the chassis, for terminating the proximal end of the probe with a distal end of the signal cable side by side. | 10-14-2010 |