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Fung, CA
Andrew Chi Lap Fung, Vancouver CA
| Patent application number | Description | Published |
|---|---|---|
| 20110078782 | IP COMMUNICATION DEVICE AS FIREWALL BETWEEN NETWORK AND COMPUTER SYSTEM - Methods, systems, and apparatuses are described for implementations of an Internet protocol (IP) communication device (e.g., an IP phone) that contains a firewall. The IP communication device is coupled between a computer system and a network. A data packet is received at a first port of the IP communication device. The data packet is filtered with the firewall included in the IP communication device. The filtered data packet may be transmitted from a second port of the IP communication device (in modified or unmodified form), or may be canceled based on the filtering. In one implementation, the first port is coupled to the network and the second port is coupled to the computer system. In another implementation, the first port is coupled to the computer system and the second port is coupled to the network. | 03-31-2011 |
Andy Fung, Vancouver CA
| Patent application number | Description | Published |
|---|---|---|
| 20100205466 | System and Method for Power Over Ethernet Power Mode Policy and Network Management - A system and method for power over Ethernet (PoE) power mode policy and network management. Various power modes or configurations can be defined for a powered device. An IT manager at a network management station can remotely configure a power mode or configuration of a powered device using a network management protocol such as SNMP. This network management protocol can instruct a software agent at a powered device to change a power mode or configuration. | 08-12-2010 |
Dale Po-Kun Fung, North York CA
| Patent application number | Description | Published |
|---|---|---|
| 20080223980 | BUBBLE GLIDER - This invention is a “bubble glider” which is a modified hybrid of the hot-air balloon and the glider. It has a distinct undulating forward motion. A simple bubble glider has a soft air-bubble, a hard air-bubble and a thin body and is made of 0.25 mm PVC sheets. It is used inside a completely sealed water tank with an external control unit. An operator uses the control unit to vary the buoyancy of the soft air-bubble and completely control the motion of the bubble glider. Specifically, the glider can glide forward and backward, change direction, take off and land vertically, float motionless and so on. In generalization, bubble gliders can be of many shapes and sizes, and made of, practically, any material. They can be designed to operate in totally closed containers or in open environments such as open water tanks, reservoirs, lakes, oceans and skies. | 09-18-2008 |
Eric Fung, Toronto CA
| Patent application number | Description | Published |
|---|---|---|
| 20110063093 | SYSTEM AND METHOD FOR PERFORMING SERIALIZATION OF DEVICES - A serialization service module is provided for configuring an asset management system to provide a secure means of generating, assigning to chips (or other electronic objects or devices), and tracking unique serial numbers. To provide this service, a controller is used to define a product model, then to define one or more serialization schemas to be bound to each product model. Each serialization schema contains a range of serial numbers for a particular product. The serial number schemas are sent over a secure, encrypted connection to appliances at the manufacturer's location. Agents can then request serial number values by product name. The serial numbers are generated by the appliance, metered, and provided to the agents. The serial numbers are then injected sequentially into each die in a chip manufacturing process using the agent. | 03-17-2011 |
Evelyn Yan-Leung Fung, North York CA
| Patent application number | Description | Published |
|---|---|---|
| 20080223980 | BUBBLE GLIDER - This invention is a “bubble glider” which is a modified hybrid of the hot-air balloon and the glider. It has a distinct undulating forward motion. A simple bubble glider has a soft air-bubble, a hard air-bubble and a thin body and is made of 0.25 mm PVC sheets. It is used inside a completely sealed water tank with an external control unit. An operator uses the control unit to vary the buoyancy of the soft air-bubble and completely control the motion of the bubble glider. Specifically, the glider can glide forward and backward, change direction, take off and land vertically, float motionless and so on. In generalization, bubble gliders can be of many shapes and sizes, and made of, practically, any material. They can be designed to operate in totally closed containers or in open environments such as open water tanks, reservoirs, lakes, oceans and skies. | 09-18-2008 |
Jane Chi-Yan Fung, Thornhill CA
| Patent application number | Description | Published |
|---|---|---|
| 20080263522 | Common Debug Adaptor - Software developers working on multi-language systems with various debug tools (BPEL, AE, Java, etc.) can use a common debug adaptor (CDA). The CDA implements a method of debugging in a multi-computer program language environment. The method includes registering various debug tools associated with different programming languages in the multi-computer program language environment, each one of the plurality of debug tools providing suspended threads and stack frames in response to a debug event in the multi-computer program language environment. The method can further include receiving the suspended threads and stack frames from the plurality of debug tools. The method can further include correlating the received suspended threads and stack frames under a common suspended thread; and providing the common suspended thread in a debug view. Such a method can have a number of attributes intended to assist developers facing debugging problems in multi-language systems. | 10-23-2008 |
| 20090125890 | BREAKPOINT MANAGEMENT AND RECONCILIATION FOR EMBEDDED SCRIPTS IN A BUSINESS INTEGRATION LANGUAGE SPECIFIED PROGRAM PROCESS - A method, system and apparatus for breakpoint management and reconciliation for business integration language specified programs. The system includes a business integration language development environment; debug tooling accessible through the environment; and, breakpoint management and reconciliation logic coupled to the debug tooling. The business integration language development environment includes a BPEL development environment cooperatively coupled to a BPEL engine. The debug tooling includes a script display for displaying textual portions of an embedded script; and, at least one other display selected from the group consisting of a graphical process flow display, a debug module display and a breakpoint module display. | 05-14-2009 |
Joseph Bing Kong Fung, Toronto CA
| Patent application number | Description | Published |
|---|---|---|
| 20100192198 | CACHING OF PRIVATE DATA FOR A CONFIGURABLE TIME PERIOD - A computer implemented method, apparatus, and computer program product for generating cookies. A cookie value is retrieved in response to receiving the request. An expiration for the cookie value is set based on a time period in which the request is received. A set of unique identifiers, including the expiration, are added to the cookie value and a cookie name to form a cookie. A response to the request is sent to an intermediate server. The response includes data responsive to the request and the cookie. The validity of the data for the response is related to the expiration. | 07-29-2010 |
Richard Fung, Markham CA
| Patent application number | Description | Published |
|---|---|---|
| 20090121761 | INTRA-PAIR DIFFERENTIAL SKEW COMPENSATION METHOD AND APPARATUS FOR HIGH-SPEED CABLE DATA TRANSMISSION SYSTEMS - A differential serial communication receiver circuit automatically compensates for intrapair skew between received differential signals on a serial differential communication link, with deterministic skew adjustment set during a receiver training period. Intrapair skew refers to the skew within a pair of differential signals, and is hence interchangeable with the term differential skew in the context of this document. During the receiver training period, a training data pattern is received, such as alternating ones and zeros (e.g., a D10.2 pattern as is known in the art), rather than an actual data payload. The differential serial communication receiver circuit includes a differential skew compensation circuit to compensate for intrapair skew. The differential skew compensation circuit receives a pair of complementary differential input signals including a noninverting input signal and an inverting input signal, and in response generates a skew compensated first differential output signal and a skew compensated second differential output signal. The differential skew compensation circuit compares the relative delay of the skew compensated first differential output signal and the skew compensated second differential output signal, and in response delays at least one of the noninverting input signal or the inverting input signal to reduce intrapair skew. | 05-14-2009 |
Richard Fung, Thornhill CA
| Patent application number | Description | Published |
|---|---|---|
| 20110068632 | INTEGRATED CIRCUIT ADAPTED TO BE SELECTIVELY AC OR DC COUPLED - An integrated circuit is adapted to be selectively AC or DC coupled to an external device at a coupling point. The integrated circuit includes a first connector connected to the coupling point by way of a coupling capacitor for AC coupling, a second connector connected to the coupling point for DC coupling, and a switch to selectively short the first and second connectors and thereby the coupling capacitor, when the integrated circuit is DC coupled to the device. The switch may be a MOSFET bridge comprising a switch control MOSFET interconnected between the first and second connectors, with the switch control MOSFET receiving at its gate a mode status signal for turning on the switch control MOSFET and thereby shorting the MOSFET bridge when the integrated circuit is DC coupled to the external device. The MOSFET bridge also includes a number of dynamically biased nMOSFETs connected in series with the switch control MOSFET in order to protect switch control MOSFET from high external supply voltages, and a number of dynamically biased pMOSFETs connected in parallel with the switch control MOSFET. | 03-24-2011 |
Richard W. Fung, Markham CA
| Patent application number | Description | Published |
|---|---|---|
| 20090115457 | Apparatus and Methods for Self-Biasing Differential Signaling Circuitry Having Multimode Output Configurations for Low Voltage Applications - The present disclosure relates to a differential signaling circuit including differential signaling circuitry having at least one output and one input, that can operate in multiple mode of operations while using a single, low voltage supply source. Two or more switches are included and configured to selectively couple a supply voltage to the output dependent on a mode of operation of the differential signaling circuitry. The circuit also includes a switch control biasing circuit operatively coupled to at least one of the switches and to the output of the differential signaling circuitry. The switch control biasing circuit provides a switch control biasing voltage to control a state of the switch based on a voltage level of the output. Further, a bulk biasing circuit is included and operatively coupled to the switch. The bulk biasing circuit selectively provides a bulk biasing voltage to the switch based on the voltage level of the output. | 05-07-2009 |
Richard W. Fung, Thornhill CA
| Patent application number | Description | Published |
|---|---|---|
| 20120025870 | METHOD AND APPARATUS FOR VOLTAGE LEVEL SHIFTING WITH CONCURRENT SYNCHRONIZATION - Methods and apparatus provide for voltage level shifting with concurrent synchronization. The apparatus includes level shifting logic that in response to a non-level shifted clock signal from a first voltage domain, provides level shifted concurrently synchronous differential data signals in a second voltage domain based on pre-level shifted differential data signals from the first voltage domain. The first voltage domain may be, for example, a core logic voltage domain in which core logic operates. The second voltage domain may be, for example, an input/output (I/O) voltage domain in which an I/O buffer operates. The voltage level of the level shifted concurrently synchronous differential data signals is shifted from the pre-level shifted differential data signals, and the timing of the level shifted concurrently synchronous differential data signals is concurrently referenced to the non-level shifted clock signal. | 02-02-2012 |
| 20120030488 | METHOD AND APPARATUS FOR INDICATING MULTI-POWER RAIL STATUS OF INTEGRATED CIRCUITS - Methods and apparatus provide for indicating multi-power rail status of integrated circuits by taking into account a clock signal provided by, for example, core logic, in addition to considering voltage levels of multiple power rails. In one example, the apparatus includes multi-power rail status indicating logic that provides a multi-power rail status signal. The multi-power rail status signal is synchronized for assertion with a clock signal of the integrated circuit, such as the core logic of the integrated circuit, in response to an assertion of an asynchronous multi-power rail voltage stability signal. The asynchronous multi-power rail voltage stability signal indicates a state of a plurality of voltage signals from a plurality of power rails supplied to the integrated circuit. The multi-power rail status indicating logic may include a synchronous assertion/asynchronous de-assertion multi-power rail status signal generator that receives the clock signal and the asynchronous multi-power rail voltage stability signal, and in response to of the assertion of the asynchronous multi-power rail voltage stability signal, synchronizes the asynchronous multi-power rail voltage stability signal with the clock signal to assert the multi-power rail status signal. | 02-02-2012 |
Ryan Fung, Mississauga CA
| Patent application number | Description | Published |
|---|---|---|
| 20090015308 | EFFICIENT DELAY ELEMENTS - Circuits, methods, and apparatus for delaying signals in a power and area efficient manner are provided. A gating element within a stage of a programmable delay element suppresses an operation of other stages of the delay element. A programmable delay has components with differing delays that may be combined to give flexibility in choices for delay increments while minimizing the area of the delay element. A delay element is shared between different signal paths, for example, to reduce the number of delay elements or to allow utilizing unused delay elements of other signal paths. | 01-15-2009 |
| 20110227625 | APPARATUS FOR USING METASTABILITY-HARDENED STORAGE CIRCUITS IN LOGIC DEVICES AND ASSOCIATED METHODS - An integrated circuit (IC) includes a set of metastability-hardened storage circuits. Each metastability-hardened storage circuit may include: (a) a pulse width distortion circuit; (b) a first circuit powered by a nominal power supply voltage, and a second circuit powered by a higher-than-nominal supply voltage; (c) an inverter and a bias circuit, where the bias circuit provides a bias current based on an intermediate state of the inverter to resolve a metastable state of the inverter; or (d) a latch, and a dynamic bias circuit that causes current to be injected into the latch to resolve a metastable state of the latch. | 09-22-2011 |
| 20110299346 | APPARATUS FOR SOURCE-SYNCHRONOUS INFORMATION TRANSFER AND ASSOCIATED METHODS - An apparatus includes an interface circuit coupled to an electronic device. The interface circuit provides source synchronous communication with the electronic device using a strobe signal. The interface circuit is configured to gate the strobe signal in order to successfully communicate with the electronic device. | 12-08-2011 |
Wai Lun Alan Fung, Willowdale CA
| Patent application number | Description | Published |
|---|---|---|
| 20100129805 | SLC1A1 ANTIPSYCHOTIC DRUG RESPONSE MARKERS - The invention relates to methods for predicting a subject's response to antipsychotic drug treatment comprising the steps of obtaining a biological sample from the subject, and determining the presence or absence of one or more polymorphisms in the SLC1A1 gene of the subject, wherein the presence of the one or more polymorphisms indicates that the subject's response to antipsychotic drug treatment. The invention also provides for kits for performing these methods. | 05-27-2010 |