Inventors list

Assignees list

Classification tree browser

Top 100 Inventors

Top 100 Assignees


Fumitoshi Ito

Fumitoshi Ito, Yokohama JP

Patent application numberDescriptionPublished
20090180325Partitioned Erase And Erase Verification In Non-Volatile Memory - A set of memory cells can be erased by individually erasing portions of the set in order to normalize the erase behavior of each memory cell and provide more consistent erase rates. An erase voltage pulse can be applied to the set of memory cells with a first group of cells biased for erase and a second group biased to inhibit erase. A second erase voltage pulse can then be applied with the second group biased for erase and the first group biased to inhibit erase. The groups are chosen so that the erase potentials for the cells in the first subset during the first pulse are about equal, so that the erase potentials for the cells in the second subset during the second pulse are about equal, and so that the erase potentials for the cells of the first subset are about the same as the erase potentials for the cells of the second subset. In one embodiment, the bias conditions for the string during each individual erase are selected so that every memory cell of the set will experience similar capacitive coupling effects from neighboring transistors.07-16-2009
20100246257FABRICATING AND OPERATING A MEMORY ARRAY HAVING A MULTI-LEVEL CELL REGION AND A SINGLE-LEVEL CELL REGION - Techniques are disclosed herein for applying different process steps to single-level cell (SLC) blocks in a memory array than to multi-level cell (MLC) blocks such that the SLC blocks will have high endurance and the MLC blocks will have high reliability. In some aspects, different doping is used in the MLC blocks than the SLC blocks. In some aspects, different isolation is used in the MLC blocks than the SLC blocks. Techniques are disclosed that apply different read parameters depending on how many times a block has been programmed/erased. Therefore, blocks that have been cycled many times are read using different parameters than blocks that have been cycled fewer times.09-30-2010

Patent applications by Fumitoshi Ito, Yokohama JP

Fumitoshi Ito, Kawasaki-Shi JP

Patent application numberDescriptionPublished
20080259384IMAGE FORMING SYSTEM AND INFORMATION PROCESSING APPARATUS - A system is capable of performing a processing flow based on a definition file which designates a plurality of tasks each of which can be performed by a function provided by an image forming apparatus and an order of performance of a plurality of tasks. The system includes an acquisition unit configured to acquire a definition file of the processing flow specified by a user, a determination unit configured to select one of a plurality of image forming apparatuses to perform each task included in the processing flow based on candidate information included in the definition file of the processing flow, and a performing unit configured to perform each task included in the processing flow using the image forming apparatus selected by the determination unit. The candidate information includes information on a user device that is set corresponding to each user as information for determining the image forming apparatus that performs the task.10-23-2008
20090125360WORKFLOW SUPPORT APPARATUS, METHOD OF CONTROLLING THE SAME, WORKFLOW SUPPORT SYSTEM, AND PROGRAM - A user who instructs execution of reading of a paper document in which workflow information is embedded is authenticated. The workflow information contains responsible person information and the process order of the steps of a workflow. The workflow information is extracted from the obtained read image. Based on the responsible person information and the process order in the extracted workflow information and authentication information used to authenticate the user, the current step of the workflow of the read paper document is determined.05-14-2009
20090303532NETWORK DEVICE AND WORKFLOW PROCESSING SYSTEM - A system which executes a workflow without a management apparatus immediately notifies the user of an error which has occurred in a device. When an error occurs in a job in a device which is executing the workflow, the device which shares the workflow with other devices transmits the log of the error to a device of the end stage of the workflow in accordance with the flow of the workflow.12-10-2009
20100141980WORK FLOW SYSTEM, IMAGE PROCESSING APPARATUS, AND CONTROL METHOD FOR IMAGE PROCESSING APPARATUS - An image processing apparatus capable of executing a work flow according to setting information indicating a processing content for combining a plurality of functions and executing the functions as a series of processings, includes: an obtaining unit configured to obtain function restriction information indicating a function whose execution is restricted among a plurality of functions provided to the image processing apparatus; a function identification unit configured to identify a function executed by the image processing apparatus and a function executed by the other apparatus on the basis of the setting information; and a decision unit configured to decide whether execution of the work flow based on the setting information is restricted on the basis of the function restriction information and the function executed by the image processing apparatus and the function executed by the other apparatus identified by the function identification unit.06-10-2010
20100211951IMAGE PROCESSING APPARATUS, METHOD OF CONTROLLING THE SAME, AND STORAGE MEDIUM - An image processing apparatus that is capable of more reliably synchronizing an execution state of a job flow set in a plurality of machines without using a management server. In the digital multi-function peripheral, a job flow list management section receives a job flow setting file in which a job flow to be executed is described, and a job execution section executes the job flow based on the received job flow setting file. A communication section notifies other digital multi-function peripherals of execution of the job flow when the job flow is executed, and notifies the other digital multi-function peripherals of termination of the job flow when the execution of the job flow is terminated.08-19-2010

Patent applications by Fumitoshi Ito, Kawasaki-Shi JP

Fumitoshi Ito, Hamura JP

Patent application numberDescriptionPublished
20100202205SEMICONDUCTOR DEVICE - The degree of integration and the number of rewriting of a semiconductor device having a nonvolatile memory element are improved. A first MONOS nonvolatile-memory-element and a second MONOS nonvolatile-memory-element having a large gate width compared with the first MONOS nonvolatile-memory-element are mounted together on the same substrate, and the first MONOS nonvolatile-memory-element is used for storing program data which is scarcely rewritten, and the second MONOS nonvolatile-memory-element is used for storing processed data which is frequently rewritten.08-12-2010

Patent applications by Fumitoshi Ito, Hamura JP