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Fumiki Aiso
Fumiki Aiso, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090004833 | METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE - A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer. | 01-01-2009 |
| 20090014828 | SEMICONDUCTOR MEMORY DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR MEMORY DEVICE - In a method of manufacturing a semiconductor memory device, an opening is made in a part of an insulating film formed on a silicon substrate. An amorphous silicon thin film is formed on the insulating film in which the opening has been made and inside the opening. Then, a monocrystal is solid-phase-grown in the amorphous silicon thin film, with the opening as a seed, thereby forming a monocrystalline silicon layer. Then, the monocrystalline silicon layer is heat-treated in an oxidizing atmosphere, thereby thinning the monocrystalline silicon layer and reducing the defect density. Then, a memory cell array is formed on the monocrystalline silicon layer which has been thinned and whose defect density has been reduced. | 01-15-2009 |
| 20100112791 | METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE - A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer. | 05-06-2010 |
| 20100117135 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor device is formed on a SOI substrate having a semiconductor substrate, a buried oxide film formed on the semiconductor substrate, and a semiconductor layer formed on the buried oxide film, the semiconductor substrate having a first conductive type, the semiconductor layer having a second conductive type, wherein the buried oxide film has a first opening opened therethrough for communicating the semiconductor substrate with the semiconductor layer, the semiconductor layer is arranged to have a first buried portion buried in the first opening in contact with the semiconductor substrate and a semiconductor layer main portion positioned on the first buried portion and on the buried oxide film, the semiconductor substrate has a connection layer buried in a surface of the semiconductor substrate and electrically connected to the first buried portion in the first opening, the connection layer having the second conductive type, and the semiconductor device includes a contact electrode buried in a second opening, a side surface of the contact electrode being connected to the semiconductor layer main portion, a bottom surface of the contact electrode being connected to the connection layer, the second opening passing through the semiconductor layer main portion and the buried oxide film, and the second opening reaching a surface portion of the connection layer. | 05-13-2010 |
Fumiki Aiso, Kanagawa-Ken JP
| Patent application number | Description | Published |
|---|---|---|
| 20090294828 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - A nonvolatile semiconductor memory device includes: a semiconductor member; a memory film provided on a surface of the semiconductor member and being capable of storing charge; and a plurality of control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface. Average dielectric constant of a material interposed between one of the control gate electrodes and a portion of the semiconductor member located immediately below the control gate electrode adjacent to the one control gate electrode is lower than average dielectric constant of a material interposed between the one control gate electrode and a portion of the semiconductor member located immediately below the one control gate electrode. | 12-03-2009 |
| 20100078045 | SEMICONDUCTOR MANUFACTURING APPARATUS AND METHOD FOR CLEANING SAME - An LPCVD apparatus is provided with a processing chamber and a reaction cooling apparatus. The reaction cooling apparatus is placed outside the processing chamber and is configured to generate hydrogen fluoride gas by reaction of hydrogen gas and fluorine gas and to cool the hydrogen fluoride gas. The hydrogen fluoride gas cooled by the reaction cooling apparatus is supplied into the processing chamber as a cleaning gas. | 04-01-2010 |
| 20100078622 | NONVOLATILE MEMORY DEVICE AND METHOD FOR MANUFACTURING SAME - A nonvolatile memory device includes: a substrate; a stacked structure member including a plurality of dielectric films and a plurality of electrode films alternately stacked on the substrate and including a through-hole penetrating through the plurality of the dielectric films and the plurality of the electrode films in a stacking direction of the plurality of the dielectric films and the plurality of the electrode films; a semiconductor pillar provided in the through-hole; and a charge storage layer provided between the semiconductor pillar and each of the plurality of the electrode films. At least one of the dielectric films includes a film generating one of a compressive stress and a tensile stress, and at least one of the electrode films includes a film generating the other of the compressive stress and the tensile stress. | 04-01-2010 |
Fumiki Aiso, Tokyo JP
| Patent application number | Description | Published |
|---|---|---|
| 20090072324 | SEMICONDUCTOR DEVICE HAVING AN ELEVATED SOURCE/DRAIN STRUCTURE OF VARYING CROSS-SECTION - A semiconductor device with an elevated source/drain structure provided in each predetermined position defined by the oxide film and gate wiring on a semiconductor silicon substrate, where an orthographic projection image of a shape of an upper end portion of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is substantially in agreement with a predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate, and at least one of orthographic projection images of cross-sections taken along planes parallel with the semiconductor silicon substrate of the elevated source/drain structure on the semiconductor silicon substrate along the direction normal to the semiconductor silicon substrate is larger than the predetermined shape defined by the corresponding oxide film and gate wiring on the semiconductor silicon substrate. | 03-19-2009 |
| 20090130823 | METHOD OF FORMING SEMICONDUCTOR DEVICE INCLUDING TRENCH GATE STRUCTURE - A method of forming a semiconductor device is provided, which may include, but is not limited to, the following processes. Grooves may be formed in an insulating region and in a semiconductor region, while forming burrs near the boundary between the insulating region and the semiconductor region. Protection films may be selectively formed on inside walls of the grooves except on bottom walls of the grooves. A selective thermal process may be carried out in the presence of the protection films, thereby removing the burrs. | 05-21-2009 |
Fumiki Aiso, Mie JP
| Patent application number | Description | Published |
|---|---|---|
| 20110233646 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - According to one embodiment, a nonvolatile semiconductor memory device is provided in which memory strings, which are formed by providing a plurality of transistors having gate electrode films on sides of columnar semiconductor films in a height direction of the columnar semiconductor films via charge storage layers, are substantially perpendicularly arranged in a matrix shape on a substrate. A coupling section made of a semiconductor material that connects lower portions of the columnar semiconductor films forming a pair of the memory strings adjacent to each other in a predetermined direction is provided. Each of the columnar semiconductor films is formed of a generally single-crystal-like germanium film or silicon germanium film. | 09-29-2011 |