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Fujimoto, Yokohama-Shi
Hideomi Fujimoto, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20100189452 | Apparatus and method of controlling light level of a light source, and recording medium storing program of controlling light level of a light source - An apparatus and a method of controlling a light level of a light beam irradiated by a light source are provided. The light source is caused to irradiate the light beam having a light level determined based on a light level correction value for a specific main scanning position. The light level correction value is calculated based on light level change information indicating the change in the light level correction value for the specific main scanning position changes with respect to an initial light level correction value or a preceding light level correction value. | 07-29-2010 |
Kazuaki Fujimoto, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20100144448 | INFORMATION STORAGE MEDIUM, GAME DEVICE, AND GAME SYSTEM - A computer-readable information storage medium storing a program that causes a computer to function as: an object data storage section that stores a plurality of base objects each of which forms a base of a hairstyle of a game character and a plurality of part objects each of which can be attached to at least one of the plurality of base objects; a setting information storage section that stores setting information that links one base object among the plurality of base objects and at least one part object among the plurality of part objects that have been selected by a game player to a game character of the game player; an object space setting section that sets the one base object and the at least one part object in an object space as elements of a game character based on the setting information; and a drawing section that generates an image of the object space viewed from a given viewpoint. | 06-10-2010 |
Kazunori Fujimoto, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090209055 | Method to fabricate semiconductor optical device - A process for the semiconductor laser diode is disclosed, which prevents the abnormal growth occurred at the second growth for the burying region of the buried hetero structure. The ICP (Induction-Coupled Plasma) CVD apparatus forms a silicon oxide file with a thickness of above 2 μm as adjusting the bias power P | 08-20-2009 |
| 20090317929 | METHOD OF PRODUCING SEMICONDUCTOR OPTICAL DEVICE - A method of producing a semiconductor optical device includes a first step of growing a stacked semiconductor layer including a first III-V group compound semiconductor layer for an active layer on a substrate; a second step of forming a silicon oxide film on the stacked semiconductor layer, the silicon oxide film having a predetermined film stress and a predetermined thickness; a third step of forming a strip-shaped groove in the silicon oxide film by etching the silicon oxide film, using a resist pattern formed on the silicon oxide film, until a surface of the stacked semiconductor layer is exposed; and a fourth step of growing a second III-V group compound semiconductor layer in the groove using the silicon oxide film as a selective mask. | 12-24-2009 |
Masahiro Fujimoto, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20100020401 | WAVELENGTH SELECTION FILTER, FILTER UNIT, LIGHT SOURCE DEVICE, OPTICAL APPARATUS, AND REFRACTIVE INDEX SENSOR - A wavelength selection filter selectively resonating and reflecting light of a given wavelength contained in incident light, includes a substrate having a rectangular waveform concave and convex structure which is formed on a plane on which the incident light falls incident, the concave and convex structure including convex portions and concave portions which are arranged in one axial direction and a multilayer structure including a first layer and a second layer respectively coating one and the other one of side surfaces, in the one axial direction, of each of convex portions of the concave and convex structure. A refractive index of the first layer and a refractive index of the second layer are both higher than a refractive index of the substrate. | 01-28-2010 |
Seiji Fujimoto, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090111537 | MOBILE TERMINAL DEVICE - In a foldable mobile terminal device, a first housing is connected to a second housing via a connecting portion. The mobile terminal device includes: a first hinge shaft for opening/closing the second housing together with the connecting portion in a longitudinal direction; a second hinge shaft for opening/closing the second housing in a lateral direction; a call clearing button disposed on a second hinge shaft side of an upper surface of the first housing as seen from a lateral center of the upper surface; and a first projection for button identification which is provided on an edge portion of the second hinge shaft side and lies lateral to the call clearing button wherein a height of the first projection is made lower than a height of the upper surface of the first housing. | 04-30-2009 |
Yukihiro Fujimoto, Yokohama-Shi JP
| Patent application number | Description | Published |
|---|---|---|
| 20090285040 | Semiconductor Memory Device - A semiconductor memory device includes a memory cell array. The memory cell array includes a plurality of sub arrays. Each sub array includes a plurality of memory cells. The memory cell includes a pair of storage nodes that are complementary to each other. One storage node constituting the pair of storage nodes in each of the memory cells in each of the sub arrays is connected to a global bit-line. The other storage node constituting the pair of storage nodes in each of the memory cells in each of the sub arrays is connected to a local bit-line. The global bit-line is a bit-line connected in common to the plurality of the sub arrays. The local bit-line is provided for each of the sub arrays. | 11-19-2009 |
| 20100238752 | SEMICONDUCTOR INTEGRATED CIRCUIT - A semiconductor integrated circuit includes a first region configured to operate at a specified first voltage, a second region configured to operate at a varying second voltage, and a memory device formed between the first region and the second region so as to straddle the first and second regions, wherein the memory device comprises a first port driven at the first voltage to transmit an output signal to and receive an input signal from the first region, a second port driven at the second voltage to transmit an output signal to and receive an input signal from the second region, and a memory cell accessed by the first and second ports. | 09-23-2010 |