Patent application number | Description | Published |
20130020633 | SEMICONDUCTOR DEVICE - A super-junction semiconductor substrate is configured in such a manner that an n-type semiconductor layer of a parallel pn structure is opposed to a boundary region between an active area and a peripheral breakdown-resistant structure area. A high-concentration region is formed at the center between p-type semiconductor layers that are located on both sides of the above n-type semiconductor layer. A region where a source electrode is in contact with a channel layer is formed over the n-type semiconductor layer. A portion where the high-concentration region is in contact with the channel layer functions as a diode. The breakdown voltage of the diode is set lower than that of the device. | 01-24-2013 |
20130045395 | PERPENDICULAR MAGNETIC RECORDING MEDIUM - A perpendicular magnetic recording medium according to which both the thermal stability of the magnetization is good and writing with a magnetic head is easy, and moreover the SNR is improved. In the case of a perpendicular magnetic recording medium comprising a nonmagnetic substrate ( | 02-21-2013 |
20130092045 | RAILWAY VEHICULAR POWER CONVERTER - A railway vehicular power converter adapted to be fixed beneath a floor of a railway vehicle has a power conversion unit, a housing, and a plurality of L-shaped securing members provided at upper end parts of an outer surface of the housing for fixing beneath the floor of the railway vehicle. The plurality of securing members is reinforced by reinforcing members provided inside the housing and attached behind the surface of the housing where the securing members are disposed. Each of the reinforcing members has a C-channel having a length substantially the same as a length of the housing in a shorter direction thereof, and has two edges in the shorter direction bent at least once. | 04-18-2013 |
20130092978 | SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor layer of a first conductor type; a first semiconductor layer of a second conductor type, on the front of the semiconductor layer; a second semiconductor layer of the second conductor type, on the first semiconductor layer and having a higher impurity concentration than the first semiconductor layer; a third semiconductor layer of the second conductor type, on the second semiconductor layer and having a lower impurity concentration than the second semiconductor layer; a first semiconductor region of the first conductor type, in a surface layer of the third semiconductor layer; a second semiconductor region of the second conductor type, in a surface layer of the first semiconductor region; an input electrode contacting the second semiconductor region; a control electrode disposed above part of the first semiconductor region with an insulating film therebetween; and an output electrode disposed on the back of the semiconductor layer. | 04-18-2013 |
20130092979 | SEMICONDUCTOR DEVICE WITH AN ELECTRODE INCLUDING AN ALUMINUM-SILICON FILM - A semiconductor device, including a silicon substrate having a first major surface and a second major surface, a front surface device structure formed in a region of the first major surface, and a rear electrode formed in a region of the second major surface. The rear electrode includes, as a first layer thereof, an aluminum silicon film that is formed by evaporating or sputtering aluminum-silicon onto the second major surface, the aluminum silicon film having a silicon concentration of at least 2 percent by weight and a thickness of less than 0.3 μm. | 04-18-2013 |
20130093053 | TRENCH TYPE PIP CAPACITOR, POWER INTEGRATED CIRCUIT DEVICE USING THE CAPACITOR, AND METHOD OF MANUFACTURING THE POWER INTEGRATED CIRCUIT DEVICE - A trench-type PIP capacitor having a small step at the end part of the capacitor without increasing manufacturing cost, and a power integrated circuit device that uses such a trench-type PIP capacitor are disclosed. A method of manufacturing the power integrated circuit device also is disclosed. A trench-type PIP capacitor has a construction, in the surface region of a semiconductor substrate, comprising an isolating insulation layer formed on an inner wall of a trench and a first polysilicon that fills the trench through the isolating insulation layer and becomes a lower electrode. Since this construction has a small step formed at the end region of the capacitor, a metal layer for wiring does not need to be made excessively thick, allowing a fine structure of the metal layer. Therefore, the power IC provided with such a trench-type PIP capacitor can have a fine structure. | 04-18-2013 |
20130094252 | FORWARD TYPE DC-DC CONVERTER - With the use of a voltage across a secondary winding of a transformer, a DC output voltage and a conduction time width of a current in the DC reactor on the secondary side circuit in an immediately preceding period, the turning-on time width and the turning-off time width of a synchronous rectification MOSFET in the secondary side circuit of the transformer are obtained by calculations, without receiving any signals from a primary side circuit, to thereby carry out control of a synchronous rectification circuit in a forward DC-DC converter with the time in which a current flows in a diode reduced to the minimum. | 04-18-2013 |
20130099347 | SUPERJUNCTION SEMICONDUCTOR DEVICE - A superjunction semiconductor device is disclosed in which the trade-off relationship between breakdown voltage characteristics and voltage drop characteristics is considerably improved, and it is possible to greatly improve the charge resistance of an element peripheral portion and long-term breakdown voltage reliability. It includes parallel pn layers of n-type drift regions and p-type partition regions in superjunction structure. PN layers are depleted when off-state voltage is applied. Repeating pitch of the second parallel pn layer in a ring-like element peripheral portion encircling the element active portion is smaller than repeating pitch of the first parallel pn layer in the element active portion. Element peripheral portion includes low concentration n-type region on the surface of the second parallel pn layer. The depth of p-type partition region of an outer peripheral portion in the element peripheral portion is smaller than the depth of p-type partition region of an inner peripheral portion. | 04-25-2013 |
20130113497 | FAULT POSITION ANALYSIS METHOD AND FAULT POSITION ANALYSIS DEVICE FOR SEMICONDUCTOR DEVICE - A fault position analysis method and a fault position analysis device for a semiconductor device, through which a fault position of a SiC semiconductor device can be analyzed and specified by an OBI RCH method, are disclosed. The fault position analysis method for the semiconductor device scans and irradiates a device and a circuit on a front surface of a substrate with a laser beam from a rear surface side of the substrate of the semiconductor device to heat the device and the circuit. It causes a current to flow to the device and the circuit while being heated, detects a change in a resistance value caused by a change in a current, and analyzes the fault position. The semiconductor device is a semiconductor device which uses an N-doped SiC substrate. Laser beams having wavelengths of 650 to 810 nm are used. | 05-09-2013 |
20130115747 | TRENCH GATE SEMICONDUCTOR DEVICE AND THE METHOD OF MANUFACTURING THE SAME - A trench gate semiconductor device is disclosed which has a trench gate structure including an insulator in the upper portion of a first trench, the insulator being on a gate electrode; a source region having a lower end surface positioned lower than the upper surface of the gate electrode; a second trench in the surface portion of a semiconductor substrate between the first trenches, the second trench having a slanted inner surface providing the second trench with the widest trench width at its opening and a bottom plane positioned lower than the lower end surface of the source region, the slanted inner surface being in contact with the source region; and a p-type body-contact region in contact with the slanted inner surface of the second trench. The trench gate semiconductor device and its manufacturing method facilitate increasing the channel density and lowering the body resistance of the parasitic BJT. | 05-09-2013 |
20130122663 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Mirror-polished CZ wafer and FZ wafer are prepared. A first impurity region which will be a first isolation region is formed in a surface layer of a first main surface of the CZ wafer. The first main surface of the CZ wafer and a first main surface of the FZ wafer are bonded to each other by an inter-molecular bond. A second impurity region which will be a second isolation region is formed in a surface layer of a second main surface of the FZ wafer. A heat treatment is performed to diffuse the first impurity region and the second impurity region such that the first impurity region and the second impurity region are continuous, thereby forming a through silicon isolation region. | 05-16-2013 |
20130126967 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - A vertical super junction MOSFET and a lateral MOSFET are integrated on the same semiconductor substrate. The lateral MOSFET is electrically isolated from the vertical super junction MOSFET by an n-buried isolating layer and an n-diffused isolating layer. The lateral MOSFET is formed of a p-well region formed in an n | 05-23-2013 |
20130127438 | PHOTOCOUPLER OUTPUT SIGNAL RECEIVING CIRCUIT - In aspects of the invention, a photocoupler output signal receiving circuit includes a first constant current circuit, connected between an input terminal and the high potential side of a direct current power source, that discharges current, a second constant current circuit, connected between the input terminal and the low potential side of the direct current power source, that takes in current, and switching elements that operate the first and second constant current circuits in a complementary way, wherein the switching elements are operated so that current is taken in by the second constant current circuit after a photocoupler is turned on, and are operated so that current is discharged by the first constant current circuit after the photocoupler is turned off, and a discharge current value in a current discharge period is reduced after a certain period elapses from the start of discharging. | 05-23-2013 |
20130127524 | HIGH-VOLTAGE INTEGRATED CIRCUIT DEVICE - A high-voltage integrated circuit device can include, in a surface layer of a p semiconductor substrate, an n region which is a high-side floating-potential region, an n | 05-23-2013 |
20130134917 | IMPROPER WIRING DETECTING SYSTEM OF PARALLEL INVERTER SYSTEM - An improper wiring detecting system of a parallel inverter system can include two polyphase inverters connected in parallel, and voltage detectors to detect an output voltage of each of the phases of each of the inverters. Control units can control turning-on and -off of semiconductor switching devices of the inverters, and a wiring condition deciding means can operate at least one control unit to turn-on specified switching devices in at least one inverter to form a closed circuit between arbitrary two phases of the at least one inverter. The system can carry out comparisons among values of output voltages of the two inverters corresponding to respective phases and detected by the voltage detectors, and make a decision as to whether wiring is correct or not on the basis of the results of the comparisons. | 05-30-2013 |
20130141946 | SWITCHING POWER SUPPLY DEVICE AND METHOD FOR CONTROL THEREOF - A switching power supply device and method for control thereof, including an input voltage generating unit, a transformer, an output voltage generating unit, a MOS transistor, an output voltage detecting unit, a switching control unit, and a power supply unit. The output voltage detecting unit detects a transformer tertiary winding voltage, compares it with a first reference value, compares the differentiated tertiary winding voltage with a second reference value, and determines the start and end of a detection period based on the two comparisons. The output voltage detecting unit also samples and holds the voltage with two sampling pulses within the detection period, selects one of the two sampled and held voltages, and outputs the selected voltage when the detection period ends. | 06-06-2013 |
20130141947 | SWITCHING POWER SUPPLY - A flyback type switching power supply includes between P and N of a direct current output a sudden load change detector circuit, which normally has no power consumption, that detects only a transient fluctuation of a direct current output voltage, and starts the switching of a primary side semiconductor switch when there is no load or a light load, even when the semiconductor switch is in an off state, thereby enabling the detection of the direct current output voltage in a tertiary winding, and suppressing a drop in the direct current output voltage. | 06-06-2013 |
20130141952 | PARALLEL INVERTER DEVICE AND METHOD FOR CONTROL THEREOF - Inverters connected in parallel each include a power converter that carries out a direct current to alternating current conversion and supplies voltage to a motor, and a control unit, where one of the inverters is a master inverter and the control unit computes a voltage command value for the power converter in the one inverter, while the other inverter is a slave inverter and the power converter in the slave inverter is driven by the voltage command value, a transmission means transmits the voltage command value, and the control unit of the master inverter includes a delay device that delays the voltage command value by a transmission time needed when transmitting a computed voltage command value to the slave inverter, and provides the voltage command value delayed by the delay device to the power converter of the master inverter. | 06-06-2013 |
20130147525 | DRIVE CIRCUIT FOR INSULATED GATE SWITCHING ELEMENT - Embodiments of the invention provide a drive circuit including: a constant current source that generates a constant current; a switching circuit that connects a gate of the insulated gate switching element to a power supply potential side via the constant current source when turning the insulated gate switching element ON and connects the gate of the insulated gate switching element to a reference potential side via a discharge circuit when turning the insulated gate switching element OFF; a gate voltage detection circuit that detects a gate voltage of the insulated gate switching element; and a current mode selection circuit that switches a mode of the constant current source from a normal current mode to a low current consumption mode when detecting, based on the gate voltage detected by the gate voltage detection circuit, that the insulated gate switching element is turned ON. | 06-13-2013 |
20130147553 | AUTO-ZERO AMPLIFIER AND FEEDBACK AMPLIFIER CIRCUIT USING THE AUTO-ZERO AMPLIFIER - In aspects of the invention, at normal operation, an operational amplifier circuit has feedback applied from the output thereof to the input thereof so that currents equal to each other flow in differential pair transistors, respectively. While, in order that currents equal to each other may flow in the differential pair transistors, respectively, for compensating the difference in threshold voltages in the differential pair transistors, a voltage lower by a certain voltage difference than the voltage applied to the gate terminal of the transistor must be applied to the gate terminal of the transistor. From this, the switching of switches, when a virtual short circuit occurs, can make the output voltage of the operational amplifier circuit become a signal in which positive and negative rectangular ripples, with the values thereof being proportional to the value of the certain voltage difference, are superimposed on a true value. | 06-13-2013 |
20130148386 | SWITCHING REGULATOR - A switching regulator can include a transformer having a primary winding and a secondary winding, a switching circuit including a switching element that is connected in series to the primary winding, the series-connected circuit of the switching element and the primary winding being connected in parallel to a DC power supply and a rectifying circuit connected to the secondary winding. The switching regulator can also include a control circuit to control switching of the switching element to generate DC output voltage from the DC power supply, the DC output voltage being insulated from the DC power supply, an output voltage detecting circuit including a photo-coupler for insulated detection of the DC output voltage, the photo-coupler having a photo-transistor and a load quantity detector for detecting a state in which power consumption in the load connected to the DC output has reached a predetermined value. | 06-13-2013 |
20130149528 | OXIDE SUBSTRATE AND MANUFACTURING METHOD THEREFOR - Some aspects of the invention provide an oxide substrate having a flat surface at the atomic layer level, and suited to forming a thin film of a perovskite manganese oxide. One aspect of the invention provides a single-crystal oxide substrate | 06-13-2013 |
20130152910 | INTERNAL COMBUSTION ENGINE IGNITION DEVICE - An internal combustion engine ignition device can determine ignition timing with high precision to perform ignition with high precision even where noise superimposed at the time of rise of current flowing through an ignition coil is generated. In an internal combustion engine ignition device including an output terminal for detecting an internal state such as a coil current, it is possible to prevent generation of pulse noise in the form of chattering at falling and rising edges of a voltage of the output terminal by using a hysteresis comparator, even if noise is superimposed at the time of rise of the coil current. Therefore, a voltage pulse with pulse width of high precision is transmitted to an electronic control unit without the influence of noise, and the ignition timing can be determined properly with high precision. | 06-20-2013 |
20130155560 | Semiconductor Device - In a semiconductor device, a surge voltage is lowered on turning OFF of a switching element, and output current is reduced on turning ON of the switching element in a non-saturated condition to achieve a reduced amount of self-heating. The semiconductor device can comprise a semiconductor switching element, an overvoltage protection circuit, and a resistance circuit to transmit a control signal for turning the switching element ON and OFF to a control terminal of the switching element. The semiconductor device can further comprise a voltage detecting switch that receives a signal corresponding to a voltage appearing at the output terminal of the switching element on turning OFF of the switching element, and a gate resistor change-over switch that operates according to a voltage of a timing capacitor connected to the output side of the voltage detecting switch to increase a resistance value of the resistance circuit. | 06-20-2013 |
20130155740 | POWER CONVERTER AND CONTROL METHOD THEREOF - Aspects of the invention can provide a control method of a power converter that is capable of preventing increase of electromagnetic noise that are caused by simultaneous change of the states of power semiconductor switching elements of the power converter. State changes of ON/OFF pulses that are input to power semiconductor switching elements are detected, and, when the timings of the state changes of any two of the ON/OFF pulses match each other, the state change of either one of the ON/OFF pulses, of which state changes match each other, is delayed. | 06-20-2013 |
20130170856 | ELECTROPHOTOGRAPHIC PHOTORECEPTOR, PROCESS CARTRIDGE AND ELECTROPHOTOGRAPHIC PHOTORECEPTOR MANUFACTURING METHOD - An electrophotographic photoreceptor apparatus is provided and a method of manufacturing such a photoreceptor. The electrophotographic photoreceptor includes a cylindrical substrate. A photosensitive layer is formed on the cylindrical substrate. The photoreceptor has first surface corrugations with a pitch of 0.4 to 0.6 mm in an axial direction of the photoreceptor. Each of the first surface corrugations has a depth of 3.0 to 5.0 μm. | 07-04-2013 |
20130181328 | SEMICONDUCTOR DEVICE - A semiconductor device is disclosed that has enhanced its electric charge resistance. A first parallel p-n layer is disposed in an element activating part, and a second parallel p-n layer is disposed in an element peripheral edge part. An n | 07-18-2013 |
20130181334 | CONNECTOR AND RESIN-SEALED SEMICONDUCTOR DEVICE - A connector for electrically connecting a chip electrode of a semiconductor element to a lead constituting an external leading terminal of the chip electrode, includes a first connecting part having an interface joined to the chip electrode; a second connecting part having an interface joined to a base end part of the lead; and a plate-shape coupling part for connecting the first connecting part and the second connecting part to each other, and having a step formed on the interface of the first connecting part in a direction away from the chip electrode by a half blanking process. | 07-18-2013 |
20130186742 | METHOD FOR MANUFACTURING MAGNETIC RECORDING MEDIUM - A method for manufacturing a magnetic recording medium includes reducing and eliminating impurity gas present in a chamber. A magnetic recording layer is formed and an active material layer is also formed immediately below or immediately above the magnetic recording layer in respective chambers. The active material layer is formed in the same chamber or with a gate opened between the magnetic recording layer chamber and the active material layer chamber. | 07-25-2013 |
20130193531 | PHYSICAL QUANTITY SENSOR WITH SON STRUCTURE, AND MANUFACTURING METHOD THEREOF - Provided by some aspects of the invention is a relatively low-cost, relatively highly accurate physical quantity sensor, and a manufacturing method thereof, that relaxes thermal stress from an outer peripheral portion of a diaphragm in a silicon-on-nothing (“SON”) structure. By providing a stress relaxation region (trench groove) in an outer peripheral portion of a diaphragm in a SON structure, there can be, in some aspects of the invention, a benefit of relaxing the transmission to the diaphragm of thermal stress generated by the difference in linear expansion coefficient between a package and chip, and it is possible to relax the transmission to an electronic circuit disposed in an outer peripheral portion of mechanical stress generated by a measured pressure. As a result of this, it is possible to provide a highly accurate physical quantity sensor. | 08-01-2013 |
20130193762 | THREE-LEVEL POWER CONVERTING APPARATUS - In a three-level power converting apparatus, a U-phase control means of a first control means operates with a control power supply. A control power supply voltage decrease detecting means and a second control means operate with a gate-driving power supply. A U-phase control means conducts PWM operation using a modulation signal λ from a modulation signal generating means and a carrier signal from a carrier signal generating means and generates control signals for a plurality of switching elements. The second control means generates gate signals from the control signals. When the control power supply voltage decrease detecting means delivers a control power supply voltage decrease signal, the second control means generates the gate signals to turn ones of the switching elements OFF and turn others of the switching elements ON for a predetermined period of time. | 08-01-2013 |
20130194827 | SWITCHING POWER SUPPLY - A switching power supply of certain aspects of the invention includes a minimum dead time generating circuit that generates a minimum dead time from an OFF timing of an ON pulse detected from the voltage across an auxiliary winding of the transformer by a differentiating circuit. An ON width-determining means of a voltage control oscillator is started, after this minimum dead time, into operation to determine the ON width of the semiconductor switch. | 08-01-2013 |
20130196457 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In some aspects of the invention, a circuit pattern of a front surface structure is formed in a front surface of a semiconductor wafer and an alignment mark is formed on the front surface of a semiconductor wafer. A transparent supporting substrate is attached to the front surface of the semiconductor wafer by a transparent adhesive. Then, a resist is applied onto a rear surface of the semiconductor wafer. Then, the semiconductor wafer is mounted on a stage of an exposure apparatus, with the supporting substrate down. Then, the alignment mark formed on the front surface of the semiconductor wafer is recognized by a camera, and the positions of the semiconductor wafer and a photomask are aligned with each other. Then, the resist is patterned. Then, a circuit pattern is formed in the rear surface of the semiconductor wafer. | 08-01-2013 |