| Patent application number | Description | Published |
|---|
| 20090212321 | Trench IGBT with trench gates underneath contact areas of protection diodes - A trench PT IGBT (or NPT IGBT) having clamp diodes for ESD protection and prevention of shortage among gate, emitter and collector. The clamp diodes comprise multiple back-to-back Zener Diode composed of doped regions in a polysilicon layer doped with dopant ions of a first conductivity type next to a second conductivity type disposed on an insulation layer above said semiconductor power device. Trench gates are formed underneath the contact areas of the clamp diodes as the buffer layer for prevention of shortage. | 08-27-2009 |
| 20090315104 | Trench MOSFET with shallow trench structures - A trench MOSFET with shallow trench structure is disclosed. The improved structure resolves the problem of degradation of BV caused by the As Ion Implantation in termination surface and no additional mask is needed which further enhance the avalanche capability and reduce the manufacture cost. | 12-24-2009 |
| 20100123185 | MSD integrated circuits with trench contact structures for device shrinkage and performance improvement - A trench MOSFET device with embedded Schottky rectifier, Gate-Drain and Gate-Source diodes on single chip is formed to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for GS clamp diodes and avalanche protection for GD clamp diodes. | 05-20-2010 |
| 20100127323 | Trench MOSFET with trench source contact having copper wire bonding - A trench MOSFET with trench source contact structure having copper wire bonding is disclosed. By employing the proposed structure, die size can be shrunk into 30%˜70% with high cell density, and the spreading resistance is significantly reduce without adding expensive thick metal layer as prior art. To further reduce fabricating cost, copper wire bonding is used with requirement of thick Al alloys. | 05-27-2010 |
| 20100127324 | Trench MOSFET with terrace gate and self-aligned source trench contact - A trench MOSFET with terrace gate is disclosed for self-aligned contact. When refilling the gate trenches, the deposited polysilicon layer is higher than the sidewalls of the trenches to be used as a terrace gate of the MOSFET. The source contact width is determined by mesa width between two adjacent trenches minus 2 times of the oxide thickness deposited on the mesa instead of contact mask width which is wider than silicon contact width. Therefore, the position of source contact is still unchanged even if the misalignment of trench mask happens. At the same time, by using terrace gates, the Rg is thus reduced because the terrace gate provides more polysilicon as gate material than the conventional trench gate. | 05-27-2010 |
| 20100176445 | Metal schemes of trench MOSFET for copper bonding - A trench MOSFET with improved metal schemes is disclosed. The improved contact structure applies a buffer layer to minimize the bonding damage to semiconductor when bonding copper wire upon front source and gate metal without additional cost. | 07-15-2010 |
| 20100176446 | MOSFET with source contact in trench and integrated schottky diode - A trench semiconductor power device with integrated Schottky diode is disclosed. P+ regions and n+ source regions are alternately arranged in mesa and on top of trench sidewall along stripe source-body contact area between two adjacent trenches. By employing this structure, cell density increased remarkably without increasing contact resistance because top portion of gate trench sidewall is provided as source-body contact area. | 07-15-2010 |
| 20100200912 | Mosfets with terrace irench gate and improved source-body contact - A trench MOSFET with terrace gates and improved source-body contact structure is disclosed. When refilling the gate trenches, the deposited polysilicon layer is higher than the sidewalls of the trenches to be used as terrace gates of the MOSFET, and the improved source-body contact structure can enlarge the P+ area below to wrap the sidewalls and bottom of source-body contact within P body region to further enhance the avalanche capability. | 08-12-2010 |
| 20100237411 | LDMOS with double LDD and trenched drain - A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation thereon to provide a low resistance path for current flow without degrading breakdown voltage. At the same time, a P+ junction made by source mask is provided underneath source region to avoid latch-up effect from happening. | 09-23-2010 |
| 20100237414 | MSD integrated circuits with shallow trench - A trench MOSFET device with embedded Schottky rectifier, gate-drain and gate-source diodes on single chip is formed with shallow trench structure to achieve device shrinkage and performance improvement. The present semiconductor devices achieve low Vf and reverse leakage current for embedded Schottky rectifier, have overvoltage protection for GS clamp diodes and avalanche protection for GD clamp diodes. More particularly, gate charge of the present semiconductor device is reduced due to the shallow trench surrounded by an additional N doped area around the bottom while keeping Rds low enough and at the same time, maintaining BV at a certain level | 09-23-2010 |
| 20100264488 | Low Qgd trench MOSFET integrated with schottky rectifier - An integrated circuit includes a plurality of trench MOSFET and a plurality of trench Schottky rectifier. The integrated circuit further comprises: tilt-angle implanted body dopant regions surrounding a lower portion of all trench gates sidewalls for reducing Qgd; a source dopant region disposed below a bottom surface of all trench gates for functioning as a current path for preventing a resistance increased caused by the body dopant regions. | 10-21-2010 |
| 20100276728 | Avalanche capability improvement in power semiconductor devices having dummy cells around edge of active area - A structure of power semiconductor device having dummy cells around edge of active area is disclosed. The UIS test result of said improved structure shows that failed site after UIS test randomly located in active area which means avalanche capability of the semiconductor power device is enhanced by implementation of the dummy cells. | 11-04-2010 |
| 20100279478 | TRENCH MOSFET HAVING TRENCH CONTACTS INTEGRATED WITH TRENCH SCHOTTKY RECTIFIERS HAVING PLANAR CONTACTS - An integrated configuration comprising trench MOSFET having trench contacts and trench Schottky rectifier having planar contacts is disclosed. The trench contacts for trench MOSFET provide a lower specific on-resistance. Besides, for trench gate connection, planar gate contact is employed in the present invention to avoid shortage issue between gate and drain in shallow trench gate. Besides, W plugs filled into both trench contacts and planar contacts enhance the metal step coverage capability. | 11-04-2010 |
| 20100289059 | Power semiconductor devices integrated with clamp diodes having separated gate metal pads to avoid breakdown voltage degradation - A structure of power semiconductor device integrated with clamp diodes having separated gate metal pad is disclosed. The separated gate metal pads are wire bonded together on the gate lead frame. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon. | 11-18-2010 |
| 20100289073 | Trench MOSFETS with ESD Zener diode - A semiconductor power device with Zener diode for providing an electrostatic discharge (ESD) protection and a thick insulation layer to insulate the Zener diode from a doped body region. The semiconductor power device further includes a Nitride layer underneath the thick oxide layer working as a stopper layer for protecting the thin oxide layer and the body region underneath whereby the over-etch damage and punch-through issues in process steps are eliminated. | 11-18-2010 |
| 20100314681 | Power semiconductor devices integrated with clamp diodes sharing same gate metal pad - A structure of power semiconductor device integrated with clamp diodes sharing same gate metal pad is disclosed. This improved structure can prevent the degradation of breakdown voltage due to electric field in termination region blocked by polysilicon. | 12-16-2010 |
| 20110006362 | Trench MOSFET with on-resistance reduction - A trench MOSFET with on-resistance reduction comprises a trenched gate surrounded by a source region encompassed in a body region above a drain region disposed on a bottom surface of a substrate, wherein the said MOSFET further comprises a plurality of source-body contact trenches opened relative to a top surface into said source and body regions and each of the source-body contact trenches is filled with a contact metal plug as a source-body contact; a insulation layer covered over the top of the trenched gate, the body region and the source region; a front metal layer formed on a top surface of the MOSFET; wherein a low-resistivity phosphorus substrate and retrograded P-body formed by medium or high energy Ion Implantation to reduce Rds contribution from substrate and drift region. | 01-13-2011 |
| 20110008939 | Method of making a trench MOSFET having improved avalanche capability using three masks process - A method of forming trench MOSFET structure having improved avalanche capability is disclosed. In a preferred embodiment according to the present invention, only three masks are needed in the fabricating process, wherein the source region is formed by performing source Ion Implantation through contact open region of a thick contact interlayer for saving source mask. Furthermore, said source region has a doping concentration along channel region lower than along contact trench region, and source junction depth along channel region shallower than along contact trench, and source doping profile along surface of epitaxial layer has Guassian-distribution from trenched source-body contact to channel region. | 01-13-2011 |
| 20110070708 | Method for making trench MOSFET with shallow trench structures - A method for making trench MOSFET with shallow trench structures with thick trench bottom is disclosed. The improved method resolves the problem of deterioration of breakdown voltage resulted by LOCOS having a bird's beak shape introduced in prior art, and at the same time, the inventive device has a lower Qgd and lower Rds. | 03-24-2011 |
| 20110108913 | LDMOS WITH DOUBLE LDD AND TRENCHED DRAIN - A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation thereon to provide a low resistance path for current flow without degrading breakdown voltage. At the same time, a P+ junction made by source mask is provided underneath source region to avoid latch-up effect from happening. | 05-12-2011 |
| 20110165748 | LDMOS WITH DOUBLE LDD AND TRENCHED DRAIN - A LDMOS with double LDD and trenched drain is disclosed. According to some preferred embodiment of the present invention, the structure contains a double LDD region, including a high energy implantation to form lightly doped region and a low energy implantation thereon to provide a low resistance path for current flow without degrading breakdown voltage. At the same time, a P+ junction made by source mask is provided underneath source region to avoid latch-up effect from happening. | 07-07-2011 |
