| Patent application number | Description | Published |
|---|
| 20100176448 | Intergrated trench mosfet with trench schottky rectifier - An integrated circuit comprising trench MOSFET having trenched source-body contacts and trench Schottky rectifier having trenched anode contacts is disclosed. By employing the trenched contacts in trench MOSFET and trench Schottky rectifier, the integrated circuit is able to be shrunk to achieve low specific on-resistance for trench MOSFET, and low V | 07-15-2010 |
| 20110006363 | Trench MOSFET structures using three masks process - A trench MOSFET structure having improved avalanche capability is disclosed, wherein the source region is formed by performing source Ion Implantation through contact open region of a contact interlayer, and further diffused to optimize a trade-off between Rds and the avalanche capability. Thus, only three masks are needed in fabrication process, which are trench mask, contact mask and metal mask. Furthermore, said source region has a doping concentration along channel region lower than along contact trench region, and source junction depth along channel region shallower than along contact trench, and source doping profile along surface of epitaxial layer has Guassian-distribution from trenched source-body contact to channel region. | 01-13-2011 |
| 20110068389 | Trench MOSFET with high cell density - A trench MOSFET with high cell density is disclosed where there is a heavily doped contact region on the top surface of mesas between a pair of gate trenches. The present invention can prevent the degradation of avalanche capability when shrinking the device in prior art. | 03-24-2011 |
| 20110079844 | Trench mosfet with high cell density - A trench MOSFET with high cell density is disclosed where there is a heavily doped contact region on the top surface of mesas between a pair of gate trenches. The present invention can prevent the degradation of avalanche capability when shrinking the device in prior art. | 04-07-2011 |
| 20110121386 | Trench MOSFET with trenched floating gates as termination - A trench MOSFET comprising a plurality of transistor cells with a plurality of wide trenched floating gates as termination region is disclosed. The trenched floating gates have trench depth equal to or deeper than body junction depth of body regions in termination area. Each body region between two adjacent said trenched floating gates has floating voltage. | 05-26-2011 |
| 20110156139 | Super-Junction trench mosfet with resurf step oxide and the method to make the same - A super-junction trench MOSFET with Resurf Stepped Oxide is disclosed. The inventive structure can apply additional freedom for better optimization and manufacturing capability by tuning thick oxide thickness to minimize influence of charge imbalance, trapped charges, etc. . . . . Furthermore, the fabrication method can be implemented more reliably with lower cost. | 06-30-2011 |
| 20110169075 | Trench mosfet with ultra high cell density and manufacture thereof - A trench MOSFET structure with ultra high cell density is disclosed, wherein the source regions and the body regions are located in different regions to save the mesa area between every two adjacent gate trenches in the active area. Furthermore, the inventive trench MOSFET is composed of stripe cells to further increase cell packing density and decrease on resistance Rds between the drain region and the source region. | 07-14-2011 |
| 20110233605 | Semiconductor power device layout for stress reduction - A semiconductor power device layout with stripe cell structures is disclosed. The inventive structure applies horizontal gate trenches array and vertical gate trenches array alternatively arranged in single device (one or two directions) to balance out the stress caused from one direction. Furthermore, the inventive semiconductor power device provides gate connection trenches connecting to vertical gate trenches and/or horizontal trenches to reduce gate resistance Rg when gate trench length is long. | 09-29-2011 |
| 20110233606 | Avalanche capability improvement in power semiconductor devices - A power semiconductor device with improved avalanche capability structures is disclosed. By forming at least an avalanche capability enhancement doped regions with opposite conductivity type to epitaxial layer underneath an ohmic contact doped region which surrounds at least bottom of trenched contact filled with metal plug between two adjacent gate trenches, avalanche current is enhanced with the disclosed structures. | 09-29-2011 |
