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Fu, Hsinchu City
Cheng-Yang Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20100269103 | Method and device for multi-core instruction-set simulation - The present invention discloses a method for multi-core instruction-set simulation. The proposed method identifies the shared data segment and the dependency relationship between the different cores and thus effectively reduces the number of sync points and lowers the synchronization overhead, allowing multi-core instruction-set simulation to be performed more rapidly while ensuring that the simulation results are accurate. In addition, the present invention also discloses a device for multi-core instruction-set simulation. | 10-21-2010 |
Chien-Chung Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090161210 | MICROSCOPY SYSTEM WITH REVOLVABLE STAGE - A microscopy system includes an objective lens and a stage for holding a sample. The objective lens focuses incident light coming from one side of the objective lens to the sample disposed on the other side of the objective lens, and focuses an optical signal emitted from the sample to a photosensor disposed on the one side of the objective lens. The stage supports the sample and is configured to be revolvable about an axis, which is substantially perpendicular to an extending direction from the sample to the objective lens. | 06-25-2009 |
| 20090162246 | SAMPLE CARRYING APPARATUS CAPABLE OF REVOLVING SAMPLE - A sample carrying apparatus capable of revolving a sample includes a body and a revolvable structure. The body has a slot. The revolvable structure partially accommodated within the slot is pivotally connected to the body and is revolvable relative to the body. | 06-25-2009 |
| 20090163003 | MANUFACTURING METHOD OF SELF-SEPARATION LAYER - A manufacturing method of a self separation layer includes the steps of: forming a plurality of convex portions on a substrate; growing a main material layer on the convex portions; and separating the main material layer from the substrate. | 06-25-2009 |
| 20110019175 | LASER INTERFERENCE LITHOGRAPHY APPARATUS CAPABLE OF STITCHING SMALL EXPOSED AREAS INTO LARGE EXPOSED AREA - A laser interference lithography apparatus capable of stitching small exposed areas into a large exposed area includes a body, a laser beam supplying unit, a reflecting mechanism, an L-shaped fixing mechanism and a substrate stage. The laser beam supplying unit fixed onto the body provides a laser beam. The reflecting mechanism is movably and rotatably mounted on the body. The L-shaped fixing mechanism mounted on the body includes a first mounting seat and a second mounting seat. An upright first reflecting mirror is fixed to the first mounting seat. The second mounting seat connected to the first mounting seat fixes a horizontal mask, and is substantially perpendicular to the first mounting seat. The substrate stage, movably mounted on the body and disposed below the second mounting seat, supports a substrate. Thus, a large-area pattern formed by stitching small-area patterns may be obtained. | 01-27-2011 |
Chien-Ghung Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090159916 | LIGHT SOURCE WITH REFLECTIVE PATTERN STRUCTURE - A light source includes a substrate and a light-emitting unit. The substrate has a pattern structure, which includes a plurality of concave-convex structures. The light-emitting unit is formed on the pattern structure, and has a backlight surface connected to the pattern structure and a light outputting surface disposed opposite the backlight surface. The pattern structure reflects light, which is outputted from the light-emitting unit in a direction toward the backlight surface, to the light outputting surface. | 06-25-2009 |
Chien-Hao Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110149597 | LIGHT SOURCE MODULE - A light source module includes a casing, at least one reflective layer, a light bar, and at least one light source. The casing has a first side wall and a second side wall, and the first side wall and the second side wall define an opening. The opening faces a light incident surface of a light guide plate, and the first side wall and the second side wall are respectively positioned on two opposite sides of the opening. The reflective layer is formed inside the casing and adjacent to one of the first side wall and the second side wall. The light bar is disposed inside the casing and forms an angle with the light incident surface of the light guide plate. | 06-23-2011 |
Chih-Ming Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110116544 | METHODS OF INTRA PREDICTION, VIDEO ENCODER, AND VIDEO DECODER THEREOF - A method of intra prediction includes the steps of: receiving a video input having a plurality of blocks; encoding and reconstructing the plurality of blocks one by one; after encoding and reconstructing a designated block of the plurality of blocks to generate a designated reconstructed block, performing a deblocking operation upon the designated reconstructed block so as to generate a reference block with at least one sample being deblocked; and performing an intra prediction operation upon a current block by using samples of the reference block generated by the deblocking operation. | 05-19-2011 |
| 20110116546 | SINGLE PASS ADAPTIVE INTERPOLATION FILTER - A method for performing single-pass adaptive interpolation filtering in order to code a bitstream includes: receiving the video frames; selecting an interpolation filter from a competitive filter set; performing motion prediction on a current frame of the video frame utilizing the interpolation filter; encoding the current frame into the bitstream; and updating the competitive filter set. | 05-19-2011 |
| 20110176611 | METHODS FOR DECODER-SIDE MOTION VECTOR DERIVATION - An exemplary method for decoder-side motion vector derivation (DMVD) includes: checking a block size of a current block to be encoded and accordingly generating a checking result; and utilizing a DMVD module to refer to the checking result to control conveyance of first DMVD control information which is utilized for indicating whether a DMVD coding operation is employed to encode the current block. When the checking result indicates a predetermined criterion is satisfied, the first DMVD control information is sent in a bitstream; otherwise, the first DMVD control information is not sent. | 07-21-2011 |
| 20110176612 | Motion Prediction Method - The invention provides a motion prediction method. First, a plurality of candidate units corresponding to a current unit of a current frame is determined A plurality of motion vectors of the candidate units is then obtained. A plurality of temporal scaling factors of the candidate units is then calculated according to a plurality of temporal distances between a plurality of reference frames of the motion vectors and the current frame. The motion vectors of the candidate units are then scaled according to the temporal scaling factors to obtain a plurality of scaled motion vectors. Finally, a motion vector predictor for motion prediction of the current unit is then selected from the candidate units according to the scaled motion vectors. | 07-21-2011 |
| 20110176613 | Motion Prediction Method and Video Encoding Method - The invention provides a motion prediction method. First, a plurality of motion vector predictors is obtained to be included in a candidate set for motion prediction of a current unit of a current frame. Whether the current frame is a non-reference frame which is not referred to by other frames for motion prediction is then determined. When the current frame is not the non-reference frame, any motion vector predictor corresponding to a previously coded frame is removed from the candidate set, and a motion vector of the current unit is predicted according to the motion vector predictors of the candidate set. | 07-21-2011 |
Ching Hung Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080305594 | METHOD FOR FABRICATING NON-VOLATILE MEMORY - A method for fabricating a non-volatile memory is provided. Parallel-arranged isolation structures are disposed in a substrate and protrude from the surface of the substrate to define active regions. Mask layers intersecting the isolation structures are deposited on the substrate. The surface of the mask layers is higher than that of the isolation structures. Doped regions are formed in the substrate. Insulating layers are deposited on the substrate between the mask layers. The insulating layers and the mask layers have different etch selectivities. The mask layers are removed to expose the substrate. A tunneling dielectric layer is formed on the substrate. A floating gate is deposited on the substrate surrounded by the isolation structures and the insulating layers. The surface of the floating gate is lower than that of the isolation structures. An inter-gate dielectric layer is deposited on the substrate. A control gate is disposed between the insulating layers. | 12-11-2008 |
| 20090053870 | METHOD FOR PREPARING FLASH MEMORY STRUCTURES - A method for preparing a flash memory structure comprises the steps of forming a plurality of dielectric blocks having block sidewalls on a substrate, forming a plurality of first spacers on the block sidewalls of the dielectric blocks, removing a portion of the substrate not covered by the dielectric blocks and the first spacers to form a plurality of trenches in the substrate, performing a deposition process to form an isolation dielectric layer filling the trenches, removing the dielectric blocks to expose spacer sidewalls of the first spacers, forming a plurality of second spacers on the spacer sidewalls of the first spacers, and removing a portion of the substrate not covered by the first spacers, the second spacers and the isolation dielectric layer to form a plurality of second trenches in the substrate. | 02-26-2009 |
Chu-Yun Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090267176 | A METHOD FOR FORMING A MULTI-LAYER SHALLOW TRENCH ISOLATION STRUCTURE IN A SEMICONDUCTOR DEVICE - The disclosure describes a multi-layer shallow trench isolation structure in a semiconductor device. The shallow trench isolation structure may include a first void-free, doped oxide layer in the shallow trench, and a second void-free layer above the first doped oxide layer. The first layer may be formed by vapor deposition of precursors of a source of silicon, a source of oxygen and sources of doping materials and making the layer void-free by reflowing the initial layer by an annealing process. The second layer may be formed by vapor deposition of precursors of silicon and doping materials and making the layer void-free by reflowing the initial layer by an annealing process. Alternatively, the second layer may be a silicon oxide layer that may be formed by an atomic layer deposition method. The processing conditions for forming the two layers are different. | 10-29-2009 |
| 20100291751 | METHOD FOR FABRICATING AN ISOLATION STRUCTURE - The invention relates to integrated circuit fabrication, and more particularly to an electronic device with an isolation structure made having almost no void. An exemplary method for fabricating an isolation structure, comprising: providing a substrate; forming a trench in the substrate; partially filling the trench with a first silicon oxide; exposing a surface of the first silicon oxide to a vapor mixture comprising NH3 and a fluorine-containing compound; heating the substrate to a temperature between 100° C. to 200° C.; and filling the trench with a second silicon oxide, whereby the isolation structure made has almost no void. | 11-18-2010 |
| 20120091538 | FINFET AND METHOD OF FABRICATING THE SAME - The disclosure relates to a fin field effect transistor (FinFET). An exemplary structure for a FinFET comprises a substrate comprising a top surface; a first insulation region and a second insulation region over the substrate top surface comprising tapered top surfaces; a fin of the substrate extending above the substrate top surface between the first and second insulation regions, wherein the fin comprises a recessed portion having a top surface lower than the tapered top surfaces of the first and second insulation regions, wherein the fin comprises a non-recessed portion having a top surface higher than the tapered top surfaces; and a gate stack over the non-recessed portion of the fin. | 04-19-2012 |
Huan-Chun Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110006645 | STACKED-TYPE PIEZOELECTRIC DEVICE AND METHOD FOR MANUFACTURING THE SAME - A stacked-type piezoelectric device includes a stack of piezoelectric layers, plural conductive layers, a first contact hole, a second contact hole, and plural insulating portions. The piezoelectric layers are disposed between the conductive layers. The first and second contact holes penetrate the piezoelectric layers and the conductive layers, and each of first and second contact holes is filled with a conductive material. Every insulating portion is formed at one conductive layer. Two adjacent insulating portions are respectively formed at the outer rims of the first and second contact holes, to electrically isolate the conductive layer (in which the insulating portion is formed) from the conductive material in the contact hole. | 01-13-2011 |
I-Kang Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20080274746 | Scheduling Methods and Systems for Wireless Multi-Hop Relay Communications - A scheduling method for a wireless multi-hop relay communication system, wherein the communication system includes a base station dominating a plurality of relay stations, the scheduling method including separating the plurality of relay stations into N groups, N being a natural number, dividing a period for providing a service by the base station into N phases, wherein N is the number of the groups of the relay stations, serving the relay stations in a j | 11-06-2008 |
| 20090286465 | SCHEDULING METHODS AND SYSTEMS FOR MULTI-HOP RELAY IN WIRELESS COMMUNICATIONS - A scheduling technique for wireless multihop relay communication systems is provided. With spatial separation caused by the shadowing effect of surrounding buildings, a base station and its relay stations in a single cell are divided into several groups by following the rule that stations with severe potential interference are separated into different groups. The base station arranges the scheduling of these groups and serves these groups sequentially in the time domain. To take advantage of shadow effect, the same radio resources can be scheduled for relay stations within the same group due to the isolation of interfering signals. In the present invention, base stations and relay stations are equipped with directional antennas or sector antennas to further exploit the advantage of spatial separations. Different relay groups can also reuse the radio resource through appropriate power control. The cell capacity can be enhanced substantially because of aggressive radio resource reuse. | 11-19-2009 |
Ju-Ping Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120095777 | PATIENT LIFT APPARATUS AND PATIENT LIFT SERVICE DISPATCH SYSTEM - A patient lift apparatus designed to lift and transfer patients is provided. The patient lift apparatus includes a patient lift base and a modular patient support device removably connected to the patient lift base to support a patient. The patient lift base includes a cantilever element, a portal frame, three wheel assemblies, a hanging mechanism. The cantilever element is pivoted intersectionally with the portal frame. The three wheel assemblies are disposed at the bases of the cantilever element and the portal frame, as three bearing points. The hanging mechanism is pivoted to the top of the cantilever element and connected to the modular patient support device below. When the cantilever element and the portal frame are rotated relatively, the height, the shape and the positions of the bearing points of the patient lift apparatus are changed accordingly. | 04-19-2012 |
Ken Wen-Chien Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20120007156 | METHOD AND STRUCTURE TO REDUCE DARK CURRENT IN IMAGE SENSORS - A method to fabricate an image sensor includes providing a semiconductor substrate having a pixel region and a periphery region, forming a light sensing element on the pixel region, and forming at least one transistor in the pixel region and at least one transistor in the periphery region. The step of forming the at least one transistor in the pixel region and periphery region includes forming a gate electrode in the pixel region and periphery region, depositing a dielectric layer over the pixel region and periphery region, partially etching the dielectric layer to form sidewall spacers on the gate electrode and leaving a portion of the dielectric layer overlying the pixel region, and forming source/drain (S/D) regions by ion implantation. | 01-12-2012 |
Shih-Chuan Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20110078289 | NETWORK CONFIGURATION METHOD FOR NETWORKING DEVICE AND ASSOCIATED NETWORK CONFIGURATION MODULE - A network configuration method for a networking device and an associated network configuration module are provided to simplify the network configuration process of the networking device, thereby increasing user's convenience. The method connects a storage device to another networking device, so as to obtain network configuration information thereof and store it into the storage device. Next, the method connects the storage device to the networking device, and configures the networking device according to the network configuration information stored in the storage device. | 03-31-2011 |
Wen-Chi Fu, Hsinchu City TW
| Patent application number | Description | Published |
|---|---|---|
| 20090226027 | Structure of a voice coil assembly - A structure of a voice coil assembly includes a plate, a top board, suspending arms and fixtures. The plate has a top and two opposite sides. The top board is disposed on the top of the plate. The suspending arms extend from the two sides of the plate and are connected to the fixtures. A pair of resilient sections is provided between the suspending arms and the fixtures. The resilient sections are formed in a curved, arcuate or wavy shape. The suspending arm has a cross-section in a flat shape. | 09-10-2009 |
| 20090262959 | METHOD FOR MANUFACTURING A LOUDSPEAKER HAVING A VOICE COIL ASSEMBLY - A method for manufacturing a loudspeaker having a voice coil assembly includes the steps of: producing a flat voice coil; placing the voice coil into an injecting mold of a vibrating slab; forming a locating section to secure the voice coil; and assembling a loudspeaker by coupling the vibrating slab with a membrane together to produce a better sound quality. Furthermore, upper suspending arms provided on respective sides of the vibrating slab may be cut to lower the rigidity character of the vibrating slab and to increase the vibrating effect. | 10-22-2009 |