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Fu, Hsin-Chu
Chien-Hao Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100225624 | FLAT DISPLAY PANEL - A flat display panel includes a substrate, at least a driving chip, a plurality of control lines and conductive lines. The substrate has a display area and peripheral circuit area defined thereon. The driving chip is disposed in the peripheral circuit area, and has a plurality of pins. The pitches of adjacent pins are varied. The pitches of the pins in the central portion of the driving chip are smaller than the pitches of the pins in the border portion. The control lines and the conductive lines are disposed in the display area and the peripheral circuit area respectively, and the control lines are electrically connected to the conductive lines. | 09-09-2010 |
Chung-Lin Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100053232 | Image Optimization Method for Liquid Crystal Display Device - The present invention provides an image optimization method for performing data update on pixel units in the pixel matrix of the liquid crystal displays. The pixel matrix includes at least a first row and a second row, wherein the first row and the second row respectively include a plurality of pixel units. In one frame period, the image optimization method performs data update respectively on pixel units of the first row and the second row according to a first sequence. In another frame period, the image optimization method performs data update respectively on pixel units of the first row and the second row according to a second sequence. | 03-04-2010 |
| 20100110045 | Data Line Driving Method - A data line driving method adapted in a display panel driver circuit is provided. The display panel driver circuit comprises a plurality rows of gate lines and a plurality of data driver stages each corresponding to a data line group, wherein the data line driving method comprises the steps of: turning on the data driver stages in a first sequential order to input a first frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a first frame period; and turning on the data driver stages in a second sequential order which is opposed to the first sequential order to input a second frame data in the data line groups corresponding to the data driver stages in each gate line activation time within a second frame period; wherein the first and the second frame period are two interlaced periods next to each other. | 05-06-2010 |
Chu-Yun Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080303104 | Method of Fabricating Semiconductor Device Isolation Structure - A semiconductor device including reentrant isolation structures and a method for making such a device. A preferred embodiment comprises a substrate of semiconductor material forming at least one isolation structure having a reentrant profile and isolating one or more adjacent operational components. The reentrant profile of the at least one isolation structure is formed of substrate material and is created by ion implantation, preferably using oxygen ions applied at a number of different angles and energy levels. In another embodiment the present invention is a method of forming an isolation structure for a semiconductor device performing at least one oxygen ion implantation. | 12-11-2008 |
| 20090233410 | Self-Aligned Halo/Pocket Implantation for Reducing Leakage and Source/Drain Resistance in MOS Devices - A method of forming a semiconductor structure includes providing a semiconductor substrate; forming a gate dielectric over the semiconductor substrate, wherein the semiconductor substrate and a sidewall of the gate dielectric has a joint point; forming a gate electrode over the gate dielectric; forming a mask layer over the semiconductor substrate and the gate electrode, wherein a first portion of the mask layer adjacent the joint point is at least thinner than a second portion of the mask layer away from the joint point; after the step of forming the mask layer, performing a halo/pocket implantation to introduce a halo/pocket impurity into the semiconductor substrate; and removing the mask layer after the halo/pocket implantation. | 09-17-2009 |
| 20100216288 | Fabrication of Source/Drain Extensions with Ultra-Shallow Junctions - A method of forming an integrated circuit device includes providing a semiconductor substrate; forming a gate structure on the semiconductor substrate; and performing a pre-amorphized implantation (PAI) by implanting a first element selected from a group consisting essentially of indium and antimony to a top portion of the semiconductor substrate adjacent to the gate structure. The method further includes, after the step of performing the PAI, implanting a second element different from the first element into the top portion of the semiconductor substrate. The second element includes a p-type element when the first element includes indium, and includes an n-type element when the first element includes antimony. | 08-26-2010 |
Hsueh-Hung Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20080199978 | System and method for film stress and curvature gradient mapping for screening problematic wafers - A method of testing a wafer after a current top layer is formed over the wafer. Stress data is collected for the wafer after forming the current top layer. The stress data is derived from changes in wafer curvature. The stress data includes: stress-xx in an x direction and stress-yy in a y direction for each area of a set of finite areas on the wafer, the stress-xx and stress-yy both being derived from wafer-curvature-change-xx in the x direction for each area of the set of finite areas and from wafer-curvature-change-yy in the y direction for each area of the set of finite areas; and the stress-xy being derived from wafer-curvature-change-xy, wherein wafer-curvature-change-xy is a change in wafer twist in the x-y plane for each area of the set of finite areas. A stress gradient vector (and/or its norm) is calculated and used to evaluate the investigating single or multiple accumulated layer. | 08-21-2008 |
| 20100279436 | Inspection Method For Integrated Circuit Manufacturing Processes - The present disclosure provides a method for manufacturing integrated circuit devices including an electron beam inspection. The method includes forming a silicide region on a substrate. In an embodiment, the silicide region is formed to provide contact to a device feature such as a source or drain region. An electron beam scan is then performed on the substrate. The electron beam scan includes a first scan and a second scan. The first scan includes a lower landing energy than the second scan. In an embodiment, the first scan provides a dark silicide image analysis and a bright image analysis. In an embodiment, the second scan provides a dark silicide image analysis. The method continues to form a conductive plug after performing the electron beam scan. | 11-04-2010 |
Ken Wen-Chien Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090263674 | Forming Sensing Elements above a Semiconductor Substrate - An integrated circuit structure includes a substrate and a metallization layer over the substrate. The metallization layer includes a dielectric layer and metal lines in the dielectric layer. The integrated circuit structure further includes a sensing element over the metallization layer. The sensing element may be formed in passivation layers. | 10-22-2009 |
Kuang-Yu Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100127993 | LIQUID CRYSTAL DISPLAY APPARATUS WITH TOUCH INPUT FUNCTION - A liquid crystal display apparatus with touch input function includes a display unit coupling to a first scanning line, a touch transistor, a touch-sensing device, and a touch-detecting circuit coupling to a sensing line. The touch transistor includes a gate coupling to a second scanning line, a first terminal, and a second terminal coupling to the sensing line. The touch-sensing device includes a first conductor coupling to the first terminal of the touch transistor, a second conductor coupling to the first scanning line, and a touch conductor configured to electrically connect the first conductor and the second conductor when a sensing region of the liquid crystal display apparatus is touched. | 05-27-2010 |
| 20100251188 | Method of Determining Input Pattern and Computer Readable Storage Medium - A method of determining input pattern is adapted to be implemented on an electronic apparatus equipped with a touch panel and includes the steps of: detecting a plurality of boundary points between an input pattern inputted through the touch panel and a circumscribed polygon of the input pattern, detecting an area ratio of a polygon defined by the boundary points to the circumscribed polygon, and determining the shape of the input pattern at least according to the area ratio. The present invention also provides a computer readable storage medium having a program stored therein. When the program is executed which enables an electronic apparatus equipped with a touch panel to determine the shape and/or direction of an input pattern inputted through the touch panel. | 09-30-2010 |
Li-Min Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20090109357 | Liquid Crystal Display Device and Method for Driving the Same - A method for driving a liquid crystal display device includes the following steps. A driving circuit and a display unit are provided, the driving circuit comprising a plurality of data lines for transferring data voltages to drive the display unit, wherein each adjacent two of the data lines are supplied with voltages of opposite polarities, and all the data lines in one frame period are supplied with voltages of the same polarity. Two adjacent pixel areas are combined to form one pixel unit, wherein the two adjacent pixel areas are supplied with the same polarity, and the adjacent two pixel units are supplied with opposite polarities. | 04-30-2009 |
Shih Che Fu, Hsin-Chu TW
| Patent application number | Description | Published |
|---|---|---|
| 20100130059 | BACKLIGHT UNIT AND LAMP SOCKET THEREOF - A lamp socket includes a socket body, a flange and a plurality of support members. The flange is connected to the socket body and protrudes from the socket body horizontally. The plurality of support members are connected to the socket body. At least one engaging groove including at least two engaging widths is formed between the plurality of the support members and the flange, so as to secure the socket body to a bezel. | 05-27-2010 |
| 20100259149 | Lamp Device and Light Source Module with Coil Connecting Tube - A lamp device and a light source module are provided. The lamp device includes a lamp body and a coil connecting tube. The lamp body has an end portion and a lead wire extends from the end portion. The coil connecting tube is disposed corresponding to the end portion of the lamp body and electrically connecting to the lead wire for power supply purpose. The coil connecting tube winds about an axial direction of the lamp body and is capable of stretching or compressing along the axial direction. The light source module includes the lamp device and a lamp connector which has a power source portion being coupled to the coil connecting tube for power supply. | 10-14-2010 |
| 20100259704 | Backlight Module and Liquid Crystal Display - A backlight module includes a back plate having a through opening area, a carrying element disposed on the back plate, a circuit board disposed on the carrying element and at least one light emitting element disposed on the circuit board and corresponding to the through opening area. An LCD includes an LCD panel having a display area and a non-display area opposite to each other, a backlight module including a back plate, a circuit board and at least one light emitting element and a cover disposed at the LCD panel. The back plate disposed at the non-display area has a through opening area corresponding to the non-display area. The light emitting element is disposed on the circuit board and corresponding to the through opening area. The cover has a surface and covers the through opening area. The surface of the cover faces the through opening area and the non-display area. | 10-14-2010 |
| 20100323556 | BACKLIGHT UNIT AND LAMP SOCKET THEREOF - A lamp socket includes a socket body, a flange and a plurality of support members. The flange is connected to the socket body and protrudes from the socket body horizontally. The plurality of support members are connected to the socket body. At least one engaging groove including at least two engaging widths is formed between the plurality of the support members and the flange, so as to secure the socket body to a bezel. | 12-23-2010 |