| Patent application number | Description | Published |
|---|
| 20080230097 | Methods for Processing Wafer Surfaces Using Thin, High Velocity Fluid Layer - Among the many embodiment, in one embodiment, a method for processing a substrate is disclosed which includes generating a fluid layer on a surface of the substrate, the fluid layer defining a fluid meniscus. The generating includes moving a head in proximity to the surface, applying a fluid from the head to the surface while the head is in proximity to the surface of the substrate to define the fluid layer, and removing the fluid from the surface through the proximity head by a vacuum. The fluid travels along the fluid layer between the head and the substrate at a velocity that increases as the head is in closer proximity to the surface. | 09-25-2008 |
| 20080314756 | Methods and systems for three-dimensional integrated circuit through hole via gapfill and overburden removal - Presented are methods and systems for fabricating three-dimensional integrated circuits having large diameter through-hole vias. One embodiment of the present invention provides a method of processing a wafer having holes for through-hole vias. The method comprises plating a gapfill metal on the wafer. The method also comprises chemically or electrochemically deplating a portion of the overburden metal. The method further comprises using chemical mechanical planarization to planarize the gapfill metal and to remove the remaining overburden metal. Another embodiment of the present invention is an integrated system comprising a process chamber for containing the wafer, a plating component integrated with the process chamber, and a deplating component integrated with the process chamber. The plating component is configured to electrochemically plate a gapfill metal onto the wafer to a least partially fill the holes. The deplating component is configured to chemically or to electrochemically remove a portion of the overburden metal formed by the plating component. | 12-25-2008 |
| 20080315418 | Methods of post-contact back end of line through-hole via integration - Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. In one embodiment, the method comprises forming metal plug contacts through a hard mask and a premetal dielectric to transistors in the semiconductor. The method also includes etching a hole for a through-hole via through the hard mask to the semiconductor using a patterned photoresist process, removing the patterned photoresist and using a hard mask process to etch the hole to an amount into the semiconductor. The method further includes depositing a dielectric liner to isolate the hole from the semiconductor, depositing a gapfill metal to fill the hole, and planarizing the surface of the substrate to the hard mask. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention. | 12-25-2008 |
| 20080315422 | Methods and apparatuses for three dimensional integrated circuits - Methods and apparatuses for fabricating three-dimensional integrated circuits having through hole vias are provided. One aspect of the present invention is a method of gapfill for through hole vias for three-dimensional integrated circuits. The method comprises providing a semiconductor wafer having a plurality of holes for through hole vias and depositing a conformal metal layer to partially fill the holes to leave open voids. The method also includes purging the voids and cleaning the surface of the voids and using a dry deposition process to fill or close the voids. Another aspect of the present invention is an electronic device structure for a three-dimensional integrated circuit. | 12-25-2008 |
| 20090000044 | APPARATUSES AND METHODS FOR CLEANING A SUBSTRATE - An apparatus for use in processing a substrate includes a brush enclosure extending over a length. The brush enclosure is configured to be disposed over a surface of the substrate and has an open region that is configured to be disposed in proximity to the substrate. The open region extends over the length of the brush enclosure and enables foam from within the brush enclosure to contact the surface of the substrate. A substrate cleaning system and method for cleaning a substrate are also described. | 01-01-2009 |
| 20090065735 | CLEANING SOLUTION FORMULATIONS FOR SUBSTRATES - Presented is a cleaning solution according to one embodiment of the present invention that includes a corrosion inhibitor, a solubilizing agent, an oxygen scavenger, and a complexing agent also capable as a pH adjustor. Another embodiment of the present invention includes cleaning solutions that include a pH adjustor, an optional complexing agent, and a corrosion inhibitor. The cleaning solutions may have a solubilizing agent optionally present, may have a surfactant optionally present, and may have a dielectric etchant optionally present. | 03-12-2009 |
| 20090078282 | Method and Apparatus for Cleaning Semiconductor Wafers Using Compressed and/or Pressurized Foams, Bubbles, and/or Liquids - An apparatus and method are disclosed in which a semiconductor substrate having a surface containing contaminants is cleaned or otherwise subjected to chemical treatment using a foam. The semiconductor wafer is supported either on a stiff support (or a layer of foam) and foam is provided on the opposite surface of the semiconductor wafer while the semiconductor wafer is supported. The foam contacting the semiconductor wafer is pressurized using a form to produce a jammed foam. Relative movement between the form and the semiconductor wafer. such as oscillation parallel and/or perpendicular to the top surface of the semiconductor wafer. is then induced while the jammed foam is in contact with the semiconductor wafer to remove the undesired contaminants and/or otherwise chemically treat the surface of the semiconductor wafer using the foam. | 03-26-2009 |
| 20090114249 | System and method for contained chemical surface treatment - An apparatus, system and method for preparing a surface of a substrate using a proximity head includes applying a non-Newtonian fluid between the surface of the substrate and a head surface of the proximity head. The non-Newtonian fluid defines a containment wall along one or more sides between the head surface and the surface of the substrate. The one or more sides provided with the non-Newtonian fluid define a treatment region on the substrate between the head surface and the surface of the substrate. A Newtonian fluid is applied to the surface of the substrate through the proximity head, such that the applied Newtonian fluid is substantially contained in the treatment region defined by the containment wall. The contained Newtonian fluid aids in the removal of one or more contaminants from the surface of the substrate. In one example, the non-Newtonian fluid can also be used to create ambient controlled isolated regions, which can assist in controlled processing of surfaces within the regions. In an alternate example, a second non-Newtonian fluid is applied to the treatment region instead of the Newtonian fluid. The second non-Newtonian fluid acts on one or more contaminants on the surface of the substrate substantially removing them from the surface of the substrate. | 05-07-2009 |
| 20100009535 | METHODS AND SYSTEMS FOR BARRIER LAYER SURFACE PASSIVATION - This invention pertains to methods and systems for fabricating semiconductor devices. One aspect of the present invention is a method of depositing a gapfill copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the method includes forming the barrier layer on a surface of a substrate and subjecting the barrier layer to a process condition so as to form a removable passivated surface on the barrier layer. The method further includes removing the passivated surface from the barrier layer and depositing the gapfill copper layer onto the barrier layer. Another aspect of the present invention is an integrated system for depositing a copper layer onto a barrier layer for semiconductor device metallization. In one embodiment, the integrated system comprises at least one process module configured for barrier layer deposition and passivated surface formation and at least one other process module configured for passivated surface removal and deposition of copper onto the barrier layer. The system further includes at least one transfer module coupled so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment. | 01-14-2010 |
| 20100044867 | METHODS OF POST-CONTACT BACK END OF LINE THROUGH-HOLE VIA INTEGRATION - Presented are methods of fabricating three-dimensional integrated circuits that include post-contact back end of line through-hole via integration for the three-dimensional integrated circuits. Another aspect of the present invention includes three-dimensional integrated circuits fabricated according to methods of the present invention. | 02-25-2010 |
| 20100267229 | METHODS AND SYSTEMS FOR LOW INTERFACIAL OXIDE CONTACT BETWEEN BARRIER AND COPPER METALLIZATION - The present invention relates to methods and systems for the metallization of semiconductor devices. One aspect of the present invention is a method of depositing a copper layer onto a barrier layer so as to produce a substantially oxygen free interface therebetween. In one embodiment, the method includes providing a substantially oxide free surface of the barrier layer. The method also includes depositing an amount of atomic layer deposition (ALD) copper on the oxide free surface of the barrier layer effective to prevent oxidation of the barrier layer. The method further includes depositing a gapfill copper layer over the ALD copper. Another aspect of the present invention is a system for depositing a copper layer onto barrier layer so as to produce a substantially oxygen-free interface therebetween. In one embodiment, the integrated system includes at least one barrier deposition module. The system also includes an ALD copper deposition module configured to deposit copper by atomic layer deposition. The system further includes a copper gapfill module and at least one transfer module coupled to the at least one barrier deposition module and to the ALD copper deposition module. The transfer module is configured so that the substrate can be transferred between the modules substantially without exposure to an oxide-forming environment. | 10-21-2010 |
| 20100313918 | Apparatus for Cleaning Contaminants from Substrate - A substrate holder is defined to support a substrate. A rotating mechanism is defined to rotate the substrate holder. An applicator is defined to extend over the substrate holder to dispense a cleaning material onto a surface of the substrate when present on the substrate holder. The applicator is defined to apply a downward force to the cleaning material on the surface of the substrate. In one embodiment the cleaning material is gelatinous. | 12-16-2010 |
| 20100317556 | Two-Phase Substrate Cleaning Material - A cleaning compound is disclosed for removing particulate contaminants from a semiconductor substrate surface. The cleaning compound includes a liquid and carboxylic acid solid components dispersed in a substantially uniform manner in the liquid. A concentration of the carboxylic acid solid components in the liquid exceeds a solubility limit of the carboxylic acid solid components in the liquid. In one embodiment, a concentration of the carboxylic acid solid components in the liquid is within a range extending from about 3 percent by weight to about 5 percent by weight. In one embodiment, the carboxylic acid solid components are defined by a carbon number of at least four. The carboxylic acid solid components are defined to interact with the particulate contaminants on the semiconductor substrate surface to remove the particulate contaminants from the semiconductor substrate surface. The cleaning compound is viscous and may be formed as a gel. | 12-16-2010 |
| 20110061687 | Apparatus for Contained Chemical Surface Treatment - Apparatuses for preparing a surface of a substrate using a proximity head includes a carrier to hold and move the substrate along an axis and a proximity head having a head surface with a plurality of outlet ports defined thereon. The proximity head is defined to be positioned proximate and over the carrier and the surface of the substrate. A length of the head surface of the proximity head is defined to be greater than a diameter of the substrate and at least partially overlapping over the carrier when the substrate is present. The proximity head includes a first set of outlet ports in a first region defining a first applicator that is configured to apply a non-Newtonian fluid between a surface of the carrier and the head surface of the proximity head. A second set of outlet ports in a second region of the proximity head defines a second applicator that is configured to apply a first chemistry to the surface of the substrate when present. The second region is adjacent to the first region. A third set of outlet ports in a third region of the proximity head defines a third applicator that is configured to apply the non-Newtonian fluid between the head surface of the proximity head and the surface of the substrate when present. The third region is defined adjacent to the second region. A fourth set of outlet ports is defined in the second region of the proximity head to substantially remove the first chemistry from the surface of the substrate when present. | 03-17-2011 |
| 20110065273 | Methods of Fabricating a Barrier Layer Over Interconnect Structures in Atomic Deposition Environments - Methods of depositing a barrier layer on an interconnect structure in an atomic deposition environment are provided. One method includes depositing a barrier layer on the interconnect structure with a first nitrogen concentration during a first phase of deposition in the atomic deposition environment, The interconnect structure is formed in a dielectric layer. Then, continuing the deposition of the barrier layer on the interconnect structure with a second nitrogen concentration during a second phase deposition in the atomic deposition environment. The nitrogen concentration step-wisely decreases from the first nitrogen concentration in the first phase of the barrier layer to the second nitrogen concentration in the second phase of the barrier layer, and the first nitrogen concentration is highest where the barrier layer is in contact with the dielectric layer. A copper layer is then formed over the barrier layer, such that a nitrogen concentration in the barrier layer is lowest where the barrier layer is in contact with the copper layer. | 03-17-2011 |
| 20110143553 | INTEGRATED TOOL SETS AND PROCESS TO KEEP SUBSTRATE SURFACE WET DURING PLATING AND CLEAN IN FABRICATION OF ADVANCED NANO-ELECTRONIC DEVICES - Methods and systems for handling a substrate through processes including an integrated electroless deposition process includes processing a surface of the substrate in an electroless deposition module to deposit a layer over conductive features of the substrate using a deposition fluid. The surface of the substrate is then rinsed in the electroless deposition module with a rinsing fluid. The rinsing is controlled to prevent de-wetting of the surface so that a transfer film defined from the rinsing fluid remains coated over the surface of the substrate. The substrate is removed from the electroless deposition module while maintaining the transfer film over the surface of the substrate. The transfer film over the surface of the substrate prevents drying of the surface of the substrate so that the removing is wet. The substrate, once removed from the electroless deposition module, is moved into a post-deposition module while maintaining the transfer film over the surface of the substrate. | 06-16-2011 |
