Patent application number | Description | Published |
20110267866 | EXTENSIBLE THREE DIMENSIONAL CIRCUIT HAVING PARALLEL ARRAY CHANNELS - An extensible three dimensional circuit having parallel array channels includes an access layer and crossbar array layers overlying the access layer and being electrically connected to the access layer. The crossbar array layers include parallel channels, the parallel channels being formed from two classes of vias, the first class being pillar vias connected to relatively short stub lines, and the second class being traveling-line vias connected to long lines that travel away from the via; pillar vias and traveling-line vias being configured to connect to crossing lines such that each crossing point between the lines is uniquely addressed by one pillar via and one traveling-line via. Programmable crosspoint devices are disposed between the crossing lines. | 11-03-2011 |
20110286259 | Reading Memory Elements Within a Crossbar Array - A method for reading the state of a memory element within a crossbar memory array includes storing a first electric current sensed from a half-selected target memory element within the crossbar memory array; and outputting a final electric current based on the stored first electric current and a second electric current sensed from the target memory element when the target memory element is fully selected. | 11-24-2011 |
20110292712 | READING A MEMORY ELEMENT WITHIN A CROSSBAR ARRAY - A method for reading a memory element within a crossbar array, the method including selecting a column line connected to a target memory element of the crossbar array by applying a supply voltage to a source follower, a gate terminal of the source follower connected to the column line; applying bias voltages to row lines of the crossbar array; storing an output voltage of the source follower in a storage element; applying a sense voltage to a row line connected to the target memory element; and outputting a difference between the voltage stored in the storage element and an output voltage of the source follower while the sense voltage is applied to the row line. | 12-01-2011 |
20110292713 | Reading a Memory Element Within a Crossbar Array - A method for reading a memory element within a crossbar array includes switching a column line connected to a target memory element of the crossbar array to connected to an input of a current mirror; applying an error voltage to unselected rows of the crossbar array; applying a sense voltage to a row line connected to the target memory element; and measuring an output current of the current mirror. | 12-01-2011 |
20110305063 | SENSE AMPLIFIER FOR READING A CROSSBAR MEMORY ARRAY - A sense amplifier for reading the data stored in a crossbar array includes a storage transistor to store a first voltage resulting from an electric current from a column line connected to a target memory element while the target memory element is half-selected, the first voltage resulting from bias voltages applied to row lines not connected to the target memory element; a mirror transistor to store a second voltage resulting from an electric current from the column line while the target memory element is fully selected; a cross-coupled inverter circuit having a first branch connected to the storage transistor and a second branch connected to the mirror transistor; and an output node to output a signal from the first branch of the cross-coupled inverter circuit, the signal based on a comparison between the first voltage stored in the storage transistor and the second voltage across the mirror transistor. | 12-15-2011 |
20120057390 | MEMORY ARRAY WITH WRITE FEEDBACK - A memory array with write feedback includes a number of row lines intersecting a number of column lines, a memory element connected between one of the row lines and one of the column lines, an electrical condition supply to be selectively applied to one of the row lines; and a feedback control loop to control an electrical condition supplied by the electrical condition supply. A method for setting the state of a memory element within a memory array includes applying an electrical condition to the memory element within the memory array, sensing a resistive state of the memory element, and controlling the electrical condition based on the sensed resistive state to cause the memory element to reach a target resistance. | 03-08-2012 |
20120327698 | INTERCONNECTION ARCHITECTURE FOR MEMORY STRUCTURES - An interconnect architecture for connecting read/write circuitry to a memory structure, the interconnect architecture includes a switching layer having a number of access switches arranged in at least one set of two offset switch blocks, the access switches being connected to a first set of parallel wire tracks and a second set of parallel wire tracks intersecting the first set of parallel wire tracks; and a routing layer connecting the switches to a number of access vias of the memory structure; in which four wire tracks are used to select a programmable device of the memory structure. | 12-27-2012 |
20130039111 | CONNECTION AND ADDRESSING OF MULTI-PLANE CROSSPOINT DEVICES - A multi-plane circuit structure has at least a first circuit plane and a second circuit plane, and each circuit plane has a plurality of row wire segments, a plurality of column wire segments, and a plurality of crosspoint devices formed at intersections of the row wire segments and the column wire segments. The row and column wire segments have a segment length for forming a preselected number of crosspoint devices thereon. Each row wire segment in the second circuit plane is connected to a row wire segment in the first circuit plane with no offset in a row direction and in a column direction, and each column wire segment in the second circuit plane is connected to a column wire segment in the first circuit plane with an offset length in both the row direction and the column direction. The offset length corresponds to half of the preselected number of crosspoint devices. | 02-14-2013 |
20130207069 | METAL-INSULATOR TRANSITION SWITCHING DEVICES - A metal-insulator transition switching device includes a first electrode and a second electrode. A channel region which includes a bulk metal-insulator transition material separates the first electrode and the second electrode. A method for forming a metal-insulator transition switching device includes depositing a layer of bulk metal-insulator transition material in between a first electrode and a second electrode to form a channel region and forming a gate electrode operatively connected to the channel region. | 08-15-2013 |
20130223132 | CIRCUIT AND METHOD FOR READING A RESISTIVE SWITCHING DEVICE IN AN ARRAY - A read circuit for sensing a resistive state of a resistive switching device in a crosspoint array has an equipotential preamplifier connected to a selected column line of the resistive switching device in the array to deliver a read current while maintaining the selected column line at a reference voltage near a biasing voltage applied to unselected row lines of the array. The read circuit includes a reference voltage generation component for generating the reference voltage for the equipotential preamplifier. The reference voltage generation component samples the biasing voltage via the selected column line and adds a small increment to a sampled biasing voltage to form the reference voltage. | 08-29-2013 |
20130223134 | METHOD AND CIRCUIT FOR SWITCHING A MEMRISTIVE DEVICE IN AN ARRAY - A method of switching a memristive device in a two-dimensional array senses a leakage current through the two-dimensional array when a voltage of half of a switching voltage is applied to a row line of the memristive device. A leakage compensation current is generated according to the sensed leakage current, and a switching current ramp is also generated. The leakage compensation current and the switching current ramp are combined to form a combined switching current, which is applied to the row line of the memristive device. When a resistance of the memristive device reaches a target value, the combined switching current is removed from the row line. | 08-29-2013 |
20130235651 | METHOD AND CIRCUIT FOR SWITCHING A MEMRISTIVE DEVICE - A method of switching a memristive device applies a current ramp of a selected polarity to the memristive device. The resistance of the device during the current ramp is monitored. When the resistance of the memristive device reaches the target value, the current ramp is removed. | 09-12-2013 |
20140014891 | DUAL-PLANE MEMORY ARRAY - A memory array has a plurality of conductor structures. Each conductor structure has a top wire segment extending in a first direction, a middle wire segment extending in a second direction at an angle from the first direction, a bottom wire segment extending in a direction opposite to the first direction, and a via connecting the top, middle, and bottom wire segments. A plurality of memory cells in an upper plane of the memory array are formed at intersections of the middle wire segment of each conductor structure with the top wire segments of neighboring conductor structures, and a plurality of memory cells in a lower plane are formed at intersections of the middle wire segment of each conductor structure with the bottom wire segments of neighboring conductor structures. | 01-16-2014 |
20140153318 | CIRCUIT AND METHOD FOR READING A RESISTIVE SWITCHING DEVICE IN AN ARRAY - A read circuit for sensing a resistance state of a resistive switching device in a crosspoint array utilizes an equipotential preamplifier connected to a selected column line of the resistive switching device in the array. The equipotential preamplifier delivers a sense current while maintaining the selected column line at a reference voltage near a biasing voltage applied to unselected row lines of the array. The read circuit has a reference current source for generating a sense reference current, and a current comparator connected to evaluate the sense current delivered by the equipotential preamplifier against the sense reference current and generating an output signal indicative of the resistance state of the resistive switching device. | 06-05-2014 |
20140198559 | CIRCUIT AND METHOD FOR READING A RESISTIVE SWITCHING DEVICE IN AN ARRAY - A read circuit for sensing a resistance state of a resistive switching device in a crosspoint array utilizes a transimpedance equipotential preamplifier connected to a selected column line of the resistive switching device in the array. The equipotential preamplifier delivers a sense current while maintaining the selected column line at a reference voltage near a biasing voltage applied to unselected row lines of the array. A reference resistor is selectively connected to the equipotential preamplifier for setting a reference current, wherein the equipotential preamplifier is set to produce a preamplifier output voltage having a magnitude depending on whether the sense current is smaller or greater than the reference current. A voltage comparator is connected to the equipotential preamplifier to compare the preamplifier output voltage with a setup reference voltage and generate a comparator output voltage indicative of the resistance state of the resistive switching device. | 07-17-2014 |
20140204651 | READING A MEMORY ELEMENT WITHIN A CROSSBAR ARRAY - A method for reading a memory element within a crossbar array includes switching a column line connected to a target memory element of the crossbar array to connected to an input of a current mirror; applying an error voltage to unselected rows of the crossbar array; applying a sense voltage to a row line connected to the target memory element; and outputting a current with said current mirror. | 07-24-2014 |
20140215143 | CROSSBAR MEMORY TO PROVIDE CONTENT ADDRESSABLE FUNCTIONALITY - Examples disclose a crossbar memory with a first crossbar to write data values corresponding to a word. The crossbar memory further comprises a second crossbar, substantially parallel to the first crossbar, to receive voltage for activation of data values across the second crossbar. Additionally, the examples of the crossbar memory provide an output line that interconnects with the crossbars at junctions, to read the data values at the junctions. Further, the examples of the crossbar memory provide a logic module to determine whether the second crossbar data values correspond to the word written in the first crossbar. | 07-31-2014 |
20140347910 | READING MEMORY ELEMENTS WITHIN A CROSSBAR ARRAY - A method for reading the state of a memory element within a crossbar memory array includes storing a first electric current sensed from a half-selected target memory element within the crossbar memory array; and outputting a final electric current based on the stored first electric current and a second electric current sensed from the target memory element when the target memory element is fully selected. | 11-27-2014 |