| Patent application number | Description | Published |
|---|
| 20090032933 | REDISTRIBUTED CHIP PACKAGING WITH THERMAL CONTACT TO DEVICE BACKSIDE - Redistributed Chip Packaging with Thermal Contact to Device Backside An integrated circuit assembly includes a panel including an semiconductor device at least partially surrounded by an encapsulant. A panel upper surface and a device active surface are substantially coplanar. The assembly further includes one or more interconnect layers overlying the panel upper surface. Each of the interconnect layers includes an insulating film having contacts formed therein an interconnect metallization formed thereon. A lower surface of the panel is substantially coplanar with either a backside of the device or a lower surface of a thermally and electrically conductive slab that has an upper surface in thermal contact with the device backside. The assembly may also include a set of panel vias. The panel vias are thermally and electrically conductive conduits extending through the panel between the interconnect layer and suitable for bonding with a land grid array (LGA) or other contact structure of an underlying circuit board. | 02-05-2009 |
| 20090057849 | INTERCONNECT IN A MULTI-ELEMENT PACKAGE - A packaged semiconductor device includes an interconnect layer over a first side of a polymer layer, a semiconductor device surrounded on at least three sides by the polymer layer and coupled to the interconnect layer, a first conductive element over a second side of the polymer layer, wherein the second side is opposite the first side, and a connector block within the polymer layer. The connector block has at least one electrical path extending from a first surface of the connector block to a second surface of the connector block. The at least one electrical path electrically couples the interconnect layer to the first conductive element. A method of forming the packaged semiconductor device is also described. | 03-05-2009 |
| 20090072357 | Integrated shielding process for precision high density module packaging - An electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules ( | 03-19-2009 |
| 20100006988 | Integrated Conformal Shielding Method and Process Using Redistributed Chip Packaging - An integrated conformal electromagnetic interference (EMI) and/or electromagnetic radiation shield is formed on a plurality of encapsulated modules by attaching a plurality of modules ( | 01-14-2010 |
| 20100078760 | INTEGRATED CIRCUIT MODULE WITH INTEGRATED PASSIVE DEVICE - A disclosed integrated circuit (IC) module includes an IC panel and multi level circuit structure, referred to as an IPD structure, overlying an upper surface of the IC panel. The IC panel includes an electrically conductive embedded ground plane (EGP), an integrated circuit (IC) die, and an encapsulating material. The EGP is a substantially planar structure that includes or defines a plurality of cavities. The EGP may include or define an IC cavity and an IPD cavity. The IC die may be positioned within the IC cavity such that a perimeter of the IC cavity surrounds the IC die. The IPD structure may define or include a passive device such as an inductor. The passive device may be positioned or located overlying the void in the EGP. | 04-01-2010 |
