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Franz Kreupl

Franz Kreupl, Munich DE

Patent application numberDescriptionPublished
20080315430NANOWIRE VIAS - A method of fabricating an integrated circuit including arranging a nanowire with a first end portion thereof at a first contact surface of a first electrical contact and with a second end portion sticking up from the first contact surface, and embedding at least part of the nanowire in dielectric material.12-25-2008
20090199043ERROR CORRECTION IN AN INTEGRATED CIRCUIT WITH AN ARRAY OF MEMORY CELLS - An integrated circuit includes an array of memory cells, and an error correction code circuit configured to correct errors in data read from the array based at least in part on a map that identifies locations of erratic memory cells in the array.08-06-2009
20090212438INTEGRATED CIRCUIT DEVICE COMPRISING CONDUCTIVE VIAS AND METHOD OF MAKING THE SAME - A semiconductor substrate for an integrated circuit device comprises at least one insulating substrate region being formed of a cohesive insulating material. The insulating substrate region includes at least two conductive vias extending at least between a first surface and a second surface of the insulating substrate region.08-27-2009
20090256258SEMICONDUCTOR CHIP WITH INTEGRATED VIA - An integrated circuit with a substrate with a lower and an upper surface is described. A via extends between the upper and the lower surface of the substrate. The via contains a conductive filling material that comprises carbon.10-15-2009
20090268513MEMORY DEVICE WITH DIFFERENT TYPES OF PHASE CHANGE MEMORY - A memory includes a first memory device including an array of phase changing memory cells. The first memory device is of a first memory type. The integrated circuit includes a second memory device including an array of phase changing memory cells. The second memory device is of a second memory type that is different than the first memory type. The first and second memory devices are packaged together into a single memory device.10-29-2009
20090321706Resistive Memory Devices with Improved Resistive Changing Elements - An integrated circuit includes a memory cell with a resistance changing memory element. The resistance changing memory element includes a first electrode, a second electrode, and a resistivity changing material disposed between the first and second electrodes, where the resistivity changing material is configured to change resistive states in response to application of a voltage or current to the first and second electrodes. In addition, at least one of the first electrode and the second electrode comprises an insulator material including a self-assembled electrically conductive element formed within the insulator material. The self-assembled electrically conductive element formed within the insulator material remains stable throughout the operation of switching the resistivity changing material to different resistive states.12-31-2009
20100084741Integrated Circuit - According to an embodiment, an integrated circuit including a plurality of resistance changing memory cells is disclosed. Each memory cell includes a first electrode, a second electrode and resistance changing memory element arranged between the first electrode and the second electrode. A front surface area of an end section of the first electrode that faces the resistance changing memory element is smaller than a front surface area of an end section of the second electrode that faces the resistance changing memory element.04-08-2010

Patent applications by Franz Kreupl, Munich DE

Franz Kreupl, Munchen DE

Patent application numberDescriptionPublished
20080296557Semiconductor Power Switch and Method for Producing a Semiconductor Power Switch - A semiconductor power switch and method is disclosed. In one embodiment the semiconductor power switch has a source contact, a drain contact, a semiconductor structure which is provided between the source contact and the drain contact, and a gate which can be used to control a current flow through the semiconductor structure between the source contact and the drain contact. The semiconductor structure has a plurality of nanowires which are connected in parallel and are arranged in such a manner that each nanowire forms an electrical connection between the source contact and the drain contact.12-04-2008
20090108248INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUCTIVE CLADDING - An integrated circuit includes an array of memory cells and a doped semiconductor line formed in a semiconductor substrate. The doped semiconductor line is coupled to a row of memory cells. The integrated circuit includes conductive cladding contacting the doped semiconductor line.04-30-2009

Patent applications by Franz Kreupl, Munchen DE

Franz Kreupl, Mountain View, CA US

Patent application numberDescriptionPublished
20110140064CARBON/TUNNELING-BARRIER/CARBON DIODE - A carbon/tunneling-barrier/carbon diode and method for forming the same are disclosed. The carbon/tunneling-barrier/carbon may be used as a steering element in a memory array. Each memory cell in the memory array may include a reversible resistivity-switching element and a carbon/tunneling-barrier/carbon diode as the steering element. The tunneling-barrier may include a semiconductor or an insulator. Thus, the diode may be a carbon/semiconductor/carbon diode. The semiconductor in the diode may be intrinsic or doped. The semiconductor may be depleted when the diode is under equilibrium conditions. For example, the semiconductor may be lightly doped such that the depletion region extends from one end of the semiconductor region to the other end. The diode may be a carbon/insulator/carbon diode.06-16-2011