| Patent application number | Description | Published |
|---|
| 20080258210 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component resistant to the formation of a parasitic bipolar transistor and a method for manufacturing the semiconductor component using a reduced number of masking steps. A semiconductor material of N-type conductivity having a region of P-type conductivity is provided. A doped region of N-type conductivity is formed in the region of P-type conductivity. Trenches are formed in a semiconductor material and extend through the regions of N-type and P-type conductivities. A field oxide is formed from the semiconductor material such that portions of the trenches extend under the field oxide. The field oxide serves as an implant mask in the formation of source regions. Body contact regions are formed from the semiconductor material and an electrical conductor is formed in contact with the source and body regions. An electrical conductor is formed in contact with the backside of the semiconductor material. | 10-23-2008 |
| 20080277694 | SEMICONDUCTOR COMPONENT AND METHOD OF MANUFACTURE - A semiconductor component that includes a Schottky device, an edge termination structure, a non-Schottky semiconductor device, combinations thereof and a method of manufacturing the semiconductor component. A semiconductor material includes a first epitaxial layer disposed on a semiconductor substrate and a second epitaxial layer disposed on the first epitaxial layer. The second epitaxial layer has a higher resistivity than the semiconductor substrate. A Schottky device and a non-Schottky semiconductor device are manufactured from the second epitaxial layer. In accordance with another embodiment, a semiconductor material includes an epitaxial layer disposed over a semiconductor substrate. The epitaxial layer has a higher resistivity than the semiconductor substrate. A doped region is formed in the epitaxial layer. A Schottky device and a non-Schottky semiconductor device are manufactured from the epitaxial layer. | 11-13-2008 |
| 20090045440 | METHOD OF FORMING AN MOS TRANSISTOR AND STRUCTURE THEREFOR - In one embodiment, an MOS transistor is formed with trench gates. The gate structure of the trench gates generally has a first insulator that has a first thickness in one region of the gate and a second thickness in a second region of the gate. | 02-19-2009 |
| 20090079001 | MULTI-CHANNEL ESD DEVICE AND METHOD THEREFOR - In one embodiment, an ESD device is configured to include a zener diode and a P-N diode. | 03-26-2009 |
| 20090079022 | METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR - In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage. | 03-26-2009 |
| 20090162988 | METHOD OF FORMING LOW CAPACITANCE ESD DEVICE AND STRUCTURE THEREFOR - In one embodiment, the ESD device uses highly doped P and N regions deep within the ESD device to form a zener diode that has a controlled breakdown voltage. | 06-25-2009 |
| 20090250720 | TRANSIENT VOLTAGE SUPPRESSOR AND METHODS - Transient voltage suppressor and method for manufacturing the transient voltage suppressor having a dopant or carrier concentration in a portion of a gate region near a Zener region that is different from a dopant concentration in a portion of a gate region that is away from the Zener region. | 10-08-2009 |
| 20100133610 | METHOD OF FORMING AN INTEGRATED POWER DEVICE AND STRUCTURE - In one embodiment, a vertical power transistor is formed on a semiconductor substrate with other transistors. A portion of the semiconductor layer underlying the vertical power transistor is doped to provide a low on-resistance for the vertical power transistor. | 06-03-2010 |
| 20100237409 | SEMICONDUCTOR COMPONENT - A semiconductor component resistant to the formation of a parasitic bipolar transistor and a method for manufacturing the semiconductor component using a reduced number of masking steps. A semiconductor material of N-type conductivity having a region of P-type conductivity is provided. A doped region of N-type conductivity is formed in the region of P-type conductivity. Trenches are formed in a semiconductor material and extend through the regions of N-type and P-type conductivities. A field oxide is formed from the semiconductor material such that portions of the trenches extend under the field oxide. The field oxide serves as an implant mask in the formation of source regions. Body contact regions are formed from the semiconductor material and an electrical conductor is formed in contact with the source and body regions. An electrical conductor is formed in contact with the backside of the semiconductor material. | 09-23-2010 |
| 20110127573 | BI-DIRECTIONAL TRANSISTOR WITH BY-PASS PATH AND METHOD THEREFOR - In one embodiment, a transistor is formed to have a first current flow path to selectively conduct current in both directions through the transistor and to have a second current flow path to selectively conduct current in one direction. | 06-02-2011 |
