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Flatley
Thomas P. Flatley, Huntington, MD US
| Patent application number | Description | Published |
|---|---|---|
| 20110107158 | RADIATION-HARDENED PROCESSING SYSTEM - A processing system including an FPGA having a dual port RAM and for use in hostile environments. The FPGA includes three portions: a C&DH portion; a first scratch pad portion receiving a first set of data, processing the first set of data, and outputting a first set of processed data to a first location of the RAM; and a second scratch pad portion receiving a second set of data identical to the first set of data, processing the second set of data in the same way that the first set of data is processed, and outputting a second set of processed data to a second location of the RAM. The C&DH portion compares the first set of processed data to the second set of processed data and, if the first set of processed data is the same as the second set of processed data, outputs one set of processed data. | 05-05-2011 |
Thomas P. Flatley, Hungtington, MD US
| Patent application number | Description | Published |
|---|---|---|
| 20110099421 | RADIATION-HARDENED HYBRID PROCESSOR - A processing system having a small form factor and configured to connect to an external platform. The processing system includes input interfaces configured to receive an input signal to be processed; a radiation tolerant field programmable gate array including processors configured to process the input signal; memory containing reconfigurable instructions for the processors that, when the reconfigurable instructions are executed, process the input signal and obtain the output signal; output interfaces configured to send the output signal to the external platform; and a reset logic element configured to selectively reset the field programmable gate array and at least one of the processors in response to a reset command. The input interfaces include at least one gigabit Ethernet interface and at least one space-rated balanced voltage digital interface circuit. The output interfaces include at least one serial advanced technology attachment interface and at least one space-rated balanced voltage digital interface circuit. | 04-28-2011 |
Thomas P. Flatley, Huntingtown, MD US
| Patent application number | Description | Published |
|---|---|---|
| 20110078498 | RADIATION-HARDENED HYBRID PROCESSOR - A method of providing radiation hardening for a modular computational component having a first memory and a second memory and being connectable to an external platform comprises providing a radiation tolerant field programmable gate array having a pair of processors, processing data from the external platform according to instructions stored in the first memory, and executing instructions stored in the second memory to provide radiation hardening by software. The instructions comprise instructions to execute identical processing operations for the data of the external platform in each of the pair of processors, instructions to identify a data corruption indicia for each of the identical processing operations, instructions to compare the identified data corruption indicia, and instructions to repeat the identical processing operations if the data corruption indicia show corrupted data. | 03-31-2011 |
