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Fiorenza, US
Giovanni Fiorenza, Pomona, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20080201681 | COMPUTER PROGRAM PRODUCTS FOR DETERMINING STOPPING POWERS OF DESIGN STRUCTURES WITH RESPECT TO A TRAVELING PARTICLE - A computer program product, comprising a computer usable medium having a computer readable program code embodied therein, said computer readable program code including an algorithm adapted to implement a method including the following steps. First, design information of the design structure is provided including a back-end-of-line layer of the integrated circuit which includes N interconnect layers, N being a positive integer. Next, each interconnect layer of the N interconnect layers is divided into multiple pixels. Next, a first path of a traveling particle in a first interconnect layer of the N interconnect layers is determined. Next, M path pixels of the multiple pixels of the first interconnect layer on the first path of the traveling particle are identified, M being a positive integer. Next, a first loss energy lost by the traveling particle due to its completely passing through a first pixel of the M path pixels is determined. | 08-21-2008 |
James Fiorenza, Wilmington, MA US
| Patent application number | Description | Published |
|---|---|---|
| 20090042344 | InP-Based Transistor Fabrication - Methods of forming structures that include InP-based materials, such as a transistor operating as an inversion-type, enhancement-mode device. A dielectric layer may be deposited by ALD over a semiconductor layer including In and P. A channel layer may be formed above a buffer layer having a lattice constant similar to a lattice constant of InP, the buffer layer being formed over a substrate having a lattice constant different from a lattice constant of InP. | 02-12-2009 |
| 20090065047 | Multi-Junction Solar Cells - Solar cell structures including multiple sub-cells that incorporate different materials that may have different lattice constants. In some embodiments, solar cell devices include several photovoltaic junctions. | 03-12-2009 |
| 20100216277 | Formation of Devices by Epitaxial Layer Overgrowth - Methods and structures are provided for formation of devices, e.g., solar cells, on substrates including, e.g., lattice-mismatched materials, by the use of aspect ratio trapping (ART) and epitaxial layer overgrowth (ELO). In general, in a first aspect, embodiments of the invention may include a method of forming a structure. The method includes forming a first opening in a masking layer disposed over a substrate that includes a first semiconductor material. A first layer, which includes a second semi-conductor material lattice-mismatched to the first semiconductor material, is formed within the first opening. The first layer has a thickness sufficient to extend above a top surface of the masking layer. A second layer, which includes the second semiconductor material, is formed on the first layer and over at least a portion of the masking layer. A vertical growth rate of the first layer is greater than a lateral growth rate of the first layer and a lateral growth rate of the second layer is greater than a vertical growth rate of the second layer. | 08-26-2010 |
| 20110049568 | Lattice-Mismatched Semiconductor Structures with Reduced Dislocation Defect Densities and Related Methods for Device Fabrication - Fabrication of monolithic lattice-mismatched semiconductor heterostructures with limited area regions having upper portions substantially exhausted of threading dislocations, as well as fabrication of semiconductor devices based on such lattice-mismatched heterostructures. | 03-03-2011 |
| 20110114996 | Inducement of Strain in a Semiconductor Layer - Strain is induced in a semiconductor layer. Embodiments include inducing strain by, for example, creation of free surfaces. | 05-19-2011 |
James G. Fiorenza, Wilmington, MA US
| Patent application number | Description | Published |
|---|---|---|
| 20100012976 | POLISHING OF SMALL COMPOSITE SEMICONDUCTOR MATERIALS - A device includes a crystalline material within an area confined by an insulator. A surface of the crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by using a planarization process configured with a selectivity of the crystalline material to the insulator greater than one. In a preferred embodiment, the planarization process uses a composition including abrasive spherical silica, H | 01-21-2010 |
| 20100072515 | FABRICATION AND STRUCTURES OF CRYSTALLINE MATERIAL - A surface of the first semiconductor crystalline material has a reduced roughness. A semiconductor device includes a low defect, strained second semiconductor crystalline material over the surface of the first crystalline material. A surface of the strained second semiconductor crystalline material has a reduced roughness. One example includes obtaining a surface with reduced roughness by creating process parameters that reduce impurities at an interfacial boundary between the first and second semiconductor crystalline materials. In one embodiment, the first semiconductor crystalline material can be confined by an opening in an insulator having an aspect ratio sufficient to trap defects using Aspect Ratio Trapping techniques. | 03-25-2010 |
| 20100078680 | SEMICONDUCTOR SENSOR STRUCTURES WITH REDUCED DISLOCATION DEFECT DENSITIES AND RELATED METHODS FOR THE SAME - Non-silicon based semiconductor devices are integrated into silicon fabrication processes by using aspect-ratio-trapping materials. Non-silicon light-sensing devices in a least a portion of a crystalline material can output electrons generated by light absorption therein. Exemplary light-sensing devices can have relatively large micron dimensions. As an exemplary application, complementary-metal-oxide-semiconductor photodetectors are formed on a silicon substrate by incorporating an aspect-ratio-trapping technique. | 04-01-2010 |
John Fiorenza, Slinger, WI US
| Patent application number | Description | Published |
|---|---|---|
| 20090232674 | ENGINE STARTER ASSEMBLY - A pressure washer, connected to a water source by a hose, includes a frame, an engine supported by the frame and having a crankshaft, a pump driven by the engine, a wheel supported for rotation relative to the frame, an input configured to receive water from the hose and discharge the water against the wheel to cause the wheel to rotate, and a spring having a first end that is coupled to the crankshaft and a second end that is rotatable about an axis relative to the first end in response to rotation of the wheel to wind the spring. The wound spring is released to rotate the crankshaft to start the engine. | 09-17-2009 |
John A. Fiorenza, Slinger, WI US
| Patent application number | Description | Published |
|---|---|---|
| 20090240377 | POWER MONITORING SYSTEM - The invention provides a hierarchically accessible monitoring system configured to be used with a standby generator, and a method of remotely accessing generator information from a standby generator. The hierarchically accessible monitoring system includes an interface unit configured to receive information from the standby generator and to communicate the generator information, and a remote data server in communication with the interface unit. The remote data server receives the generator information from the interface unit, stores the generator information, and controls access to the generator information based upon at least two hierarchical levels, each hierarchical level having different access privileges. The hierarchically accessible monitoring system also includes a user interface configured to display the generator information from the remote data server to at least one user. The user has access privileges to read the generator information based upon the user's assigned hierarchical level. | 09-24-2009 |