Finney
Adrian Finney, Osterreich AU
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20100237847 | POWER SUPPLY CIRCUIT - A power supply circuit has a first MOSFET having a body region between the source and drain. The body region is connected so as to be at the same potential as the source. Application of a suitable potential to the gate causes the MOSFET to switch to a conductive on state. The power supply circuit also has signal generation circuitry, which generates a signal indicative of a conductive state of the first MOSFET. The signal generation circuitry generates a reference voltage of a predetermined potential difference from the source potential. The power supply circuit further comprises a second MOSFET having a body region connected so as to be at the same potential as the drain of the first MOSFET, and the second gate is connected to receive the reference voltage. When the potential of the drain of the first MOSFET falls a predetermined voltage below the reference voltage the second MOSFET is switched to a conductive on state between the second source and the second drain, the signal being dependent upon the state of the second MOSFET. | 09-23-2010 |
Adrian Finney, Villach AT
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20140029145 | ESD Protection - A two-stage protection device for an electronic component protects against transient disturbances. The electronic component may be a semiconductor component, and may include one or multiple transistors and/or an integrated circuit. The protection device is connected to at least a first contact and a second contact of the electronic component, and is disposed essentially in parallel to the component that is to be protected, between the first contact and the second contact. The protection device includes a first stage with at least one diode and a second stage separated from the first stage by a resistor. The second stage includes at least one diode arrangement having two back-to-back disposed diodes which are disposed cathode-to-cathode. | 01-30-2014 |
20140043096 | POLYSILICON DIODE BANDGAP REFERENCE - Representative implementations of devices and techniques provide a bandgap reference voltage using at least one polysilicon diode and no silicon diodes. The polysilicon diode is comprised of three portions, a lightly doped portion flanked by a more heavily doped portion on each end. | 02-13-2014 |
20140217500 | Semiconductor Device with Low On Resistance and High Breakdown Voltage - A semiconductor device includes an epitaxial layer of semiconductor material of a first conductivity type, a body region of a second (opposite) conductivity type extending into the epitaxial layer from a main surface of the epitaxial layer, a source region of the first conductivity type disposed in the body region, and a channel region extending laterally in the body region from the source region along the main surface. A charge compensation region of the second conductivity type can be provided under the body region which extends in a direction parallel to the main surface and terminates prior to a pn-junction between the source and body regions at the main surface, and/or an additional region of the first conductivity type which has at least one peak doping concentration each of which occurs deeper in the epitaxial layer from the main surface than a peak doping concentration of the device channel region. | 08-07-2014 |
20150263165 | Semiconductor Device Having a Charge Compensation Region - A semiconductor device includes a semiconductor material of a first conductivity type, a body region of a second (opposite) conductivity type extending into the semiconductor material from a main surface of the semiconductor material, a source region of the first conductivity type disposed in the body region, and a channel region extending laterally in the body region from the source region along the main surface. A charge compensation region of the second conductivity type can be provided under the body region which extends in a direction parallel to the main surface and terminates prior to a pn-junction between the source and body regions at the main surface, and/or an additional region of the first conductivity type which has at least one peak doping concentration each of which occurs deeper in the semiconductor material from the main surface than a peak doping concentration of the device channel region. | 09-17-2015 |
Allan Gary Finney, Regina CA
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20120222670 | Solar Heater - A solar heater for space heating is formed by a frame that provides structural support for a plate that absorbs sunlight. In one aspect, the plate is directly molded into the frame. In another aspect, the plate is incorporated into an assembly which is then sealed to the frame. The solar heater is configured such that multiple similarly configured solar heaters may be coupled together in a series and/or parallel arrangement. | 09-06-2012 |
Constance Ann Marjory Finney, Toronto CA
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20100112037 | S1P RECEPTOR AGONISTS FOR THE TREATMENT OF CEREBRAL MALARIA - Methods and compositions for treating, managing, and/or preventing cerebral malaria are disclosed. | 05-06-2010 |
20100113530 | S1P LYASE INHIBITORS FOR THE TREATMENT OF CEREBRAL MALARIA - Methods and compositions for treating, managing, and/or preventing cerebral malaria are disclosed. | 05-06-2010 |
Dale Finney, Oshawa CA
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20100121594 | METHOD AND SYSTEM FOR ESTIMATION OF SOURCE IMPEDENCE ON ELECTRICAL DISTRIBUTION LINES - A device and method for dynamically determining an impedance of a network is disclosed. The device includes at least a processing system for measuring a network voltage and network current when said network is determined to be in a first state, measuring a network voltage when said network is determined to be in a second state, estimating said impedance value dependent upon said measured voltages and current, adapting said estimated impedance based on at least one prior impedance value and storing at least said adapted impedance. | 05-13-2010 |
Dale S. Finney, Oshawa CA
Patent application number | Description | Published |
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20080239602 | FAST IMPEDANCE PROTECTION TECHNIQUE IMMUNE TO DYNAMIC ERRORS OF CAPACITIVE VOLTAGE TRANSFORMERS - The present invention relates to methods for providing impedance protection differentiating between in-zone and out-of-zone faults based on instantaneous, digitally derived operating and polarizing, distance comparator signals. The method uses a pair of fast orthogonal filters to derive D and Q components of the input voltages and currents. Two sets of operating and polarizing signals are derived for better speed of response under varying fault moment with respect to the peaks and zero crossings of power signals. Three stages of comparison between the operating and polarizing impedance terms are used. These comparator stages use half a cycle averaging windows, and three-quarters-of-a-cycle windows. The first stage of comparison is based on energy comparator responding to both magnitude and phase information in the signals. Stages 2 and 3 are of phase comparison type, responding mostly at the phase information and neglecting the magnitude information for better immunity to noise and signal distortions. | 10-02-2008 |
Dale S. Finney, Sydney Mines CA
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20130250458 | LEVERAGING INHERENT REDUNDANCY IN A MULTIFUNCTION IED - Disclosed herein are systems and methods for leveraging the inherent redundancy of electrical measurement inputs available to microprocessor-based intelligent electronic devices (IEDs). Specifically, an IED may receive a plurality of electrical measurements associated with an electric power delivery system, such as measurements associated with a generator. A first protection module may be configured to detect a first type of electrical disturbance using a first subset of the plurality of electrical measurements. A second protection module may be configured to detect a second type of electrical disturbance using a second subset of the plurality of electrical measurements. A first redundant protection module may be configured to verify the detection of the first type of electrical disturbance using at least a portion of the second subset of the plurality of electrical measurements. | 09-26-2013 |
20140191591 | Preventing Out-of-Synchronism Reclosing Between Power Systems - The present disclosure provides apparatus, systems, and methods for preventing out-of-synchronism closing between power systems. An intelligent electronic device (IED) apparatus may include a control component and a delay component. The control component is configured to selectively control opening and closing of a breaker. The control component selectively outputs a close signal to cause the breaker to connect a first portion of a power delivery system to another portion of the power delivery system. The delay component is configured to delay output of the close signal to the breaker. The delay component includes circuitry independent from control by the control component and the delay component is inconfigurable from a remote location. | 07-10-2014 |
Dale S. Finney, Little Bras D'Or CA
John Finney, Zurich CH
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20130226538 | Detecting State Estimation Network Model Data Errors - Methods for detecting network model data errors are disclosed. In some examples, methods for detecting network model data errors may include splitting a network model into a first plurality of portions, executing an algorithm on each of the portions, identifying a portion for which the algorithm is determined to be non-converged, splitting the identified portion into a second plurality of portions, repeating the executing, identifying and splitting the identified portion until a resulting identified portion is smaller than a predefined threshold, and examining the resulting identified portion to identify plausible data errors therein. In some examples, examining the resulting identified portion to identify plausible data errors therein may include executing a modified algorithm, which may include an augmented measurement set, on the identified portion. | 08-29-2013 |