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Figura
Giorgio Figura, Epinal FR
| Patent application number | Description | Published |
|---|---|---|
| 20090049900 | Method for Calibrating a Turbocharger - A calibration flow position of a variable nozzle ( | 02-26-2009 |
Giorgio Figura, Thaon Les Vosges FR
| Patent application number | Description | Published |
|---|---|---|
| 20110167817 | TURBOCHARGER COMPRISING A VARIABLE NOZZLE DEVICE - A turbocharger comprises a variable nozzle device and an exhaust housing being mechanically and/or thermally decoupled from the variable nozzle device. Additional optional advantageous features are provided, including various axial and radial clearances and various sealing elements. | 07-14-2011 |
John A. Figura, Defiance, MO US
| Patent application number | Description | Published |
|---|---|---|
| 20080306642 | Remote controlled position sensing and auto-leveling boat lift controller - The present invention disclosure relates to boat lifts and in particular a boat lift preferably employing to a remote controlled, position sensing and auto-leveling boat lift controller. The controller is capable of monitoring the height of the lift relative to the surface of the water and the angle of the lift relative to horizontal level. The controller filters out the effects of wave action or other interfering conditions, obtaining precise measurements of the height and angle. The controller continuously maintains both height and angle at the position set by the operator. | 12-11-2008 |
Mark Figura, Shorewood, IL US
| Patent application number | Description | Published |
|---|---|---|
| 20110297004 | ULTRASONIC BREW TECHNOLOGY SYSTEMS - Ultrasonic Brew Technology Systems is a coffee brewing system with a brew ring having the capability of emitting ultrasonic waves for use in agitation of coffee grounds during a coffee brewing episode. Ultrasonic Brew Technology Systems utilizes low voltage direct current to power the circular brew ring which may be comprised of stainless steel. The brew ring may frictionally-fit about the periphery of a brewing basket of a coffee maker (on an outside circumference of the periphery of a brewing basket of a coffee maker or on/in the inside periphery.) Agitation of the coffee grounds by the ultrasonic circular waves creates an increased pulsated-distance between each of the coffee granules thereby creating a greater surface area contact between the water and the coffee grounds, creating higher efficiency and fuller flavored coffee. The brew ring may frictionally-fit about the periphery of a brewing basket of a coffee maker (on an outside circumference of the periphery of a brewing basket of a coffee maker, on/in the inside periphery), or integrated seamlessly into the “pull-out”/“swing-out” basket. | 12-08-2011 |
Mark Figura, Methuen, MA US
| Patent application number | Description | Published |
|---|---|---|
| 20110254961 | Voice Quality Probe for Communication Networks - Embodiments emulate agents in a contact center, or enterprise, that initiate communication sessions to each other over communication networks and measure data quality using one or more metrics. That data measured can include voice and video data. Examples of communication networks used to place the voice calls include Internet Protocol (IP) networks and hybrid networks including more traditional telephony components. The data collected by the emulated agents is sent to a monitoring server. The monitoring server and the emulated agent behavior can be configured and scheduled via a web interface. In addition, the web interface provides the user with detailed reports, performance summaries, and visualizations of data collected, further enabling the user to troubleshoot a contact center or enterprise over a variety of communication networks. | 10-20-2011 |
Michael Georg Figura, Dormagen DE
| Patent application number | Description | Published |
|---|---|---|
| 20090051088 | Silent Block - A silent block comprises a first basic element and a rubber body at least partially surrounding the first basic element. The rubber body has, on its bearing side oriented toward a fastening side, at least one projection that projects beyond the bearing side in a direction of the fastening side. | 02-26-2009 |
Paul Figura, Orange, CT US
| Patent application number | Description | Published |
|---|---|---|
| 20090155468 | METROLOGY IN ELECTROLESS COBALT PLATING - Electrolessly depositing a cobalt-based alloy on a metal surface of a substrate in a process which involves monitoring for Co | 06-18-2009 |
Paul Figura, Pointe-Claire CA
| Patent application number | Description | Published |
|---|---|---|
| 20090319935 | Method and Apparatus for Signaling Neighbor Cell Transmission Frame Allocations - In accordance with an example embodiment of the present invention, an apparatus comprising a user interface configured to: display a plurality of selectable objects on a display, each of the plurality of selectable objects having a selection area. The apparatus further comprises a processor configured to: receive a user input within the selection area to select a first object, the first object being at least one of the plurality of selectable objects. Further, the apparatus comprises the user interface further configured to display an expanded selection area for the first object based at least in part on the user input. | 12-24-2009 |
Thomas A. Figura, Boise, ID US
| Patent application number | Description | Published |
|---|---|---|
| 20080299753 | Peripheral Gate Stacks and Recessed Array Gates - Methods are provided for simultaneously processing transistors in two different regions of an integrated circuit. Planar transistors are provided in a logic region while recessed access devices (RADs) are provided in an array region for a memory device. During gate stack patterning in the periphery, word lines are recessed within the trenches for the array RADs. Side wall spacer formation in the periphery simultaneously provides an insulating cap layer burying the word lines within the trenches of the array. | 12-04-2008 |
| 20090017634 | USE OF A PLASMA SOURCE TO FORM A LAYER DURING THE FORMATION OF A SEMICONDUCTOR DEVICE - A method used to form a semiconductor device having a capacitor comprises placing a semiconductor wafer assembly into a chamber of a plasma source, the wafer assembly comprising a layer of insulation having at least one contact therein and a surface, and further comprising a conductive layer over the surface and in the contact. Next, in the chamber, a layer of etch resistant material is formed within the contact over the conductive layer, the etch resistant material not forming over the surface. | 01-15-2009 |
| 20090239366 | Method Of Forming A Transistor Gate Of A Recessed Access Device, Method Of Forming A Recessed Transistor Gate And A Non-Recessed Transistor Gate, And Method Of Fabricating An Integrated Circuit - Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and another of the metals diffuses less readily in silicon than silicon does in the metal. An exemplary mixture includes 80% nickel and 20% cobalt. The silicon within the trench is allowed to fully silicide without void formation, despite a relatively high aspect ratio for the trench. Among other devices, recessed access devices (RADs) can be formed by the method for memory arrays. | 09-24-2009 |
| 20100193853 | SEMICONDUCTOR DEVICES AND STRUCTURES INCLUDING AT LEAST PARTIALLY FORMED CONTAINER CAPACITORS AND METHODS OF FORMING THE SAME - Methods of forming semiconductor devices that include one or more container capacitors include anchoring an end of a conductive member to a surrounding lattice material using an anchor material, which may be a dielectric. The anchor material may extend over at least a portion of an end surface of the conductive member, at least a portion of the lattice material, and an interface between the conductive member and the lattice material. In some embodiments, the anchor material may be formed without significantly covering an inner sidewall surface of the conductive member. Furthermore, in some embodiments, a barrier material may be provided over at least a portion of the anchor material and over at least a portion of an inner sidewall surface of the conductive member. Novel semiconductor devices and structures are fabricated using such methods. | 08-05-2010 |
| 20110183507 | Peripheral Gate Stacks and Recessed Array Gates - Methods are provided for simultaneously processing transistors in two different regions of an integrated circuit. Planar transistors are provided in a logic region while recessed access devices (RADs) are provided in an array region for a memory device. During gate stack patterning in the periphery, word lines are recessed within the trenches for the array RADs. Side wall spacer formation in the periphery simultaneously provides an insulating cap layer burying the word lines within the trenches of the array. | 07-28-2011 |