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Ferraiolo
David F. Ferraiolo, Leesburg, VA US
| Patent application number | Description | Published |
|---|---|---|
| 20090205018 | METHOD AND SYSTEM FOR THE SPECIFICATION AND ENFORCEMENT OF ARBITRARY ATTRIBUTE-BASED ACCESS CONTROL POLICIES - A general attribute-based access control system includes at least one resource server, at least one client module, an access control database including basic data sets and basic relations between the basic data sets, at least one server module including an access decision sub-module that computes a decision whether to grant or deny access to computer-accessible resources referenced by objects, an event processing sub-module that processes events, and an administrative sub-module that creates, deletes, and modifies elements of the basic data sets and the basic relations. | 08-13-2009 |
Francesco Ferraiolo, Ca'De' Fabbri (bologna) IT
| Patent application number | Description | Published |
|---|---|---|
| 20100047018 | WAVE-MOTION REDUCING STRUCTURE - A wave-motion reducing structure comprises wave-motion reducing means ( | 02-25-2010 |
Francesco Ferraiolo, Ca' De' Fabbri (bologna) IT
| Patent application number | Description | Published |
|---|---|---|
| 20110091280 | Lightweight protection element and filter of the mattress type - A lightweight protection element and filter of the mattress type comprises an external containment structure ( | 04-21-2011 |
| 20110114799 | Protective wire net, a protective structure constructed with the net, and the use of the protective wire net for the construction of a protective structure - A protective wire net including an array of longitudinal wires arranged side by side and each intertwined with at least one respective adjacent longitudinal wire. Each of one or more longitudinal metal cables is also intertwined with at least one adjacent longitudinal wire. One or more transverse wires and/or metal cables may also be provided, arranged in a transverse direction relative to the longitudinal wires and outside intertwining regions defined by portions of adjacent longitudinal wires which are bent around one another, the transverse wires and/or metal cables being intertwined or interlaced with one or more of the longitudinal wires. | 05-19-2011 |
Francesco Ferraiolo, Ca'De'Fabbri Bologna IT
| Patent application number | Description | Published |
|---|---|---|
| 20090136297 | Lightweight protection element and filter of the mattress type - A lightweight protection element and filter of the mattress type comprises an external containment structure ( | 05-28-2009 |
Frank D. Ferraiolo, Poughkeepsie, NY US
| Patent application number | Description | Published |
|---|---|---|
| 20110075740 | Configurable Differential to Single Ended IO - An electronic system having a power efficient differential signal between a first and second electronic unit. A controller uses information, such as compliance with data transmission rate requirement and bit error rate (BER) versus a BER threshold to control power modes such that a minimal amount of power is required. Amplitude of transmission and single ended or differential transmission of data are examples of the power modes. The controller also factors in a failing phase in a differential signal in selecting a minimal power mode that satisfies the transmission rate requirement of the BER threshold. | 03-31-2011 |
Frank D. Ferraiolo, Essex Junction, VT US
| Patent application number | Description | Published |
|---|---|---|
| 20120106539 | Coordinating Communications Interface Activities in Data Communicating Devices Using Redundant Lines - A parallel data link includes a redundant line. The redundant line permits one line to be calibrated while the others carry functional data, a switching mechanism enabling each line to be selected in turn for calibration. Control information for controlling the link, which is preferably for coordinating calibration activity, is communicated on the line selected for calibration. Preferably, the link is bi-directional, having a separate redundant line in each direction, enabling a bi-directional handshaking protocol to be used for communicating control information. Preferably, the lines selected for calibration are time-multiplexed to carry calibration patterns and control information at different time intervals. | 05-03-2012 |
| 20120106687 | Calibration of Multiple Parallel Data Communications Lines for High Skew Conditions - A parallel data link includes a redundant line. A bank of switches permits any arbitrary line of the link to be enabled or disabled for carrying functional data, each line being dynamically calibrated in turn by disabling the line and allowing other lines to carry the functional data. The switches are located downstream of alignment mechanisms so that data input to the switches is compensated for data skew. Preferably, receiver synchronization circuitry in each line operates in a respective independent clock domain, while the switches and calibration mechanism operate in a common clock domain. Preferably, the receiver synchronization circuits provide an adjustable delay corresponding to a variable number of clock cycles to align the outputs of the receiver synchronization circuits with respect to one another, which can accommodate high data skew. | 05-03-2012 |
Frank David Ferraiolo, Essex Junction, VT US
| Patent application number | Description | Published |
|---|---|---|
| 20100085872 | Self-Healing Chip-to-Chip Interface - A method, apparatus, and computer instructions for managing a set of signal paths for a chip. A defective signal path within the set of signal paths for the chip is detected. Signals are re-routed through the set of signal paths such that the defective signal path is removed from the set of signal paths and sending signals using remaining data signal paths in the set of signal paths and using an extra signal path in response to detecting the defective signal path. | 04-08-2010 |
| 20110010482 | Self-Healing Chip-to-Chip Interface - A method, apparatus, and computer instructions for managing a set of signal paths for a chip. A defective signal path within the set of signal paths for the chip is detected. Signals are re-routed through the set of signal paths such that the defective signal path is removed from the set of signal paths and sending signals using remaining data signal paths in the set of signal paths and using an extra signal path in response to detecting the defective signal path. | 01-13-2011 |