| Patent application number | Description | Published |
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| 20080297259 | Configurable, Variable Gain LNA for Multi-Band RF Receiver - A configurable LNA architecture for a multi-band RF receiver front end comprises a bank of LNAs, each optimized to a different frequency band, wherein each LNA has a configurable topology. Each LNA comprises a plurality of amplifier stages, each stage including an RF transistor having a different width. The transistor widths in adjacent amplifier stages may be binary weighted, or may be sized to achieve a constant gain step. By selectively enabling and disabling RF transistors, the effective transistor width of the LNA can be controlled with a fine granularity. A DAC generates a bias voltage with a small quantization step, additionally providing a fine granularity of gain control. The LNAs are protected by overvoltage protection circuits which shield transistors from a supply voltage in excess of their breakdown voltage. A source degeneration inductor presents a real resistance at inputs of the LNAs, without introducing thermal noise. | 12-04-2008 |
| 20090213770 | Active Cancellation of Transmitter Leakage in a Wireless Transceiver - Active transmitter leakage cancellation techniques are disclosed, for reducing transmitter leakage in a frequency-duplexing radio transceiver. Reducing transmitter leakage to the receiver path of a duplex transceiver eases the linearity requirements for low-noise amplifier and mixer circuits, potentially reducing transceiver cost as well as complexity. In an exemplary method, a radio-frequency (RF) cancellation signal is generated from a transmitter signal, and the RF cancellation signal is combined with a received RF signal to obtain a combined RF signal comprising a residual transmitter leakage component. The residual transmitter leakage component of the combined RF signal is converted, using, e.g., a frequency mixer, to obtain a down-converted signal at baseband or at an intermediate frequency. A magnitude of the residual transmitter leakage component is detected from the down-converted signal, and used to adjust the phase or amplitude of the RF cancellation signal, or both, to reduce the residual transmitter leakage component. | 08-27-2009 |
| 20090268849 | Passive Miser and Four-Phase Clocking Method and Apparatus - According to one embodiment, a radio frequency receiver comprises a quadrature mixer configured to convert radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer comprises an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer comprises a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a plurality of quadrature pulsed clock signals and delayed versions of the quadrature pulsed clock signals. The quadrature pulsed clock signals and the delayed versions of the quadrature pulsed clock signals drive the mixer input switch transistors and the output switch transistors. | 10-29-2009 |
| 20090270062 | Passive Miser and Four-Phase Clocking Method and Apparatus - According to one embodiment, a radio frequency receiver includes a quadrature mixer for converting radio frequency signals to baseband signals or intermediate frequency signals. The quadrature mixer includes an in-phase passive mixer and a quadrature-phase passive mixer. Each passive mixer includes a mixer core having a plurality of mixer input switch transistors and a plurality of output switch transistors connected to the mixer input switch transistors. Clock circuitry generates a first set of clock signals and a second set of clock signals. The first set of clock signals has a frequency twice that of the second set of clock signals. The first set of clock signals is arranged to drive the mixer input switch transistors and the second set of clock signals is arranged to drive the output switch transistors. | 10-29-2009 |
| 20100066442 | Method and Apparatus for Tunable Current-Mode Filtering - According to the teachings presented herein, a tunable current-mode filter is implemented using two or more tunable filter stages in cascade connection. For example, a number of tunable filter stages corresponding to a desired filter order are included in the filter in cascade connection. Use of the current-mode filter simplifies circuit design, particularly in communication transmitter applications, and avoids current-to-voltage conversions needed when voltage-mode filters are used in current-mode signal processing chains. A method and circuit to tune and calibrate the frequency response of the filter are disclosed as well. | 03-18-2010 |
| 20100081408 | Re-Configurable Passive Mixer for Wireless Receivers - A configurable passive mixer is described herein. According to one exemplary embodiment, the passive mixer comprises a clock generator, a controller, and a plurality of passive mixer cores connected in parallel. The clock generator comprises a local oscillator drive unit for each passive mixer core. The controller varies an effective transistor size of the passive mixer by separately configuring each of the passive mixer cores to enable/disable each passive mixer core. For example, the controller may selectively enable one or more of the passive mixer cores to vary the effective transistor width of the passive mixer. As the performance requirements and/or the operating communication standard change, the controller may re-configure each passive mixer core. | 04-01-2010 |
| 20100097253 | LOW POWER LINEAR INTERPOLATION DIGITAL-TO-ANALOG CONVERSION - A resistor network digital-to-analog converter (DAC) subdivides each sampling clock cycle of the DAC into a number of phases. For at least one bit input of the DAC associated with a desired input resistor weight, the input bit value is sampled at each phase. Each of those sampled values is then applied to a respective resistor branch, the parallel set of resistor branches forming the parallel equivalent of the desired input resistor weight for that bit input. Such application may be, for example, via a slew-rate controlled driver, to smooth transient edges in the generated analog output signal. The resulting analog signal experiences reduced reconstruction errors at a higher frequency while consuming less power than a comparable oversampling DAC. Shifting reconstruction errors to higher frequencies relaxes downstream filtering requirements, which simplifies analog signal filtering and allows, for example, the use of current-mode low pass filters. | 04-22-2010 |
| 20100203860 | Passive Mixer Mismatch Tuning Using Self-Tests to Suppress IM2 - The second-order inter-modulation distortion, originating in a differential passive mixer core from imbalance between devices, is reduced by compensating for the mismatch or load, by means of tuning the differential output impedance at the mixer core, or the input impedance of a filter coupled to the output of the passive mixer. Compensating for the imbalance allows greater suppression of even-order harmonics in the differential structure, which reduces second-order intermodulation at the output of the mixers. The compensation is achieved by tunable resistive elements that are calibrated by a built-in self-test architecture. The calibration circuit is deactivated during receiver operation. | 08-12-2010 |
| 20100253442 | Tank Tuning for Band Pass Filter Used in Radio Communications - A tuning method and circuit for an LC tank resonant circuit, including an inductor and a variable capacitor, are described. In a tuning mode, an RF input signal is applied to an input port of the circuit, and the RF output signal is monitored as a variable capacitor control input is varied. A peak output is detected, and the corresponding variable capacitor control input is stored, and applied to the variable capacitor in an operating mode. In one embodiment, the variable capacitor control input is adjusted for delay in the peak detection process. In one embodiment, the variable capacitor comprises a coarse capacitor and a fine capacitor; the tuning procedure is repeated for each capacitor; and both coarse and fine variable capacitor control inputs are stored and applied to the respective capacitors in operating mode. | 10-07-2010 |
| 20100284446 | Method and Apparatus for MIMO Repeater Chains in a Wireless Communication Network - In one or more embodiments taught herein, a multi-band MIMO repeater is configured to translate normal wireless mobile bands into other frequency bands in the physical layer. An advantageous, multi-hop repeater chain includes two or more such repeaters, for propagating downlink signals from a base station, and for propagating uplink signals to the base station. Each such repeater may use paralleled homodyne structure transceivers for better SNR, spectrum combiners for uplink signal aggregation, spectrum separators for downlink signal de-aggregation, water mark signal inserters for optimization, and, among other things, spectrum analyzers for frequency band selection. In at least one such embodiment, a multi-hop repeater chain is configured for MIMO operation in an LTE Advanced or other MIMO network, to deliver high data rate over larger distances—e.g., further away from cell base stations. | 11-11-2010 |
| 20110025415 | Digital Modulated RF Power Amplifier with Impedance Compensation Circuit - A digital modulated power amplifier unit includes a differential radio frequency (RF) amplifier circuit having differential output nodes, a digital modulation signal input and complimentary clock signal inputs. The differential RF amplifier circuit includes a first pair of transistors operable to receive a digital modulation signal and a second pair of transistors operable to receive complimentary clock signals. The digital modulated power amplifier unit further includes an impedance compensation circuit connected between the differential output nodes of the differential RF amplifier circuit. The impedance compensation circuit includes a transistor connected in series between first and second RC circuits. The transistor is operable to electrically connect and disconnect the first RC circuit and the second RC circuit responsive to the digital modulation signal. | 02-03-2011 |
| 20110026638 | POSITIVE COEFFICIENT WEIGHTED QUADRATURE MODULATION METHOD AND APPARATUS - A differential positive coefficient weighted quadrature modulator is actuated responsive to quadrature clock signals and positive digital modulation signals input to the modulator. The modulator includes an I-channel positive coefficient weighted modulator (PCWM) and a Q-channel PCWM. The I-channel PCWM has differential output nodes configured to output a differential I-channel signal responsive to the state of first and second positive digital modulation signals and first and second complimentary quadrature clock signals input to the I-channel PCWM. The Q-channel PCWM has differential output nodes configured to output a differential Q-channel signal responsive to the state of third and fourth positive digital modulation signals and third and fourth complimentary quadrature clock signals input to the Q-channel PCWM. The positive digital modulation signals input to the I-channel and Q-channel PCWMs have positive amplitude and the I-channel and Q-channel PCWMs conduct at approximately half clock cycle or less of the corresponding quadrature clock signals. | 02-03-2011 |
| 20110103508 | Digital Affine Transformation Modulated Power Amplifier for Wireless Communications - A digital affine transformation modulator and power amplifier drives a transmitter antenna. The modulator performs an affine transformation on a signal, wherein the I, Q space is mapped to a plurality of sectors. A signal in a sector is expressed as the sum of two vectors, the angles of which define the sector boundaries. A digital power amplifier comprises a plurality of amplifier cells, each cell comprising at least two amplifier units. For a given signal, each amplifier unit selectively amplifies a clock signal having a phase corresponding to one of the boundary angles of the signal's affine transformed sector. A subset of the plurality of amplifier cells receiving each phase clock signal are enabled, based on the magnitude of the associated vector describing the signal in affine transform space. The modulation scheme exhibits higher efficiency than quadrature modulation, without the bandwidth expansion and group delay mismatch of polar modulation. | 05-05-2011 |
